Lines Matching +full:qcom +full:- +full:ipcc
1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,icc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/power/qcom,rpmhpd.h>
15 #include <dt-bindings/power/qcom-rpmpd.h>
16 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
19 interrupt-parent = <&intc>;
21 #address-cells = <2>;
22 #size-cells = <2>;
25 xo_board_clk: xo-board-clk {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
30 sleep_clk: sleep-clk {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
37 #address-cells = <2>;
38 #size-cells = <0>;
42 compatible = "qcom,kryo";
44 enable-method = "psci";
45 qcom,freq-domain = <&cpufreq_hw 0>;
46 next-level-cache = <&L2_0>;
47 capacity-dmips-mhz = <1024>;
48 dynamic-power-coefficient = <100>;
49 L2_0: l2-cache {
51 cache-level = <2>;
52 cache-unified;
53 next-level-cache = <&L3_0>;
54 L3_0: l3-cache {
56 cache-level = <3>;
57 cache-unified;
64 compatible = "qcom,kryo";
66 enable-method = "psci";
67 qcom,freq-domain = <&cpufreq_hw 0>;
68 next-level-cache = <&L2_1>;
69 capacity-dmips-mhz = <1024>;
70 dynamic-power-coefficient = <100>;
71 L2_1: l2-cache {
73 cache-level = <2>;
74 cache-unified;
75 next-level-cache = <&L3_0>;
81 compatible = "qcom,kryo";
83 enable-method = "psci";
84 qcom,freq-domain = <&cpufreq_hw 0>;
85 next-level-cache = <&L2_2>;
86 capacity-dmips-mhz = <1024>;
87 dynamic-power-coefficient = <100>;
88 L2_2: l2-cache {
90 cache-level = <2>;
91 cache-unified;
92 next-level-cache = <&L3_0>;
98 compatible = "qcom,kryo";
100 enable-method = "psci";
101 qcom,freq-domain = <&cpufreq_hw 0>;
102 next-level-cache = <&L2_3>;
103 capacity-dmips-mhz = <1024>;
104 dynamic-power-coefficient = <100>;
105 L2_3: l2-cache {
107 cache-level = <2>;
108 cache-unified;
109 next-level-cache = <&L3_0>;
115 compatible = "qcom,kryo";
117 enable-method = "psci";
118 qcom,freq-domain = <&cpufreq_hw 1>;
119 next-level-cache = <&L2_4>;
120 capacity-dmips-mhz = <1024>;
121 dynamic-power-coefficient = <100>;
122 L2_4: l2-cache {
124 cache-level = <2>;
125 cache-unified;
126 next-level-cache = <&L3_1>;
127 L3_1: l3-cache {
129 cache-level = <3>;
130 cache-unified;
138 compatible = "qcom,kryo";
140 enable-method = "psci";
141 qcom,freq-domain = <&cpufreq_hw 1>;
142 next-level-cache = <&L2_5>;
143 capacity-dmips-mhz = <1024>;
144 dynamic-power-coefficient = <100>;
145 L2_5: l2-cache {
147 cache-level = <2>;
148 cache-unified;
149 next-level-cache = <&L3_1>;
155 compatible = "qcom,kryo";
157 enable-method = "psci";
158 qcom,freq-domain = <&cpufreq_hw 1>;
159 next-level-cache = <&L2_6>;
160 capacity-dmips-mhz = <1024>;
161 dynamic-power-coefficient = <100>;
162 L2_6: l2-cache {
164 cache-level = <2>;
165 cache-unified;
166 next-level-cache = <&L3_1>;
172 compatible = "qcom,kryo";
174 enable-method = "psci";
175 qcom,freq-domain = <&cpufreq_hw 1>;
176 next-level-cache = <&L2_7>;
177 capacity-dmips-mhz = <1024>;
178 dynamic-power-coefficient = <100>;
179 L2_7: l2-cache {
181 cache-level = <2>;
182 cache-unified;
183 next-level-cache = <&L3_1>;
187 cpu-map {
225 idle-states {
226 entry-method = "psci";
228 GOLD_CPU_SLEEP_0: cpu-sleep-0 {
229 compatible = "arm,idle-state";
230 idle-state-name = "gold-power-collapse";
231 arm,psci-suspend-param = <0x40000003>;
232 entry-latency-us = <549>;
233 exit-latency-us = <901>;
234 min-residency-us = <1774>;
235 local-timer-stop;
238 GOLD_RAIL_CPU_SLEEP_0: cpu-sleep-1 {
239 compatible = "arm,idle-state";
240 idle-state-name = "gold-rail-power-collapse";
241 arm,psci-suspend-param = <0x40000004>;
242 entry-latency-us = <702>;
243 exit-latency-us = <1061>;
244 min-residency-us = <4488>;
245 local-timer-stop;
249 domain-idle-states {
250 CLUSTER_SLEEP_GOLD: cluster-sleep-0 {
251 compatible = "domain-idle-state";
252 arm,psci-suspend-param = <0x41000044>;
253 entry-latency-us = <2752>;
254 exit-latency-us = <3048>;
255 min-residency-us = <6118>;
258 CLUSTER_SLEEP_APSS_RSC_PC: cluster-sleep-1 {
259 compatible = "domain-idle-state";
260 arm,psci-suspend-param = <0x42000144>;
261 entry-latency-us = <3263>;
262 exit-latency-us = <6562>;
263 min-residency-us = <9987>;
268 dummy-sink {
269 compatible = "arm,coresight-dummy-sink";
271 in-ports {
274 remote-endpoint =
283 compatible = "qcom,scm-sa8775p", "qcom,scm";
284 memory-region = <&tz_ffi_mem>;
288 aggre1_noc: interconnect-aggre1-noc {
289 compatible = "qcom,sa8775p-aggre1-noc";
290 #interconnect-cells = <2>;
291 qcom,bcm-voters = <&apps_bcm_voter>;
294 aggre2_noc: interconnect-aggre2-noc {
295 compatible = "qcom,sa8775p-aggre2-noc";
296 #interconnect-cells = <2>;
297 qcom,bcm-voters = <&apps_bcm_voter>;
300 clk_virt: interconnect-clk-virt {
301 compatible = "qcom,sa8775p-clk-virt";
302 #interconnect-cells = <2>;
303 qcom,bcm-voters = <&apps_bcm_voter>;
306 config_noc: interconnect-config-noc {
307 compatible = "qcom,sa8775p-config-noc";
308 #interconnect-cells = <2>;
309 qcom,bcm-voters = <&apps_bcm_voter>;
312 dc_noc: interconnect-dc-noc {
313 compatible = "qcom,sa8775p-dc-noc";
314 #interconnect-cells = <2>;
315 qcom,bcm-voters = <&apps_bcm_voter>;
318 gem_noc: interconnect-gem-noc {
319 compatible = "qcom,sa8775p-gem-noc";
320 #interconnect-cells = <2>;
321 qcom,bcm-voters = <&apps_bcm_voter>;
324 gpdsp_anoc: interconnect-gpdsp-anoc {
325 compatible = "qcom,sa8775p-gpdsp-anoc";
326 #interconnect-cells = <2>;
327 qcom,bcm-voters = <&apps_bcm_voter>;
330 lpass_ag_noc: interconnect-lpass-ag-noc {
331 compatible = "qcom,sa8775p-lpass-ag-noc";
332 #interconnect-cells = <2>;
333 qcom,bcm-voters = <&apps_bcm_voter>;
336 mc_virt: interconnect-mc-virt {
337 compatible = "qcom,sa8775p-mc-virt";
338 #interconnect-cells = <2>;
339 qcom,bcm-voters = <&apps_bcm_voter>;
342 mmss_noc: interconnect-mmss-noc {
343 compatible = "qcom,sa8775p-mmss-noc";
344 #interconnect-cells = <2>;
345 qcom,bcm-voters = <&apps_bcm_voter>;
348 nspa_noc: interconnect-nspa-noc {
349 compatible = "qcom,sa8775p-nspa-noc";
350 #interconnect-cells = <2>;
351 qcom,bcm-voters = <&apps_bcm_voter>;
354 nspb_noc: interconnect-nspb-noc {
355 compatible = "qcom,sa8775p-nspb-noc";
356 #interconnect-cells = <2>;
357 qcom,bcm-voters = <&apps_bcm_voter>;
360 pcie_anoc: interconnect-pcie-anoc {
361 compatible = "qcom,sa8775p-pcie-anoc";
362 #interconnect-cells = <2>;
363 qcom,bcm-voters = <&apps_bcm_voter>;
366 system_noc: interconnect-system-noc {
367 compatible = "qcom,sa8775p-system-noc";
368 #interconnect-cells = <2>;
369 qcom,bcm-voters = <&apps_bcm_voter>;
378 qup_opp_table_100mhz: opp-table-qup100mhz {
379 compatible = "operating-points-v2";
381 opp-100000000 {
382 opp-hz = /bits/ 64 <100000000>;
383 required-opps = <&rpmhpd_opp_svs_l1>;
388 compatible = "arm,armv8-pmuv3";
393 compatible = "arm,psci-1.0";
396 CPU_PD0: power-domain-cpu0 {
397 #power-domain-cells = <0>;
398 power-domains = <&CLUSTER_0_PD>;
399 domain-idle-states = <&GOLD_CPU_SLEEP_0>,
403 CPU_PD1: power-domain-cpu1 {
404 #power-domain-cells = <0>;
405 power-domains = <&CLUSTER_0_PD>;
406 domain-idle-states = <&GOLD_CPU_SLEEP_0>,
410 CPU_PD2: power-domain-cpu2 {
411 #power-domain-cells = <0>;
412 power-domains = <&CLUSTER_0_PD>;
413 domain-idle-states = <&GOLD_CPU_SLEEP_0>,
417 CPU_PD3: power-domain-cpu3 {
418 #power-domain-cells = <0>;
419 power-domains = <&CLUSTER_0_PD>;
420 domain-idle-states = <&GOLD_CPU_SLEEP_0>,
424 CPU_PD4: power-domain-cpu4 {
425 #power-domain-cells = <0>;
426 power-domains = <&CLUSTER_1_PD>;
427 domain-idle-states = <&GOLD_CPU_SLEEP_0>,
431 CPU_PD5: power-domain-cpu5 {
432 #power-domain-cells = <0>;
433 power-domains = <&CLUSTER_1_PD>;
434 domain-idle-states = <&GOLD_CPU_SLEEP_0>,
438 CPU_PD6: power-domain-cpu6 {
439 #power-domain-cells = <0>;
440 power-domains = <&CLUSTER_1_PD>;
441 domain-idle-states = <&GOLD_CPU_SLEEP_0>,
445 CPU_PD7: power-domain-cpu7 {
446 #power-domain-cells = <0>;
447 power-domains = <&CLUSTER_1_PD>;
448 domain-idle-states = <&GOLD_CPU_SLEEP_0>,
452 CLUSTER_0_PD: power-domain-cluster0 {
453 #power-domain-cells = <0>;
454 power-domains = <&CLUSTER_2_PD>;
455 domain-idle-states = <&CLUSTER_SLEEP_GOLD>;
458 CLUSTER_1_PD: power-domain-cluster1 {
459 #power-domain-cells = <0>;
460 power-domains = <&CLUSTER_2_PD>;
461 domain-idle-states = <&CLUSTER_SLEEP_GOLD>;
464 CLUSTER_2_PD: power-domain-cluster2 {
465 #power-domain-cells = <0>;
466 domain-idle-states = <&CLUSTER_SLEEP_APSS_RSC_PC>;
470 reserved-memory {
471 #address-cells = <2>;
472 #size-cells = <2>;
475 sail_ss_mem: sail-ss@80000000 {
477 no-map;
482 no-map;
485 xbl_boot_mem: xbl-boot@90600000 {
487 no-map;
490 aop_image_mem: aop-image@90800000 {
492 no-map;
495 aop_cmd_db_mem: aop-cmd-db@90860000 {
496 compatible = "qcom,cmd-db";
498 no-map;
501 uefi_log: uefi-log@908b0000 {
503 no-map;
506 ddr_training_checksum: ddr-training-checksum@908c0000 {
508 no-map;
513 no-map;
516 secdata_apss_mem: secdata-apss@908fe000 {
518 no-map;
522 compatible = "qcom,smem";
524 no-map;
528 tz_sail_mailbox_mem: tz-sail-mailbox@90c00000 {
530 no-map;
533 sail_mailbox_mem: sail-ss@90d00000 {
535 no-map;
538 sail_ota_mem: sail-ss@90e00000 {
540 no-map;
543 aoss_backup_mem: aoss-backup@91b00000 {
545 no-map;
548 cpucp_backup_mem: cpucp-backup@91b40000 {
550 no-map;
553 tz_config_backup_mem: tz-config-backup@91b80000 {
555 no-map;
558 ddr_training_data_mem: ddr-training-data@91b90000 {
560 no-map;
563 cdt_data_backup_mem: cdt-data-backup@91ba0000 {
565 no-map;
568 tz_ffi_mem: tz-ffi@91c00000 {
569 compatible = "shared-dma-pool";
571 no-map;
574 lpass_machine_learning_mem: lpass-machine-learning@93b00000 {
576 no-map;
579 adsp_rpc_remote_heap_mem: adsp-rpc-remote-heap@94a00000 {
581 no-map;
584 pil_camera_mem: pil-camera@95200000 {
586 no-map;
589 pil_adsp_mem: pil-adsp@95c00000 {
591 no-map;
594 pil_gdsp0_mem: pil-gdsp0@97b00000 {
596 no-map;
599 pil_gdsp1_mem: pil-gdsp1@99900000 {
601 no-map;
604 pil_cdsp0_mem: pil-cdsp0@9b800000 {
606 no-map;
609 pil_gpu_mem: pil-gpu@9d600000 {
611 no-map;
614 pil_cdsp1_mem: pil-cdsp1@9d700000 {
616 no-map;
619 pil_cvp_mem: pil-cvp@9f500000 {
621 no-map;
624 pil_video_mem: pil-video@9fc00000 {
626 no-map;
629 audio_mdf_mem: audio-mdf-region@ae000000 {
631 no-map;
634 firmware_mem: firmware-region@b0000000 {
636 no-map;
639 hyptz_reserved_mem: hyptz-reserved@beb00000 {
641 no-map;
644 scmi_mem: scmi-region@d0000000 {
646 no-map;
649 firmware_logs_mem: firmware-logs@d0040000 {
651 no-map;
654 firmware_audio_mem: firmware-audio@d0050000 {
656 no-map;
659 firmware_reserved_mem: firmware-reserved@d0054000 {
661 no-map;
664 firmware_quantum_test_mem: firmware-quantum-test@d00f0000 {
666 no-map;
671 no-map;
676 no-map;
679 deepsleep_backup_mem: deepsleep-backup@d1800000 {
681 no-map;
684 trusted_apps_mem: trusted-apps@d1900000 {
686 no-map;
689 tz_stat_mem: tz-stat@db100000 {
691 no-map;
694 cpucp_fw_mem: cpucp-fw@db200000 {
696 no-map;
700 smp2p-adsp {
701 compatible = "qcom,smp2p";
702 qcom,smem = <443>, <429>;
703 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
706 mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P>;
708 qcom,local-pid = <0>;
709 qcom,remote-pid = <2>;
711 smp2p_adsp_out: master-kernel {
712 qcom,entry-name = "master-kernel";
713 #qcom,smem-state-cells = <1>;
716 smp2p_adsp_in: slave-kernel {
717 qcom,entry-name = "slave-kernel";
718 interrupt-controller;
719 #interrupt-cells = <2>;
723 smp2p-cdsp0 {
724 compatible = "qcom,smp2p";
725 qcom,smem = <94>, <432>;
726 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
729 mboxes = <&ipcc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>;
731 qcom,local-pid = <0>;
732 qcom,remote-pid = <5>;
734 smp2p_cdsp0_out: master-kernel {
735 qcom,entry-name = "master-kernel";
736 #qcom,smem-state-cells = <1>;
739 smp2p_cdsp0_in: slave-kernel {
740 qcom,entry-name = "slave-kernel";
741 interrupt-controller;
742 #interrupt-cells = <2>;
746 smp2p-cdsp1 {
747 compatible = "qcom,smp2p";
748 qcom,smem = <617>, <616>;
749 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
752 mboxes = <&ipcc IPCC_CLIENT_NSP1 IPCC_MPROC_SIGNAL_SMP2P>;
754 qcom,local-pid = <0>;
755 qcom,remote-pid = <12>;
757 smp2p_cdsp1_out: master-kernel {
758 qcom,entry-name = "master-kernel";
759 #qcom,smem-state-cells = <1>;
762 smp2p_cdsp1_in: slave-kernel {
763 qcom,entry-name = "slave-kernel";
764 interrupt-controller;
765 #interrupt-cells = <2>;
769 smp2p-gpdsp0 {
770 compatible = "qcom,smp2p";
771 qcom,smem = <617>, <616>;
772 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
775 mboxes = <&ipcc IPCC_CLIENT_GPDSP0 IPCC_MPROC_SIGNAL_SMP2P>;
777 qcom,local-pid = <0>;
778 qcom,remote-pid = <17>;
780 smp2p_gpdsp0_out: master-kernel {
781 qcom,entry-name = "master-kernel";
782 #qcom,smem-state-cells = <1>;
785 smp2p_gpdsp0_in: slave-kernel {
786 qcom,entry-name = "slave-kernel";
787 interrupt-controller;
788 #interrupt-cells = <2>;
792 smp2p-gpdsp1 {
793 compatible = "qcom,smp2p";
794 qcom,smem = <617>, <616>;
795 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
798 mboxes = <&ipcc IPCC_CLIENT_GPDSP1 IPCC_MPROC_SIGNAL_SMP2P>;
800 qcom,local-pid = <0>;
801 qcom,remote-pid = <18>;
803 smp2p_gpdsp1_out: master-kernel {
804 qcom,entry-name = "master-kernel";
805 #qcom,smem-state-cells = <1>;
808 smp2p_gpdsp1_in: slave-kernel {
809 qcom,entry-name = "slave-kernel";
810 interrupt-controller;
811 #interrupt-cells = <2>;
816 compatible = "simple-bus";
817 #address-cells = <2>;
818 #size-cells = <2>;
821 gcc: clock-controller@100000 {
822 compatible = "qcom,sa8775p-gcc";
824 #clock-cells = <1>;
825 #reset-cells = <1>;
826 #power-domain-cells = <1>;
842 power-domains = <&rpmhpd SA8775P_CX>;
845 ipcc: mailbox@408000 { label
846 compatible = "qcom,sa8775p-ipcc", "qcom,ipcc";
849 interrupt-controller;
850 #interrupt-cells = <3>;
851 #mbox-cells = <2>;
855 compatible = "qcom,geni-se-qup";
860 clock-names = "m-ahb", "s-ahb";
862 #address-cells = <2>;
863 #size-cells = <2>;
867 compatible = "qcom,geni-i2c";
869 #address-cells = <1>;
870 #size-cells = <0>;
873 clock-names = "se";
880 interconnect-names = "qup-core",
881 "qup-config",
882 "qup-memory";
883 power-domains = <&rpmhpd SA8775P_CX>;
888 compatible = "qcom,geni-spi";
890 #address-cells = <1>;
891 #size-cells = <0>;
894 clock-names = "se";
901 interconnect-names = "qup-core",
902 "qup-config",
903 "qup-memory";
904 power-domains = <&rpmhpd SA8775P_CX>;
909 compatible = "qcom,geni-i2c";
911 #address-cells = <1>;
912 #size-cells = <0>;
915 clock-names = "se";
922 interconnect-names = "qup-core",
923 "qup-config",
924 "qup-memory";
925 power-domains = <&rpmhpd SA8775P_CX>;
930 compatible = "qcom,geni-spi";
932 #address-cells = <1>;
933 #size-cells = <0>;
936 clock-names = "se";
943 interconnect-names = "qup-core",
944 "qup-config",
945 "qup-memory";
946 power-domains = <&rpmhpd SA8775P_CX>;
951 compatible = "qcom,geni-i2c";
953 #address-cells = <1>;
954 #size-cells = <0>;
957 clock-names = "se";
964 interconnect-names = "qup-core",
965 "qup-config",
966 "qup-memory";
967 power-domains = <&rpmhpd SA8775P_CX>;
972 compatible = "qcom,geni-spi";
976 clock-names = "se";
983 interconnect-names = "qup-core",
984 "qup-config",
985 "qup-memory";
986 power-domains = <&rpmhpd SA8775P_CX>;
987 #address-cells = <1>;
988 #size-cells = <0>;
993 compatible = "qcom,geni-i2c";
995 #address-cells = <1>;
996 #size-cells = <0>;
999 clock-names = "se";
1006 interconnect-names = "qup-core",
1007 "qup-config",
1008 "qup-memory";
1009 power-domains = <&rpmhpd SA8775P_CX>;
1014 compatible = "qcom,geni-spi";
1016 #address-cells = <1>;
1017 #size-cells = <0>;
1020 clock-names = "se";
1027 interconnect-names = "qup-core",
1028 "qup-config",
1029 "qup-memory";
1030 power-domains = <&rpmhpd SA8775P_CX>;
1035 compatible = "qcom,geni-uart";
1039 clock-names = "se";
1044 interconnect-names = "qup-core", "qup-config";
1045 power-domains = <&rpmhpd SA8775P_CX>;
1050 compatible = "qcom,geni-i2c";
1054 clock-names = "se";
1061 interconnect-names = "qup-core",
1062 "qup-config",
1063 "qup-memory";
1064 power-domains = <&rpmhpd SA8775P_CX>;
1065 #address-cells = <1>;
1066 #size-cells = <0>;
1071 compatible = "qcom,geni-spi";
1073 #address-cells = <1>;
1074 #size-cells = <0>;
1077 clock-names = "se";
1084 interconnect-names = "qup-core",
1085 "qup-config",
1086 "qup-memory";
1087 power-domains = <&rpmhpd SA8775P_CX>;
1092 compatible = "qcom,geni-i2c";
1094 #address-cells = <1>;
1095 #size-cells = <0>;
1098 clock-names = "se";
1105 interconnect-names = "qup-core",
1106 "qup-config",
1107 "qup-memory";
1108 power-domains = <&rpmhpd SA8775P_CX>;
1113 compatible = "qcom,geni-spi";
1115 #address-cells = <1>;
1116 #size-cells = <0>;
1119 clock-names = "se";
1126 interconnect-names = "qup-core",
1127 "qup-config",
1128 "qup-memory";
1129 power-domains = <&rpmhpd SA8775P_CX>;
1134 compatible = "qcom,geni-i2c";
1136 #address-cells = <1>;
1137 #size-cells = <0>;
1140 clock-names = "se";
1147 interconnect-names = "qup-core",
1148 "qup-config",
1149 "qup-memory";
1150 power-domains = <&rpmhpd SA8775P_CX>;
1155 compatible = "qcom,geni-spi";
1157 #address-cells = <1>;
1158 #size-cells = <0>;
1161 clock-names = "se";
1168 interconnect-names = "qup-core",
1169 "qup-config",
1170 "qup-memory";
1171 power-domains = <&rpmhpd SA8775P_CX>;
1177 compatible = "qcom,geni-se-qup";
1179 #address-cells = <2>;
1180 #size-cells = <2>;
1182 clock-names = "m-ahb", "s-ahb";
1189 compatible = "qcom,geni-i2c";
1191 #address-cells = <1>;
1192 #size-cells = <0>;
1195 clock-names = "se";
1202 interconnect-names = "qup-core",
1203 "qup-config",
1204 "qup-memory";
1205 power-domains = <&rpmhpd SA8775P_CX>;
1210 compatible = "qcom,geni-spi";
1212 #address-cells = <1>;
1213 #size-cells = <0>;
1216 clock-names = "se";
1223 interconnect-names = "qup-core",
1224 "qup-config",
1225 "qup-memory";
1226 power-domains = <&rpmhpd SA8775P_CX>;
1231 compatible = "qcom,geni-i2c";
1233 #address-cells = <1>;
1234 #size-cells = <0>;
1237 clock-names = "se";
1244 interconnect-names = "qup-core",
1245 "qup-config",
1246 "qup-memory";
1247 power-domains = <&rpmhpd SA8775P_CX>;
1252 compatible = "qcom,geni-spi";
1254 #address-cells = <1>;
1255 #size-cells = <0>;
1258 clock-names = "se";
1265 interconnect-names = "qup-core",
1266 "qup-config",
1267 "qup-memory";
1268 power-domains = <&rpmhpd SA8775P_CX>;
1273 compatible = "qcom,geni-i2c";
1275 #address-cells = <1>;
1276 #size-cells = <0>;
1279 clock-names = "se";
1286 interconnect-names = "qup-core",
1287 "qup-config",
1288 "qup-memory";
1289 power-domains = <&rpmhpd SA8775P_CX>;
1294 compatible = "qcom,geni-spi";
1296 #address-cells = <1>;
1297 #size-cells = <0>;
1300 clock-names = "se";
1307 interconnect-names = "qup-core",
1308 "qup-config",
1309 "qup-memory";
1310 power-domains = <&rpmhpd SA8775P_CX>;
1315 compatible = "qcom,geni-i2c";
1317 #address-cells = <1>;
1318 #size-cells = <0>;
1321 clock-names = "se";
1328 interconnect-names = "qup-core",
1329 "qup-config",
1330 "qup-memory";
1331 power-domains = <&rpmhpd SA8775P_CX>;
1336 compatible = "qcom,geni-spi";
1338 #address-cells = <1>;
1339 #size-cells = <0>;
1342 clock-names = "se";
1349 interconnect-names = "qup-core",
1350 "qup-config",
1351 "qup-memory";
1352 power-domains = <&rpmhpd SA8775P_CX>;
1357 compatible = "qcom,geni-i2c";
1359 #address-cells = <1>;
1360 #size-cells = <0>;
1363 clock-names = "se";
1370 interconnect-names = "qup-core",
1371 "qup-config",
1372 "qup-memory";
1373 power-domains = <&rpmhpd SA8775P_CX>;
1378 compatible = "qcom,geni-spi";
1380 #address-cells = <1>;
1381 #size-cells = <0>;
1384 clock-names = "se";
1391 interconnect-names = "qup-core",
1392 "qup-config",
1393 "qup-memory";
1394 power-domains = <&rpmhpd SA8775P_CX>;
1399 compatible = "qcom,geni-i2c";
1401 #address-cells = <1>;
1402 #size-cells = <0>;
1405 clock-names = "se";
1412 interconnect-names = "qup-core",
1413 "qup-config",
1414 "qup-memory";
1415 power-domains = <&rpmhpd SA8775P_CX>;
1420 compatible = "qcom,geni-spi";
1422 #address-cells = <1>;
1423 #size-cells = <0>;
1426 clock-names = "se";
1433 interconnect-names = "qup-core",
1434 "qup-config",
1435 "qup-memory";
1436 power-domains = <&rpmhpd SA8775P_CX>;
1441 compatible = "qcom,geni-uart";
1445 clock-names = "se";
1450 interconnect-names = "qup-core", "qup-config";
1451 power-domains = <&rpmhpd SA8775P_CX>;
1457 compatible = "qcom,geni-se-qup";
1459 #address-cells = <2>;
1460 #size-cells = <2>;
1462 clock-names = "m-ahb", "s-ahb";
1469 compatible = "qcom,geni-i2c";
1471 #address-cells = <1>;
1472 #size-cells = <0>;
1475 clock-names = "se";
1482 interconnect-names = "qup-core",
1483 "qup-config",
1484 "qup-memory";
1485 power-domains = <&rpmhpd SA8775P_CX>;
1490 compatible = "qcom,geni-spi";
1492 #address-cells = <1>;
1493 #size-cells = <0>;
1496 clock-names = "se";
1503 interconnect-names = "qup-core",
1504 "qup-config",
1505 "qup-memory";
1506 power-domains = <&rpmhpd SA8775P_CX>;
1511 compatible = "qcom,geni-i2c";
1513 #address-cells = <1>;
1514 #size-cells = <0>;
1517 clock-names = "se";
1524 interconnect-names = "qup-core",
1525 "qup-config",
1526 "qup-memory";
1527 power-domains = <&rpmhpd SA8775P_CX>;
1532 compatible = "qcom,geni-spi";
1534 #address-cells = <1>;
1535 #size-cells = <0>;
1538 clock-names = "se";
1545 interconnect-names = "qup-core",
1546 "qup-config",
1547 "qup-memory";
1548 power-domains = <&rpmhpd SA8775P_CX>;
1553 compatible = "qcom,geni-i2c";
1555 #address-cells = <1>;
1556 #size-cells = <0>;
1559 clock-names = "se";
1566 interconnect-names = "qup-core",
1567 "qup-config",
1568 "qup-memory";
1569 power-domains = <&rpmhpd SA8775P_CX>;
1574 compatible = "qcom,geni-spi";
1576 #address-cells = <1>;
1577 #size-cells = <0>;
1580 clock-names = "se";
1587 interconnect-names = "qup-core",
1588 "qup-config",
1589 "qup-memory";
1590 power-domains = <&rpmhpd SA8775P_CX>;
1595 compatible = "qcom,geni-uart";
1599 clock-names = "se";
1604 interconnect-names = "qup-core", "qup-config";
1605 power-domains = <&rpmhpd SA8775P_CX>;
1610 compatible = "qcom,geni-i2c";
1612 #address-cells = <1>;
1613 #size-cells = <0>;
1616 clock-names = "se";
1623 interconnect-names = "qup-core",
1624 "qup-config",
1625 "qup-memory";
1626 power-domains = <&rpmhpd SA8775P_CX>;
1631 compatible = "qcom,geni-spi";
1633 #address-cells = <1>;
1634 #size-cells = <0>;
1637 clock-names = "se";
1644 interconnect-names = "qup-core",
1645 "qup-config",
1646 "qup-memory";
1647 power-domains = <&rpmhpd SA8775P_CX>;
1652 compatible = "qcom,geni-uart";
1655 clock-names = "se";
1657 interconnect-names = "qup-core", "qup-config";
1662 power-domains = <&rpmhpd SA8775P_CX>;
1663 operating-points-v2 = <&qup_opp_table_100mhz>;
1668 compatible = "qcom,geni-i2c";
1670 #address-cells = <1>;
1671 #size-cells = <0>;
1674 clock-names = "se";
1681 interconnect-names = "qup-core",
1682 "qup-config",
1683 "qup-memory";
1684 power-domains = <&rpmhpd SA8775P_CX>;
1689 compatible = "qcom,geni-spi";
1691 #address-cells = <1>;
1692 #size-cells = <0>;
1695 clock-names = "se";
1702 interconnect-names = "qup-core",
1703 "qup-config",
1704 "qup-memory";
1705 power-domains = <&rpmhpd SA8775P_CX>;
1710 compatible = "qcom,geni-i2c";
1712 #address-cells = <1>;
1713 #size-cells = <0>;
1716 clock-names = "se";
1723 interconnect-names = "qup-core",
1724 "qup-config",
1725 "qup-memory";
1726 power-domains = <&rpmhpd SA8775P_CX>;
1731 compatible = "qcom,geni-spi";
1733 #address-cells = <1>;
1734 #size-cells = <0>;
1737 clock-names = "se";
1744 interconnect-names = "qup-core",
1745 "qup-config",
1746 "qup-memory";
1747 power-domains = <&rpmhpd SA8775P_CX>;
1752 compatible = "qcom,geni-uart";
1756 clock-names = "se";
1761 interconnect-names = "qup-core", "qup-config";
1762 power-domains = <&rpmhpd SA8775P_CX>;
1767 compatible = "qcom,geni-i2c";
1769 #address-cells = <1>;
1770 #size-cells = <0>;
1773 clock-names = "se";
1780 interconnect-names = "qup-core",
1781 "qup-config",
1782 "qup-memory";
1783 power-domains = <&rpmhpd SA8775P_CX>;
1789 compatible = "qcom,geni-se-qup";
1791 #address-cells = <2>;
1792 #size-cells = <2>;
1794 clock-names = "m-ahb", "s-ahb";
1801 compatible = "qcom,geni-i2c";
1803 #address-cells = <1>;
1804 #size-cells = <0>;
1807 clock-names = "se";
1814 interconnect-names = "qup-core",
1815 "qup-config",
1816 "qup-memory";
1817 power-domains = <&rpmhpd SA8775P_CX>;
1822 compatible = "qcom,geni-spi";
1824 #address-cells = <1>;
1825 #size-cells = <0>;
1828 clock-names = "se";
1835 interconnect-names = "qup-core",
1836 "qup-config",
1837 "qup-memory";
1838 power-domains = <&rpmhpd SA8775P_CX>;
1844 compatible = "qcom,sa8775p-trng", "qcom,trng";
1849 compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
1853 phy-names = "ufsphy";
1854 lanes-per-direction = <2>;
1855 #reset-cells = <1>;
1857 reset-names = "rst";
1858 power-domains = <&gcc UFS_PHY_GDSC>;
1859 required-opps = <&rpmhpd_opp_nom>;
1861 dma-coherent;
1870 clock-names = "core_clk",
1878 freq-table-hz = <75000000 300000000>,
1886 qcom,ice = <&ice>;
1891 compatible = "qcom,sa8775p-qmp-ufs-phy";
1900 clock-names = "ref", "ref_aux", "qref";
1901 power-domains = <&gcc UFS_PHY_GDSC>;
1903 reset-names = "ufsphy";
1904 #phy-cells = <0>;
1909 compatible = "qcom,sa8775p-inline-crypto-engine",
1910 "qcom,inline-crypto-engine";
1916 compatible = "arm,coresight-stm", "arm,primecell";
1919 reg-names = "stm-base", "stm-stimulus-base";
1922 clock-names = "apb_pclk";
1924 out-ports {
1927 remote-endpoint =
1935 compatible = "qcom,coresight-tpdm", "arm,primecell";
1939 clock-names = "apb_pclk";
1941 qcom,cmb-element-bits = <32>;
1942 qcom,cmb-msrs-num = <32>;
1944 out-ports {
1947 remote-endpoint =
1955 compatible = "qcom,coresight-tpda", "arm,primecell";
1959 clock-names = "apb_pclk";
1961 out-ports {
1964 remote-endpoint =
1970 in-ports {
1971 #address-cells = <1>;
1972 #size-cells = <0>;
1977 remote-endpoint =
1985 remote-endpoint =
1993 compatible = "qcom,coresight-tpdm", "arm,primecell";
1997 clock-names = "apb_pclk";
1999 qcom,cmb-element-bits = <32>;
2000 qcom,cmb-msrs-num = <32>;
2002 out-ports {
2005 remote-endpoint =
2013 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2017 clock-names = "apb_pclk";
2019 out-ports {
2022 remote-endpoint =
2028 in-ports {
2029 #address-cells = <1>;
2030 #size-cells = <0>;
2035 remote-endpoint =
2043 remote-endpoint =
2051 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2055 clock-names = "apb_pclk";
2057 out-ports {
2060 remote-endpoint =
2066 in-ports {
2067 #address-cells = <1>;
2068 #size-cells = <0>;
2073 remote-endpoint =
2081 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2085 clock-names = "apb_pclk";
2087 out-ports {
2090 remote-endpoint =
2096 in-ports {
2097 #address-cells = <1>;
2098 #size-cells = <0>;
2103 remote-endpoint =
2111 remote-endpoint =
2119 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2123 clock-names = "apb_pclk";
2125 out-ports {
2128 remote-endpoint =
2134 in-ports {
2135 #address-cells = <1>;
2136 #size-cells = <0>;
2141 remote-endpoint =
2149 remote-endpoint =
2157 compatible = "arm,coresight-tmc", "arm,primecell";
2161 clock-names = "apb_pclk";
2163 out-ports {
2166 remote-endpoint =
2172 in-ports {
2175 remote-endpoint =
2183 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
2187 clock-names = "apb_pclk";
2189 out-ports {
2190 #address-cells = <1>;
2191 #size-cells = <0>;
2196 remote-endpoint =
2202 in-ports {
2205 remote-endpoint =
2213 compatible = "qcom,coresight-tpda", "arm,primecell";
2217 clock-names = "apb_pclk";
2219 out-ports {
2222 remote-endpoint =
2228 in-ports {
2229 #address-cells = <1>;
2230 #size-cells = <0>;
2235 remote-endpoint =
2243 remote-endpoint =
2251 remote-endpoint =
2259 remote-endpoint =
2267 remote-endpoint =
2275 compatible = "qcom,coresight-tpdm", "arm,primecell";
2279 clock-names = "apb_pclk";
2281 qcom,cmb-element-bits = <64>;
2282 qcom,cmb-msrs-num = <32>;
2284 out-ports {
2287 remote-endpoint =
2295 compatible = "qcom,coresight-tpdm", "arm,primecell";
2299 clock-names = "apb_pclk";
2301 qcom,cmb-element-bits = <64>;
2302 qcom,cmb-msrs-num = <32>;
2304 out-ports {
2307 remote-endpoint =
2315 compatible = "qcom,coresight-tpdm", "arm,primecell";
2319 clock-names = "apb_pclk";
2321 qcom,cmb-element-bits = <64>;
2322 qcom,cmb-msrs-num = <32>;
2324 out-ports {
2327 remote-endpoint =
2335 compatible = "qcom,coresight-tpdm", "arm,primecell";
2339 clock-names = "apb_pclk";
2341 qcom,cmb-element-bits = <64>;
2342 qcom,cmb-msrs-num = <32>;
2344 out-ports {
2347 remote-endpoint =
2355 compatible = "qcom,coresight-tpdm", "arm,primecell";
2359 clock-names = "apb_pclk";
2361 qcom,dsb-element-bits = <32>;
2362 qcom,dsb-msrs-num = <32>;
2364 out-ports {
2367 remote-endpoint =
2375 compatible = "arm,coresight-cti", "arm,primecell";
2379 clock-names = "apb_pclk";
2388 clock-names = "apb_pclk";
2389 arm,coresight-loses-context-with-cpu;
2390 qcom,skip-power-up;
2392 out-ports {
2395 remote-endpoint =
2408 clock-names = "apb_pclk";
2409 arm,coresight-loses-context-with-cpu;
2410 qcom,skip-power-up;
2412 out-ports {
2415 remote-endpoint =
2428 clock-names = "apb_pclk";
2429 arm,coresight-loses-context-with-cpu;
2430 qcom,skip-power-up;
2432 out-ports {
2435 remote-endpoint =
2448 clock-names = "apb_pclk";
2449 arm,coresight-loses-context-with-cpu;
2450 qcom,skip-power-up;
2452 out-ports {
2455 remote-endpoint =
2468 clock-names = "apb_pclk";
2469 arm,coresight-loses-context-with-cpu;
2470 qcom,skip-power-up;
2472 out-ports {
2475 remote-endpoint =
2488 clock-names = "apb_pclk";
2489 arm,coresight-loses-context-with-cpu;
2490 qcom,skip-power-up;
2492 out-ports {
2495 remote-endpoint =
2508 clock-names = "apb_pclk";
2509 arm,coresight-loses-context-with-cpu;
2510 qcom,skip-power-up;
2512 out-ports {
2515 remote-endpoint =
2528 clock-names = "apb_pclk";
2529 arm,coresight-loses-context-with-cpu;
2530 qcom,skip-power-up;
2532 out-ports {
2535 remote-endpoint =
2543 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2547 clock-names = "apb_pclk";
2549 out-ports {
2552 remote-endpoint =
2558 in-ports {
2559 #address-cells = <1>;
2560 #size-cells = <0>;
2565 remote-endpoint =
2573 remote-endpoint =
2581 remote-endpoint =
2589 remote-endpoint =
2597 remote-endpoint =
2605 remote-endpoint =
2613 remote-endpoint =
2621 remote-endpoint =
2629 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2633 clock-names = "apb_pclk";
2635 out-ports {
2638 remote-endpoint =
2644 in-ports {
2645 #address-cells = <1>;
2646 #size-cells = <0>;
2651 remote-endpoint =
2659 remote-endpoint =
2667 compatible = "qcom,coresight-tpdm", "arm,primecell";
2671 clock-names = "apb_pclk";
2673 qcom,cmb-element-bits = <64>;
2674 qcom,cmb-msrs-num = <32>;
2676 out-ports {
2679 remote-endpoint =
2687 compatible = "qcom,coresight-tpdm", "arm,primecell";
2691 clock-names = "apb_pclk";
2693 qcom,dsb-element-bits = <32>;
2694 qcom,dsb-msrs-num = <32>;
2696 out-ports {
2699 remote-endpoint =
2707 compatible = "qcom,coresight-tpda", "arm,primecell";
2711 clock-names = "apb_pclk";
2713 out-ports {
2716 remote-endpoint =
2722 in-ports {
2723 #address-cells = <1>;
2724 #size-cells = <0>;
2729 remote-endpoint =
2737 remote-endpoint =
2745 remote-endpoint =
2753 remote-endpoint =
2761 remote-endpoint =
2769 compatible = "qcom,coresight-tpdm", "arm,primecell";
2773 clock-names = "apb_pclk";
2775 qcom,cmb-element-bits = <32>;
2776 qcom,cmb-msrs-num = <32>;
2778 out-ports {
2781 remote-endpoint =
2789 compatible = "qcom,coresight-tpdm", "arm,primecell";
2793 clock-names = "apb_pclk";
2795 qcom,cmb-element-bits = <32>;
2796 qcom,cmb-msrs-num = <32>;
2798 out-ports {
2801 remote-endpoint =
2809 compatible = "qcom,coresight-tpdm", "arm,primecell";
2813 clock-names = "apb_pclk";
2815 qcom,dsb-element-bits = <32>;
2816 qcom,dsb-msrs-num = <32>;
2818 out-ports {
2821 remote-endpoint =
2829 compatible = "qcom,sa8775p-usb-hs-phy",
2830 "qcom,usb-snps-hs-5nm-phy";
2833 clock-names = "ref";
2836 #phy-cells = <0>;
2842 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
2849 clock-names = "aux", "ref", "com_aux", "pipe";
2853 reset-names = "phy", "phy_phy";
2855 power-domains = <&gcc USB30_PRIM_GDSC>;
2857 #clock-cells = <0>;
2858 clock-output-names = "usb3_prim_phy_pipe_clk_src";
2860 #phy-cells = <0>;
2866 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
2868 #address-cells = <2>;
2869 #size-cells = <2>;
2877 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
2879 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
2881 assigned-clock-rates = <19200000>, <200000000>;
2883 interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
2888 interrupt-names = "pwr_event",
2894 power-domains = <&gcc USB30_PRIM_GDSC>;
2895 required-opps = <&rpmhpd_opp_nom>;
2901 interconnect-names = "usb-ddr", "apps-usb";
2903 wakeup-source;
2913 phy-names = "usb2-phy", "usb3-phy";
2918 compatible = "qcom,sa8775p-usb-hs-phy",
2919 "qcom,usb-snps-hs-5nm-phy";
2922 clock-names = "ref";
2925 #phy-cells = <0>;
2931 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
2938 clock-names = "aux", "ref", "com_aux", "pipe";
2942 reset-names = "phy", "phy_phy";
2944 power-domains = <&gcc USB30_SEC_GDSC>;
2946 #clock-cells = <0>;
2947 clock-output-names = "usb3_sec_phy_pipe_clk_src";
2949 #phy-cells = <0>;
2955 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
2957 #address-cells = <2>;
2958 #size-cells = <2>;
2966 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
2968 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
2970 assigned-clock-rates = <19200000>, <200000000>;
2972 interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
2977 interrupt-names = "pwr_event",
2983 power-domains = <&gcc USB30_SEC_GDSC>;
2984 required-opps = <&rpmhpd_opp_nom>;
2990 interconnect-names = "usb-ddr", "apps-usb";
2992 wakeup-source;
3002 phy-names = "usb2-phy", "usb3-phy";
3007 compatible = "qcom,sa8775p-usb-hs-phy",
3008 "qcom,usb-snps-hs-5nm-phy";
3011 clock-names = "ref";
3014 #phy-cells = <0>;
3020 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3022 #address-cells = <2>;
3023 #size-cells = <2>;
3031 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3033 assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
3035 assigned-clock-rates = <19200000>, <200000000>;
3037 interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
3041 interrupt-names = "pwr_event",
3046 power-domains = <&gcc USB20_PRIM_GDSC>;
3047 required-opps = <&rpmhpd_opp_nom>;
3053 interconnect-names = "usb-ddr", "apps-usb";
3055 wakeup-source;
3065 phy-names = "usb2-phy";
3070 compatible = "qcom,tcsr-mutex";
3072 #hwlock-cells = <1>;
3075 gpucc: clock-controller@3d90000 {
3076 compatible = "qcom,sa8775p-gpucc";
3081 clock-names = "bi_tcxo",
3084 #clock-cells = <1>;
3085 #reset-cells = <1>;
3086 #power-domain-cells = <1>;
3090 compatible = "qcom,sa8775p-smmu-500", "qcom,adreno-smmu",
3091 "qcom,smmu-500", "arm,mmu-500";
3093 #iommu-cells = <2>;
3094 #global-interrupts = <2>;
3095 dma-coherent;
3096 power-domains = <&gpucc GPU_CC_CX_GDSC>;
3104 clock-names = "gcc_gpu_memnoc_gfx_clk",
3126 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
3129 clock-names = "sgmi_ref";
3130 #phy-cells = <0>;
3135 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
3138 clock-names = "sgmi_ref";
3139 #phy-cells = <0>;
3144 compatible = "qcom,sa8775p-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
3150 operating-points-v2 = <&llcc_bwmon_opp_table>;
3152 llcc_bwmon_opp_table: opp-table {
3153 compatible = "operating-points-v2";
3155 opp-0 {
3156 opp-peak-kBps = <762000>;
3159 opp-1 {
3160 opp-peak-kBps = <1720000>;
3163 opp-2 {
3164 opp-peak-kBps = <2086000>;
3167 opp-3 {
3168 opp-peak-kBps = <2601000>;
3171 opp-4 {
3172 opp-peak-kBps = <2929000>;
3175 opp-5 {
3176 opp-peak-kBps = <5931000>;
3179 opp-6 {
3180 opp-peak-kBps = <6515000>;
3183 opp-7 {
3184 opp-peak-kBps = <7984000>;
3187 opp-8 {
3188 opp-peak-kBps = <10437000>;
3191 opp-9 {
3192 opp-peak-kBps = <12195000>;
3198 compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
3204 operating-points-v2 = <&cpu_bwmon_opp_table>;
3206 cpu_bwmon_opp_table: opp-table {
3207 compatible = "operating-points-v2";
3209 opp-0 {
3210 opp-peak-kBps = <9155000>;
3213 opp-1 {
3214 opp-peak-kBps = <12298000>;
3217 opp-2 {
3218 opp-peak-kBps = <14236000>;
3221 opp-3 {
3222 opp-peak-kBps = <16265000>;
3229 compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
3235 operating-points-v2 = <&cpu_bwmon_opp_table>;
3238 llcc: system-cache-controller@9200000 {
3239 compatible = "qcom,sa8775p-llcc";
3247 reg-names = "llcc0_base",
3257 pdc: interrupt-controller@b220000 {
3258 compatible = "qcom,sa8775p-pdc", "qcom,pdc";
3261 qcom,pdc-ranges = <0 480 40>,
3299 #interrupt-cells = <2>;
3300 interrupt-parent = <&intc>;
3301 interrupt-controller;
3304 tsens2: thermal-sensor@c251000 {
3305 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3310 #qcom,sensors = <13>;
3311 interrupt-names = "uplow", "critical";
3312 #thermal-sensor-cells = <1>;
3315 tsens3: thermal-sensor@c252000 {
3316 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3321 #qcom,sensors = <13>;
3322 interrupt-names = "uplow", "critical";
3323 #thermal-sensor-cells = <1>;
3326 tsens0: thermal-sensor@c263000 {
3327 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3332 #qcom,sensors = <12>;
3333 interrupt-names = "uplow", "critical";
3334 #thermal-sensor-cells = <1>;
3337 tsens1: thermal-sensor@c265000 {
3338 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3343 #qcom,sensors = <12>;
3344 interrupt-names = "uplow", "critical";
3345 #thermal-sensor-cells = <1>;
3348 aoss_qmp: power-management@c300000 {
3349 compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
3351 interrupts-extended = <&ipcc IPCC_CLIENT_AOP
3354 mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
3355 #clock-cells = <0>;
3359 compatible = "qcom,rpmh-stats";
3364 compatible = "qcom,spmi-pmic-arb";
3370 reg-names = "core",
3375 qcom,channel = <0>;
3376 qcom,ee = <0>;
3377 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3378 interrupt-names = "periph_irq";
3379 interrupt-controller;
3380 #interrupt-cells = <4>;
3381 #address-cells = <2>;
3382 #size-cells = <0>;
3386 compatible = "qcom,sa8775p-tlmm";
3389 gpio-controller;
3390 #gpio-cells = <2>;
3391 interrupt-controller;
3392 #interrupt-cells = <2>;
3393 gpio-ranges = <&tlmm 0 0 149>;
3394 wakeup-parent = <&pdc>;
3398 compatible = "qcom,sa8775p-imem", "syscon", "simple-mfd";
3402 #address-cells = <1>;
3403 #size-cells = <1>;
3405 pil-reloc@94c {
3406 compatible = "qcom,pil-reloc-info";
3412 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
3414 #iommu-cells = <2>;
3415 #global-interrupts = <2>;
3416 dma-coherent;
3551 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
3553 #iommu-cells = <2>;
3554 #global-interrupts = <2>;
3555 dma-coherent;
3625 intc: interrupt-controller@17a00000 {
3626 compatible = "arm,gic-v3";
3629 interrupt-controller;
3630 #interrupt-cells = <3>;
3632 #redistributor-regions = <1>;
3633 redistributor-stride = <0x0 0x20000>;
3637 compatible = "qcom,apss-wdt-sa8775p", "qcom,kpss-wdt";
3644 compatible = "arm,armv7-timer-mem";
3647 #address-cells = <1>;
3648 #size-cells = <1>;
3655 frame-number = <0>;
3661 frame-number = <1>;
3668 frame-number = <2>;
3675 frame-number = <3>;
3682 frame-number = <4>;
3689 frame-number = <5>;
3696 frame-number = <6>;
3702 compatible = "qcom,rpmh-rsc";
3706 reg-names = "drv-0", "drv-1", "drv-2";
3710 qcom,tcs-offset = <0xd00>;
3711 qcom,drv-id = <2>;
3712 qcom,tcs-config = <ACTIVE_TCS 2>,
3718 apps_bcm_voter: bcm-voter {
3719 compatible = "qcom,bcm-voter";
3722 rpmhcc: clock-controller {
3723 compatible = "qcom,sa8775p-rpmh-clk";
3724 #clock-cells = <1>;
3725 clock-names = "xo";
3729 rpmhpd: power-controller {
3730 compatible = "qcom,sa8775p-rpmhpd";
3731 #power-domain-cells = <1>;
3732 operating-points-v2 = <&rpmhpd_opp_table>;
3734 rpmhpd_opp_table: opp-table {
3735 compatible = "operating-points-v2";
3737 rpmhpd_opp_ret: opp-0 {
3738 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
3741 rpmhpd_opp_min_svs: opp-1 {
3742 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
3746 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
3750 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
3753 rpmhpd_opp_svs_l1: opp-4 {
3754 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
3757 rpmhpd_opp_nom: opp-5 {
3758 opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
3761 rpmhpd_opp_nom_l1: opp-6 {
3762 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
3765 rpmhpd_opp_nom_l2: opp-7 {
3766 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
3769 rpmhpd_opp_turbo: opp-8 {
3770 opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
3773 rpmhpd_opp_turbo_l1: opp-9 {
3774 opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
3781 compatible = "qcom,sa8775p-cpufreq-epss",
3782 "qcom,cpufreq-epss";
3785 reg-names = "freq-domain0", "freq-domain1";
3788 clock-names = "xo", "alternate";
3790 #freq-domain-cells = <1>;
3794 compatible = "qcom,sa8775p-gpdsp0-pas";
3797 interrupts-extended = <&intc GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
3802 interrupt-names = "wdog", "fatal", "ready",
3803 "handover", "stop-ack";
3806 clock-names = "xo";
3808 power-domains = <&rpmhpd RPMHPD_CX>,
3810 power-domain-names = "cx", "mxc";
3815 memory-region = <&pil_gdsp0_mem>;
3817 qcom,qmp = <&aoss_qmp>;
3819 qcom,smem-states = <&smp2p_gpdsp0_out 0>;
3820 qcom,smem-state-names = "stop";
3824 glink-edge {
3825 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
3828 mboxes = <&ipcc IPCC_CLIENT_GPDSP0
3832 qcom,remote-pid = <17>;
3837 compatible = "qcom,sa8775p-gpdsp1-pas";
3840 interrupts-extended = <&intc GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
3845 interrupt-names = "wdog", "fatal", "ready",
3846 "handover", "stop-ack";
3849 clock-names = "xo";
3851 power-domains = <&rpmhpd RPMHPD_CX>,
3853 power-domain-names = "cx", "mxc";
3858 memory-region = <&pil_gdsp1_mem>;
3860 qcom,qmp = <&aoss_qmp>;
3862 qcom,smem-states = <&smp2p_gpdsp1_out 0>;
3863 qcom,smem-state-names = "stop";
3867 glink-edge {
3868 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
3871 mboxes = <&ipcc IPCC_CLIENT_GPDSP1
3875 qcom,remote-pid = <18>;
3880 compatible = "qcom,sa8775p-ethqos";
3883 reg-names = "stmmaceth", "rgmii";
3887 interrupt-names = "macirq", "sfty";
3893 clock-names = "stmmaceth",
3902 interconnect-names = "mac-mem", "cpu-mac";
3904 power-domains = <&gcc EMAC1_GDSC>;
3907 phy-names = "serdes";
3910 dma-coherent;
3914 rx-fifo-depth = <16384>;
3915 tx-fifo-depth = <16384>;
3921 compatible = "qcom,sa8775p-ethqos";
3924 reg-names = "stmmaceth", "rgmii";
3928 interrupt-names = "macirq", "sfty";
3934 clock-names = "stmmaceth",
3943 interconnect-names = "mac-mem", "cpu-mac";
3945 power-domains = <&gcc EMAC0_GDSC>;
3948 phy-names = "serdes";
3951 dma-coherent;
3955 rx-fifo-depth = <16384>;
3956 tx-fifo-depth = <16384>;
3962 compatible = "qcom,sa8775p-cdsp0-pas";
3965 interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
3970 interrupt-names = "wdog", "fatal", "ready",
3971 "handover", "stop-ack";
3974 clock-names = "xo";
3976 power-domains = <&rpmhpd RPMHPD_CX>,
3979 power-domain-names = "cx", "mxc", "nsp";
3984 memory-region = <&pil_cdsp0_mem>;
3986 qcom,qmp = <&aoss_qmp>;
3988 qcom,smem-states = <&smp2p_cdsp0_out 0>;
3989 qcom,smem-state-names = "stop";
3993 glink-edge {
3994 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
3997 mboxes = <&ipcc IPCC_CLIENT_CDSP
4001 qcom,remote-pid = <5>;
4004 compatible = "qcom,fastrpc";
4005 qcom,glink-channels = "fastrpcglink-apps-dsp";
4007 #address-cells = <1>;
4008 #size-cells = <0>;
4010 compute-cb@1 {
4011 compatible = "qcom,fastrpc-compute-cb";
4023 dma-coherent;
4026 compute-cb@2 {
4027 compatible = "qcom,fastrpc-compute-cb";
4039 dma-coherent;
4042 compute-cb@3 {
4043 compatible = "qcom,fastrpc-compute-cb";
4055 dma-coherent;
4058 compute-cb@4 {
4059 compatible = "qcom,fastrpc-compute-cb";
4071 dma-coherent;
4074 compute-cb@5 {
4075 compatible = "qcom,fastrpc-compute-cb";
4087 dma-coherent;
4090 compute-cb@6 {
4091 compatible = "qcom,fastrpc-compute-cb";
4103 dma-coherent;
4106 compute-cb@7 {
4107 compatible = "qcom,fastrpc-compute-cb";
4119 dma-coherent;
4122 compute-cb@8 {
4123 compatible = "qcom,fastrpc-compute-cb";
4135 dma-coherent;
4138 compute-cb@9 {
4139 compatible = "qcom,fastrpc-compute-cb";
4151 dma-coherent;
4154 compute-cb@10 {
4155 compatible = "qcom,fastrpc-compute-cb";
4167 dma-coherent;
4170 compute-cb@11 {
4171 compatible = "qcom,fastrpc-compute-cb";
4183 dma-coherent;
4190 compatible = "qcom,sa8775p-cdsp1-pas";
4193 interrupts-extended = <&intc GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
4198 interrupt-names = "wdog", "fatal", "ready",
4199 "handover", "stop-ack";
4202 clock-names = "xo";
4204 power-domains = <&rpmhpd RPMHPD_CX>,
4207 power-domain-names = "cx", "mxc", "nsp";
4212 memory-region = <&pil_cdsp1_mem>;
4214 qcom,qmp = <&aoss_qmp>;
4216 qcom,smem-states = <&smp2p_cdsp1_out 0>;
4217 qcom,smem-state-names = "stop";
4221 glink-edge {
4222 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
4225 mboxes = <&ipcc IPCC_CLIENT_NSP1
4229 qcom,remote-pid = <12>;
4232 compatible = "qcom,fastrpc";
4233 qcom,glink-channels = "fastrpcglink-apps-dsp";
4235 #address-cells = <1>;
4236 #size-cells = <0>;
4238 compute-cb@1 {
4239 compatible = "qcom,fastrpc-compute-cb";
4251 dma-coherent;
4254 compute-cb@2 {
4255 compatible = "qcom,fastrpc-compute-cb";
4267 dma-coherent;
4270 compute-cb@3 {
4271 compatible = "qcom,fastrpc-compute-cb";
4283 dma-coherent;
4286 compute-cb@4 {
4287 compatible = "qcom,fastrpc-compute-cb";
4299 dma-coherent;
4302 compute-cb@5 {
4303 compatible = "qcom,fastrpc-compute-cb";
4315 dma-coherent;
4318 compute-cb@6 {
4319 compatible = "qcom,fastrpc-compute-cb";
4331 dma-coherent;
4334 compute-cb@7 {
4335 compatible = "qcom,fastrpc-compute-cb";
4347 dma-coherent;
4350 compute-cb@8 {
4351 compatible = "qcom,fastrpc-compute-cb";
4363 dma-coherent;
4366 compute-cb@9 {
4367 compatible = "qcom,fastrpc-compute-cb";
4379 dma-coherent;
4382 compute-cb@10 {
4383 compatible = "qcom,fastrpc-compute-cb";
4395 dma-coherent;
4398 compute-cb@11 {
4399 compatible = "qcom,fastrpc-compute-cb";
4411 dma-coherent;
4414 compute-cb@12 {
4415 compatible = "qcom,fastrpc-compute-cb";
4427 dma-coherent;
4430 compute-cb@13 {
4431 compatible = "qcom,fastrpc-compute-cb";
4443 dma-coherent;
4450 compatible = "qcom,sa8775p-adsp-pas";
4453 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
4458 interrupt-names = "wdog", "fatal", "ready", "handover",
4459 "stop-ack";
4462 clock-names = "xo";
4464 power-domains = <&rpmhpd RPMHPD_LCX>,
4466 power-domain-names = "lcx", "lmx";
4470 memory-region = <&pil_adsp_mem>;
4472 qcom,qmp = <&aoss_qmp>;
4474 qcom,smem-states = <&smp2p_adsp_out 0>;
4475 qcom,smem-state-names = "stop";
4479 remoteproc_adsp_glink: glink-edge {
4480 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
4483 mboxes = <&ipcc IPCC_CLIENT_LPASS
4487 qcom,remote-pid = <2>;
4490 compatible = "qcom,fastrpc";
4491 qcom,glink-channels = "fastrpcglink-apps-dsp";
4493 memory-region = <&adsp_rpc_remote_heap_mem>;
4494 qcom,vmids = <QCOM_SCM_VMID_LPASS
4496 #address-cells = <1>;
4497 #size-cells = <0>;
4499 compute-cb@3 {
4500 compatible = "qcom,fastrpc-compute-cb";
4503 dma-coherent;
4506 compute-cb@4 {
4507 compatible = "qcom,fastrpc-compute-cb";
4510 dma-coherent;
4513 compute-cb@5 {
4514 compatible = "qcom,fastrpc-compute-cb";
4517 qcom,nsessions = <5>;
4518 dma-coherent;
4525 thermal-zones {
4526 aoss-0-thermal {
4527 thermal-sensors = <&tsens0 0>;
4530 trip-point0 {
4536 trip-point1 {
4544 cpu-0-0-0-thermal {
4545 polling-delay-passive = <10>;
4547 thermal-sensors = <&tsens0 1>;
4550 trip-point0 {
4556 trip-point1 {
4564 cpu-0-1-0-thermal {
4565 polling-delay-passive = <10>;
4567 thermal-sensors = <&tsens0 2>;
4570 trip-point0 {
4576 trip-point1 {
4584 cpu-0-2-0-thermal {
4585 polling-delay-passive = <10>;
4587 thermal-sensors = <&tsens0 3>;
4590 trip-point0 {
4596 trip-point1 {
4604 cpu-0-3-0-thermal {
4605 polling-delay-passive = <10>;
4607 thermal-sensors = <&tsens0 4>;
4610 trip-point0 {
4616 trip-point1 {
4624 gpuss-0-thermal {
4625 polling-delay-passive = <10>;
4627 thermal-sensors = <&tsens0 5>;
4630 trip-point0 {
4636 trip-point1 {
4644 gpuss-1-thermal {
4645 polling-delay-passive = <10>;
4647 thermal-sensors = <&tsens0 6>;
4650 trip-point0 {
4656 trip-point1 {
4664 gpuss-2-thermal {
4665 polling-delay-passive = <10>;
4667 thermal-sensors = <&tsens0 7>;
4670 trip-point0 {
4676 trip-point1 {
4684 audio-thermal {
4685 thermal-sensors = <&tsens0 8>;
4688 trip-point0 {
4694 trip-point1 {
4702 camss-0-thermal {
4703 thermal-sensors = <&tsens0 9>;
4706 trip-point0 {
4712 trip-point1 {
4720 pcie-0-thermal {
4721 thermal-sensors = <&tsens0 10>;
4724 trip-point0 {
4730 trip-point1 {
4738 cpuss-0-0-thermal {
4739 thermal-sensors = <&tsens0 11>;
4742 trip-point0 {
4748 trip-point1 {
4756 aoss-1-thermal {
4757 thermal-sensors = <&tsens1 0>;
4760 trip-point0 {
4766 trip-point1 {
4774 cpu-0-0-1-thermal {
4775 polling-delay-passive = <10>;
4777 thermal-sensors = <&tsens1 1>;
4780 trip-point0 {
4786 trip-point1 {
4794 cpu-0-1-1-thermal {
4795 polling-delay-passive = <10>;
4797 thermal-sensors = <&tsens1 2>;
4800 trip-point0 {
4806 trip-point1 {
4814 cpu-0-2-1-thermal {
4815 polling-delay-passive = <10>;
4817 thermal-sensors = <&tsens1 3>;
4820 trip-point0 {
4826 trip-point1 {
4834 cpu-0-3-1-thermal {
4835 polling-delay-passive = <10>;
4837 thermal-sensors = <&tsens1 4>;
4840 trip-point0 {
4846 trip-point1 {
4854 gpuss-3-thermal {
4855 polling-delay-passive = <10>;
4857 thermal-sensors = <&tsens1 5>;
4860 trip-point0 {
4866 trip-point1 {
4874 gpuss-4-thermal {
4875 polling-delay-passive = <10>;
4877 thermal-sensors = <&tsens1 6>;
4880 trip-point0 {
4886 trip-point1 {
4894 gpuss-5-thermal {
4895 polling-delay-passive = <10>;
4897 thermal-sensors = <&tsens1 7>;
4900 trip-point0 {
4906 trip-point1 {
4914 video-thermal {
4915 thermal-sensors = <&tsens1 8>;
4918 trip-point0 {
4924 trip-point1 {
4932 camss-1-thermal {
4933 thermal-sensors = <&tsens1 9>;
4936 trip-point0 {
4942 trip-point1 {
4950 pcie-1-thermal {
4951 thermal-sensors = <&tsens1 10>;
4954 trip-point0 {
4960 trip-point1 {
4968 cpuss-0-1-thermal {
4969 thermal-sensors = <&tsens1 11>;
4972 trip-point0 {
4978 trip-point1 {
4986 aoss-2-thermal {
4987 thermal-sensors = <&tsens2 0>;
4990 trip-point0 {
4996 trip-point1 {
5004 cpu-1-0-0-thermal {
5005 polling-delay-passive = <10>;
5007 thermal-sensors = <&tsens2 1>;
5010 trip-point0 {
5016 trip-point1 {
5024 cpu-1-1-0-thermal {
5025 polling-delay-passive = <10>;
5027 thermal-sensors = <&tsens2 2>;
5030 trip-point0 {
5036 trip-point1 {
5044 cpu-1-2-0-thermal {
5045 polling-delay-passive = <10>;
5047 thermal-sensors = <&tsens2 3>;
5050 trip-point0 {
5056 trip-point1 {
5064 cpu-1-3-0-thermal {
5065 polling-delay-passive = <10>;
5067 thermal-sensors = <&tsens2 4>;
5070 trip-point0 {
5076 trip-point1 {
5084 nsp-0-0-0-thermal {
5085 polling-delay-passive = <10>;
5087 thermal-sensors = <&tsens2 5>;
5090 trip-point0 {
5096 trip-point1 {
5104 nsp-0-1-0-thermal {
5105 polling-delay-passive = <10>;
5107 thermal-sensors = <&tsens2 6>;
5110 trip-point0 {
5116 trip-point1 {
5124 nsp-0-2-0-thermal {
5125 polling-delay-passive = <10>;
5127 thermal-sensors = <&tsens2 7>;
5130 trip-point0 {
5136 trip-point1 {
5144 nsp-1-0-0-thermal {
5145 polling-delay-passive = <10>;
5147 thermal-sensors = <&tsens2 8>;
5150 trip-point0 {
5156 trip-point1 {
5164 nsp-1-1-0-thermal {
5165 polling-delay-passive = <10>;
5167 thermal-sensors = <&tsens2 9>;
5170 trip-point0 {
5176 trip-point1 {
5184 nsp-1-2-0-thermal {
5185 polling-delay-passive = <10>;
5187 thermal-sensors = <&tsens2 10>;
5190 trip-point0 {
5196 trip-point1 {
5204 ddrss-0-thermal {
5205 thermal-sensors = <&tsens2 11>;
5208 trip-point0 {
5214 trip-point1 {
5222 cpuss-1-0-thermal {
5223 thermal-sensors = <&tsens2 12>;
5226 trip-point0 {
5232 trip-point1 {
5240 aoss-3-thermal {
5241 thermal-sensors = <&tsens3 0>;
5244 trip-point0 {
5250 trip-point1 {
5258 cpu-1-0-1-thermal {
5259 polling-delay-passive = <10>;
5261 thermal-sensors = <&tsens3 1>;
5264 trip-point0 {
5270 trip-point1 {
5278 cpu-1-1-1-thermal {
5279 polling-delay-passive = <10>;
5281 thermal-sensors = <&tsens3 2>;
5284 trip-point0 {
5290 trip-point1 {
5298 cpu-1-2-1-thermal {
5299 polling-delay-passive = <10>;
5301 thermal-sensors = <&tsens3 3>;
5304 trip-point0 {
5310 trip-point1 {
5318 cpu-1-3-1-thermal {
5319 polling-delay-passive = <10>;
5321 thermal-sensors = <&tsens3 4>;
5324 trip-point0 {
5330 trip-point1 {
5338 nsp-0-0-1-thermal {
5339 polling-delay-passive = <10>;
5341 thermal-sensors = <&tsens3 5>;
5344 trip-point0 {
5350 trip-point1 {
5358 nsp-0-1-1-thermal {
5359 polling-delay-passive = <10>;
5361 thermal-sensors = <&tsens3 6>;
5364 trip-point0 {
5370 trip-point1 {
5378 nsp-0-2-1-thermal {
5379 polling-delay-passive = <10>;
5381 thermal-sensors = <&tsens3 7>;
5384 trip-point0 {
5390 trip-point1 {
5398 nsp-1-0-1-thermal {
5399 polling-delay-passive = <10>;
5401 thermal-sensors = <&tsens3 8>;
5404 trip-point0 {
5410 trip-point1 {
5418 nsp-1-1-1-thermal {
5419 polling-delay-passive = <10>;
5421 thermal-sensors = <&tsens3 9>;
5424 trip-point0 {
5430 trip-point1 {
5438 nsp-1-2-1-thermal {
5439 polling-delay-passive = <10>;
5441 thermal-sensors = <&tsens3 10>;
5444 trip-point0 {
5450 trip-point1 {
5458 ddrss-1-thermal {
5459 thermal-sensors = <&tsens3 11>;
5462 trip-point0 {
5468 trip-point1 {
5476 cpuss-1-1-thermal {
5477 thermal-sensors = <&tsens3 12>;
5480 trip-point0 {
5486 trip-point1 {
5496 compatible = "arm,armv8-timer";
5504 compatible = "qcom,pcie-sa8775p";
5511 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
5514 #address-cells = <3>;
5515 #size-cells = <2>;
5518 bus-range = <0x00 0xff>;
5520 dma-coherent;
5522 linux,pci-domain = <0>;
5523 num-lanes = <2>;
5533 interrupt-names = "msi0", "msi1", "msi2", "msi3",
5535 #interrupt-cells = <1>;
5536 interrupt-map-mask = <0 0 0 0x7>;
5537 interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
5548 clock-names = "aux",
5554 assigned-clocks = <&gcc GCC_PCIE_0_AUX_CLK>;
5555 assigned-clock-rates = <19200000>;
5559 interconnect-names = "pcie-mem", "cpu-pcie";
5561 iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
5565 reset-names = "pci";
5566 power-domains = <&gcc PCIE_0_GDSC>;
5569 phy-names = "pciephy";
5576 bus-range = <0x01 0xff>;
5578 #address-cells = <3>;
5579 #size-cells = <2>;
5584 pcie0_ep: pcie-ep@1c00000 {
5585 compatible = "qcom,sa8775p-pcie-ep";
5593 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
5602 clock-names = "aux",
5612 interrupt-names = "global", "doorbell", "dma";
5616 interconnect-names = "pcie-mem", "cpu-pcie";
5618 dma-coherent;
5621 reset-names = "core";
5622 power-domains = <&gcc PCIE_0_GDSC>;
5624 phy-names = "pciephy";
5625 max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
5626 num-lanes = <2>;
5632 compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy";
5643 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
5646 assigned-clocks = <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>;
5647 assigned-clock-rates = <100000000>;
5650 reset-names = "phy";
5652 #clock-cells = <0>;
5653 clock-output-names = "pcie_0_pipe_clk";
5655 #phy-cells = <0>;
5661 compatible = "qcom,pcie-sa8775p";
5668 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
5671 #address-cells = <3>;
5672 #size-cells = <2>;
5675 bus-range = <0x00 0xff>;
5677 dma-coherent;
5679 linux,pci-domain = <1>;
5680 num-lanes = <4>;
5690 interrupt-names = "msi0", "msi1", "msi2", "msi3",
5692 #interrupt-cells = <1>;
5693 interrupt-map-mask = <0 0 0 0x7>;
5694 interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
5705 clock-names = "aux",
5711 assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
5712 assigned-clock-rates = <19200000>;
5716 interconnect-names = "pcie-mem", "cpu-pcie";
5718 iommu-map = <0x0 &pcie_smmu 0x0080 0x1>,
5722 reset-names = "pci";
5723 power-domains = <&gcc PCIE_1_GDSC>;
5726 phy-names = "pciephy";
5733 bus-range = <0x01 0xff>;
5735 #address-cells = <3>;
5736 #size-cells = <2>;
5741 pcie1_ep: pcie-ep@1c10000 {
5742 compatible = "qcom,sa8775p-pcie-ep";
5750 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
5759 clock-names = "aux",
5769 interrupt-names = "global", "doorbell", "dma";
5773 interconnect-names = "pcie-mem", "cpu-pcie";
5775 dma-coherent;
5778 reset-names = "core";
5779 power-domains = <&gcc PCIE_1_GDSC>;
5781 phy-names = "pciephy";
5782 max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
5783 num-lanes = <4>;
5789 compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy";
5800 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
5803 assigned-clocks = <&gcc GCC_PCIE_1_PHY_RCHNG_CLK>;
5804 assigned-clock-rates = <100000000>;
5807 reset-names = "phy";
5809 #clock-cells = <0>;
5810 clock-output-names = "pcie_1_pipe_clk";
5812 #phy-cells = <0>;