Lines Matching +full:dsp +full:- +full:uart2 +full:- +full:rx
1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interconnect/qcom,icc.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
15 #include <dt-bindings/firmware/qcom,scm.h>
16 #include <dt-bindings/power/qcom,rpmhpd.h>
17 #include <dt-bindings/power/qcom-rpmpd.h>
18 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
21 interrupt-parent = <&intc>;
23 #address-cells = <2>;
24 #size-cells = <2>;
27 xo_board_clk: xo-board-clk {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
32 sleep_clk: sleep-clk {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
39 #address-cells = <2>;
40 #size-cells = <0>;
46 enable-method = "psci";
47 qcom,freq-domain = <&cpufreq_hw 0>;
48 next-level-cache = <&l2_0>;
49 capacity-dmips-mhz = <1024>;
50 dynamic-power-coefficient = <100>;
51 l2_0: l2-cache {
53 cache-level = <2>;
54 cache-unified;
55 next-level-cache = <&l3_0>;
56 l3_0: l3-cache {
58 cache-level = <3>;
59 cache-unified;
68 enable-method = "psci";
69 qcom,freq-domain = <&cpufreq_hw 0>;
70 next-level-cache = <&l2_1>;
71 capacity-dmips-mhz = <1024>;
72 dynamic-power-coefficient = <100>;
73 l2_1: l2-cache {
75 cache-level = <2>;
76 cache-unified;
77 next-level-cache = <&l3_0>;
85 enable-method = "psci";
86 qcom,freq-domain = <&cpufreq_hw 0>;
87 next-level-cache = <&l2_2>;
88 capacity-dmips-mhz = <1024>;
89 dynamic-power-coefficient = <100>;
90 l2_2: l2-cache {
92 cache-level = <2>;
93 cache-unified;
94 next-level-cache = <&l3_0>;
102 enable-method = "psci";
103 qcom,freq-domain = <&cpufreq_hw 0>;
104 next-level-cache = <&l2_3>;
105 capacity-dmips-mhz = <1024>;
106 dynamic-power-coefficient = <100>;
107 l2_3: l2-cache {
109 cache-level = <2>;
110 cache-unified;
111 next-level-cache = <&l3_0>;
119 enable-method = "psci";
120 qcom,freq-domain = <&cpufreq_hw 1>;
121 next-level-cache = <&l2_4>;
122 capacity-dmips-mhz = <1024>;
123 dynamic-power-coefficient = <100>;
124 l2_4: l2-cache {
126 cache-level = <2>;
127 cache-unified;
128 next-level-cache = <&l3_1>;
129 l3_1: l3-cache {
131 cache-level = <3>;
132 cache-unified;
142 enable-method = "psci";
143 qcom,freq-domain = <&cpufreq_hw 1>;
144 next-level-cache = <&l2_5>;
145 capacity-dmips-mhz = <1024>;
146 dynamic-power-coefficient = <100>;
147 l2_5: l2-cache {
149 cache-level = <2>;
150 cache-unified;
151 next-level-cache = <&l3_1>;
159 enable-method = "psci";
160 qcom,freq-domain = <&cpufreq_hw 1>;
161 next-level-cache = <&l2_6>;
162 capacity-dmips-mhz = <1024>;
163 dynamic-power-coefficient = <100>;
164 l2_6: l2-cache {
166 cache-level = <2>;
167 cache-unified;
168 next-level-cache = <&l3_1>;
176 enable-method = "psci";
177 qcom,freq-domain = <&cpufreq_hw 1>;
178 next-level-cache = <&l2_7>;
179 capacity-dmips-mhz = <1024>;
180 dynamic-power-coefficient = <100>;
181 l2_7: l2-cache {
183 cache-level = <2>;
184 cache-unified;
185 next-level-cache = <&l3_1>;
189 cpu-map {
227 idle-states {
228 entry-method = "psci";
230 gold_cpu_sleep_0: cpu-sleep-0 {
231 compatible = "arm,idle-state";
232 idle-state-name = "gold-power-collapse";
233 arm,psci-suspend-param = <0x40000003>;
234 entry-latency-us = <549>;
235 exit-latency-us = <901>;
236 min-residency-us = <1774>;
237 local-timer-stop;
240 gold_rail_cpu_sleep_0: cpu-sleep-1 {
241 compatible = "arm,idle-state";
242 idle-state-name = "gold-rail-power-collapse";
243 arm,psci-suspend-param = <0x40000004>;
244 entry-latency-us = <702>;
245 exit-latency-us = <1061>;
246 min-residency-us = <4488>;
247 local-timer-stop;
251 domain-idle-states {
252 cluster_sleep_gold: cluster-sleep-0 {
253 compatible = "domain-idle-state";
254 arm,psci-suspend-param = <0x41000044>;
255 entry-latency-us = <2752>;
256 exit-latency-us = <3048>;
257 min-residency-us = <6118>;
260 cluster_sleep_apss_rsc_pc: cluster-sleep-1 {
261 compatible = "domain-idle-state";
262 arm,psci-suspend-param = <0x42000144>;
263 entry-latency-us = <3263>;
264 exit-latency-us = <6562>;
265 min-residency-us = <9987>;
270 dummy-sink {
271 compatible = "arm,coresight-dummy-sink";
273 in-ports {
276 remote-endpoint =
285 compatible = "qcom,scm-sa8775p", "qcom,scm";
286 qcom,dload-mode = <&tcsr 0x13000>;
287 memory-region = <&tz_ffi_mem>;
291 aggre1_noc: interconnect-aggre1-noc {
292 compatible = "qcom,sa8775p-aggre1-noc";
293 #interconnect-cells = <2>;
294 qcom,bcm-voters = <&apps_bcm_voter>;
297 aggre2_noc: interconnect-aggre2-noc {
298 compatible = "qcom,sa8775p-aggre2-noc";
299 #interconnect-cells = <2>;
300 qcom,bcm-voters = <&apps_bcm_voter>;
303 clk_virt: interconnect-clk-virt {
304 compatible = "qcom,sa8775p-clk-virt";
305 #interconnect-cells = <2>;
306 qcom,bcm-voters = <&apps_bcm_voter>;
309 config_noc: interconnect-config-noc {
310 compatible = "qcom,sa8775p-config-noc";
311 #interconnect-cells = <2>;
312 qcom,bcm-voters = <&apps_bcm_voter>;
315 dc_noc: interconnect-dc-noc {
316 compatible = "qcom,sa8775p-dc-noc";
317 #interconnect-cells = <2>;
318 qcom,bcm-voters = <&apps_bcm_voter>;
321 gem_noc: interconnect-gem-noc {
322 compatible = "qcom,sa8775p-gem-noc";
323 #interconnect-cells = <2>;
324 qcom,bcm-voters = <&apps_bcm_voter>;
327 gpdsp_anoc: interconnect-gpdsp-anoc {
328 compatible = "qcom,sa8775p-gpdsp-anoc";
329 #interconnect-cells = <2>;
330 qcom,bcm-voters = <&apps_bcm_voter>;
333 lpass_ag_noc: interconnect-lpass-ag-noc {
334 compatible = "qcom,sa8775p-lpass-ag-noc";
335 #interconnect-cells = <2>;
336 qcom,bcm-voters = <&apps_bcm_voter>;
339 mc_virt: interconnect-mc-virt {
340 compatible = "qcom,sa8775p-mc-virt";
341 #interconnect-cells = <2>;
342 qcom,bcm-voters = <&apps_bcm_voter>;
345 mmss_noc: interconnect-mmss-noc {
346 compatible = "qcom,sa8775p-mmss-noc";
347 #interconnect-cells = <2>;
348 qcom,bcm-voters = <&apps_bcm_voter>;
351 nspa_noc: interconnect-nspa-noc {
352 compatible = "qcom,sa8775p-nspa-noc";
353 #interconnect-cells = <2>;
354 qcom,bcm-voters = <&apps_bcm_voter>;
357 nspb_noc: interconnect-nspb-noc {
358 compatible = "qcom,sa8775p-nspb-noc";
359 #interconnect-cells = <2>;
360 qcom,bcm-voters = <&apps_bcm_voter>;
363 pcie_anoc: interconnect-pcie-anoc {
364 compatible = "qcom,sa8775p-pcie-anoc";
365 #interconnect-cells = <2>;
366 qcom,bcm-voters = <&apps_bcm_voter>;
369 system_noc: interconnect-system-noc {
370 compatible = "qcom,sa8775p-system-noc";
371 #interconnect-cells = <2>;
372 qcom,bcm-voters = <&apps_bcm_voter>;
381 qup_opp_table_100mhz: opp-table-qup100mhz {
382 compatible = "operating-points-v2";
384 opp-100000000 {
385 opp-hz = /bits/ 64 <100000000>;
386 required-opps = <&rpmhpd_opp_svs_l1>;
391 compatible = "arm,armv8-pmuv3";
396 compatible = "arm,psci-1.0";
399 cpu_pd0: power-domain-cpu0 {
400 #power-domain-cells = <0>;
401 power-domains = <&cluster_0_pd>;
402 domain-idle-states = <&gold_cpu_sleep_0>,
406 cpu_pd1: power-domain-cpu1 {
407 #power-domain-cells = <0>;
408 power-domains = <&cluster_0_pd>;
409 domain-idle-states = <&gold_cpu_sleep_0>,
413 cpu_pd2: power-domain-cpu2 {
414 #power-domain-cells = <0>;
415 power-domains = <&cluster_0_pd>;
416 domain-idle-states = <&gold_cpu_sleep_0>,
420 cpu_pd3: power-domain-cpu3 {
421 #power-domain-cells = <0>;
422 power-domains = <&cluster_0_pd>;
423 domain-idle-states = <&gold_cpu_sleep_0>,
427 cpu_pd4: power-domain-cpu4 {
428 #power-domain-cells = <0>;
429 power-domains = <&cluster_1_pd>;
430 domain-idle-states = <&gold_cpu_sleep_0>,
434 cpu_pd5: power-domain-cpu5 {
435 #power-domain-cells = <0>;
436 power-domains = <&cluster_1_pd>;
437 domain-idle-states = <&gold_cpu_sleep_0>,
441 cpu_pd6: power-domain-cpu6 {
442 #power-domain-cells = <0>;
443 power-domains = <&cluster_1_pd>;
444 domain-idle-states = <&gold_cpu_sleep_0>,
448 cpu_pd7: power-domain-cpu7 {
449 #power-domain-cells = <0>;
450 power-domains = <&cluster_1_pd>;
451 domain-idle-states = <&gold_cpu_sleep_0>,
455 cluster_0_pd: power-domain-cluster0 {
456 #power-domain-cells = <0>;
457 power-domains = <&cluster_2_pd>;
458 domain-idle-states = <&cluster_sleep_gold>;
461 cluster_1_pd: power-domain-cluster1 {
462 #power-domain-cells = <0>;
463 power-domains = <&cluster_2_pd>;
464 domain-idle-states = <&cluster_sleep_gold>;
467 cluster_2_pd: power-domain-cluster2 {
468 #power-domain-cells = <0>;
469 domain-idle-states = <&cluster_sleep_apss_rsc_pc>;
473 reserved-memory {
474 #address-cells = <2>;
475 #size-cells = <2>;
478 sail_ss_mem: sail-ss@80000000 {
480 no-map;
485 no-map;
488 xbl_boot_mem: xbl-boot@90600000 {
490 no-map;
493 aop_image_mem: aop-image@90800000 {
495 no-map;
498 aop_cmd_db_mem: aop-cmd-db@90860000 {
499 compatible = "qcom,cmd-db";
501 no-map;
504 uefi_log: uefi-log@908b0000 {
506 no-map;
509 ddr_training_checksum: ddr-training-checksum@908c0000 {
511 no-map;
516 no-map;
519 secdata_apss_mem: secdata-apss@908fe000 {
521 no-map;
527 no-map;
531 tz_sail_mailbox_mem: tz-sail-mailbox@90c00000 {
533 no-map;
536 sail_mailbox_mem: sail-ss@90d00000 {
538 no-map;
541 sail_ota_mem: sail-ss@90e00000 {
543 no-map;
546 aoss_backup_mem: aoss-backup@91b00000 {
548 no-map;
551 cpucp_backup_mem: cpucp-backup@91b40000 {
553 no-map;
556 tz_config_backup_mem: tz-config-backup@91b80000 {
558 no-map;
561 ddr_training_data_mem: ddr-training-data@91b90000 {
563 no-map;
566 cdt_data_backup_mem: cdt-data-backup@91ba0000 {
568 no-map;
571 tz_ffi_mem: tz-ffi@91c00000 {
572 compatible = "shared-dma-pool";
574 no-map;
577 lpass_machine_learning_mem: lpass-machine-learning@93b00000 {
579 no-map;
582 adsp_rpc_remote_heap_mem: adsp-rpc-remote-heap@94a00000 {
584 no-map;
587 pil_camera_mem: pil-camera@95200000 {
589 no-map;
592 pil_adsp_mem: pil-adsp@95c00000 {
594 no-map;
597 pil_gdsp0_mem: pil-gdsp0@97b00000 {
599 no-map;
602 pil_gdsp1_mem: pil-gdsp1@99900000 {
604 no-map;
607 pil_cdsp0_mem: pil-cdsp0@9b800000 {
609 no-map;
612 pil_gpu_mem: pil-gpu@9d600000 {
614 no-map;
617 pil_cdsp1_mem: pil-cdsp1@9d700000 {
619 no-map;
622 pil_cvp_mem: pil-cvp@9f500000 {
624 no-map;
627 pil_video_mem: pil-video@9fc00000 {
629 no-map;
632 audio_mdf_mem: audio-mdf-region@ae000000 {
634 no-map;
637 firmware_mem: firmware-region@b0000000 {
639 no-map;
642 hyptz_reserved_mem: hyptz-reserved@beb00000 {
644 no-map;
647 scmi_mem: scmi-region@d0000000 {
649 no-map;
652 firmware_logs_mem: firmware-logs@d0040000 {
654 no-map;
657 firmware_audio_mem: firmware-audio@d0050000 {
659 no-map;
662 firmware_reserved_mem: firmware-reserved@d0054000 {
664 no-map;
667 firmware_quantum_test_mem: firmware-quantum-test@d00f0000 {
669 no-map;
674 no-map;
679 no-map;
682 deepsleep_backup_mem: deepsleep-backup@d1800000 {
684 no-map;
687 trusted_apps_mem: trusted-apps@d1900000 {
689 no-map;
692 tz_stat_mem: tz-stat@db100000 {
694 no-map;
697 cpucp_fw_mem: cpucp-fw@db200000 {
699 no-map;
703 smp2p-adsp {
706 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
711 qcom,local-pid = <0>;
712 qcom,remote-pid = <2>;
714 smp2p_adsp_out: master-kernel {
715 qcom,entry-name = "master-kernel";
716 #qcom,smem-state-cells = <1>;
719 smp2p_adsp_in: slave-kernel {
720 qcom,entry-name = "slave-kernel";
721 interrupt-controller;
722 #interrupt-cells = <2>;
726 smp2p-cdsp0 {
729 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
734 qcom,local-pid = <0>;
735 qcom,remote-pid = <5>;
737 smp2p_cdsp0_out: master-kernel {
738 qcom,entry-name = "master-kernel";
739 #qcom,smem-state-cells = <1>;
742 smp2p_cdsp0_in: slave-kernel {
743 qcom,entry-name = "slave-kernel";
744 interrupt-controller;
745 #interrupt-cells = <2>;
749 smp2p-cdsp1 {
752 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
757 qcom,local-pid = <0>;
758 qcom,remote-pid = <12>;
760 smp2p_cdsp1_out: master-kernel {
761 qcom,entry-name = "master-kernel";
762 #qcom,smem-state-cells = <1>;
765 smp2p_cdsp1_in: slave-kernel {
766 qcom,entry-name = "slave-kernel";
767 interrupt-controller;
768 #interrupt-cells = <2>;
772 smp2p-gpdsp0 {
775 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
780 qcom,local-pid = <0>;
781 qcom,remote-pid = <17>;
783 smp2p_gpdsp0_out: master-kernel {
784 qcom,entry-name = "master-kernel";
785 #qcom,smem-state-cells = <1>;
788 smp2p_gpdsp0_in: slave-kernel {
789 qcom,entry-name = "slave-kernel";
790 interrupt-controller;
791 #interrupt-cells = <2>;
795 smp2p-gpdsp1 {
798 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
803 qcom,local-pid = <0>;
804 qcom,remote-pid = <18>;
806 smp2p_gpdsp1_out: master-kernel {
807 qcom,entry-name = "master-kernel";
808 #qcom,smem-state-cells = <1>;
811 smp2p_gpdsp1_in: slave-kernel {
812 qcom,entry-name = "slave-kernel";
813 interrupt-controller;
814 #interrupt-cells = <2>;
819 compatible = "simple-bus";
820 #address-cells = <2>;
821 #size-cells = <2>;
824 gcc: clock-controller@100000 {
825 compatible = "qcom,sa8775p-gcc";
827 #clock-cells = <1>;
828 #reset-cells = <1>;
829 #power-domain-cells = <1>;
845 power-domains = <&rpmhpd SA8775P_CX>;
849 compatible = "qcom,sa8775p-ipcc", "qcom,ipcc";
852 interrupt-controller;
853 #interrupt-cells = <3>;
854 #mbox-cells = <2>;
857 gpi_dma2: qcom,gpi-dma@800000 {
858 compatible = "qcom,sm6350-gpi-dma";
860 #dma-cells = <3>;
873 dma-channels = <12>;
874 dma-channel-mask = <0xfff>;
880 compatible = "qcom,geni-se-qup";
885 clock-names = "m-ahb", "s-ahb";
887 #address-cells = <2>;
888 #size-cells = <2>;
892 compatible = "qcom,geni-i2c";
894 #address-cells = <1>;
895 #size-cells = <0>;
898 clock-names = "se";
905 interconnect-names = "qup-core",
906 "qup-config",
907 "qup-memory";
908 power-domains = <&rpmhpd SA8775P_CX>;
911 dma-names = "tx",
912 "rx";
917 compatible = "qcom,geni-spi";
919 #address-cells = <1>;
920 #size-cells = <0>;
923 clock-names = "se";
930 interconnect-names = "qup-core",
931 "qup-config",
932 "qup-memory";
933 power-domains = <&rpmhpd SA8775P_CX>;
936 dma-names = "tx",
937 "rx";
942 compatible = "qcom,geni-uart";
946 clock-names = "se";
951 interconnect-names = "qup-core", "qup-config";
952 power-domains = <&rpmhpd SA8775P_CX>;
957 compatible = "qcom,geni-i2c";
959 #address-cells = <1>;
960 #size-cells = <0>;
963 clock-names = "se";
970 interconnect-names = "qup-core",
971 "qup-config",
972 "qup-memory";
973 power-domains = <&rpmhpd SA8775P_CX>;
976 dma-names = "tx",
977 "rx";
982 compatible = "qcom,geni-spi";
984 #address-cells = <1>;
985 #size-cells = <0>;
988 clock-names = "se";
995 interconnect-names = "qup-core",
996 "qup-config",
997 "qup-memory";
998 power-domains = <&rpmhpd SA8775P_CX>;
1001 dma-names = "tx",
1002 "rx";
1007 compatible = "qcom,geni-uart";
1011 clock-names = "se";
1016 interconnect-names = "qup-core", "qup-config";
1017 power-domains = <&rpmhpd SA8775P_CX>;
1022 compatible = "qcom,geni-i2c";
1024 #address-cells = <1>;
1025 #size-cells = <0>;
1028 clock-names = "se";
1035 interconnect-names = "qup-core",
1036 "qup-config",
1037 "qup-memory";
1038 power-domains = <&rpmhpd SA8775P_CX>;
1041 dma-names = "tx",
1042 "rx";
1047 compatible = "qcom,geni-spi";
1051 clock-names = "se";
1058 interconnect-names = "qup-core",
1059 "qup-config",
1060 "qup-memory";
1061 power-domains = <&rpmhpd SA8775P_CX>;
1064 dma-names = "tx",
1065 "rx";
1066 #address-cells = <1>;
1067 #size-cells = <0>;
1072 compatible = "qcom,geni-uart";
1076 clock-names = "se";
1081 interconnect-names = "qup-core", "qup-config";
1082 power-domains = <&rpmhpd SA8775P_CX>;
1087 compatible = "qcom,geni-i2c";
1089 #address-cells = <1>;
1090 #size-cells = <0>;
1093 clock-names = "se";
1100 interconnect-names = "qup-core",
1101 "qup-config",
1102 "qup-memory";
1103 power-domains = <&rpmhpd SA8775P_CX>;
1106 dma-names = "tx",
1107 "rx";
1112 compatible = "qcom,geni-spi";
1114 #address-cells = <1>;
1115 #size-cells = <0>;
1118 clock-names = "se";
1125 interconnect-names = "qup-core",
1126 "qup-config",
1127 "qup-memory";
1128 power-domains = <&rpmhpd SA8775P_CX>;
1131 dma-names = "tx",
1132 "rx";
1137 compatible = "qcom,geni-uart";
1141 clock-names = "se";
1146 interconnect-names = "qup-core", "qup-config";
1147 power-domains = <&rpmhpd SA8775P_CX>;
1152 compatible = "qcom,geni-i2c";
1156 clock-names = "se";
1163 interconnect-names = "qup-core",
1164 "qup-config",
1165 "qup-memory";
1166 power-domains = <&rpmhpd SA8775P_CX>;
1169 dma-names = "tx",
1170 "rx";
1171 #address-cells = <1>;
1172 #size-cells = <0>;
1177 compatible = "qcom,geni-spi";
1179 #address-cells = <1>;
1180 #size-cells = <0>;
1183 clock-names = "se";
1190 interconnect-names = "qup-core",
1191 "qup-config",
1192 "qup-memory";
1193 power-domains = <&rpmhpd SA8775P_CX>;
1196 dma-names = "tx",
1197 "rx";
1202 compatible = "qcom,geni-uart";
1206 clock-names = "se";
1211 interconnect-names = "qup-core", "qup-config";
1212 power-domains = <&rpmhpd SA8775P_CX>;
1217 compatible = "qcom,geni-i2c";
1219 #address-cells = <1>;
1220 #size-cells = <0>;
1223 clock-names = "se";
1230 interconnect-names = "qup-core",
1231 "qup-config",
1232 "qup-memory";
1233 power-domains = <&rpmhpd SA8775P_CX>;
1236 dma-names = "tx",
1237 "rx";
1242 compatible = "qcom,geni-spi";
1244 #address-cells = <1>;
1245 #size-cells = <0>;
1248 clock-names = "se";
1255 interconnect-names = "qup-core",
1256 "qup-config",
1257 "qup-memory";
1258 power-domains = <&rpmhpd SA8775P_CX>;
1261 dma-names = "tx",
1262 "rx";
1267 compatible = "qcom,geni-uart";
1271 clock-names = "se";
1276 interconnect-names = "qup-core", "qup-config";
1277 power-domains = <&rpmhpd SA8775P_CX>;
1282 compatible = "qcom,geni-i2c";
1284 #address-cells = <1>;
1285 #size-cells = <0>;
1288 clock-names = "se";
1295 interconnect-names = "qup-core",
1296 "qup-config",
1297 "qup-memory";
1298 power-domains = <&rpmhpd SA8775P_CX>;
1301 dma-names = "tx",
1302 "rx";
1307 compatible = "qcom,geni-spi";
1309 #address-cells = <1>;
1310 #size-cells = <0>;
1313 clock-names = "se";
1320 interconnect-names = "qup-core",
1321 "qup-config",
1322 "qup-memory";
1323 power-domains = <&rpmhpd SA8775P_CX>;
1326 dma-names = "tx",
1327 "rx";
1332 compatible = "qcom,geni-uart";
1336 clock-names = "se";
1341 interconnect-names = "qup-core", "qup-config";
1342 power-domains = <&rpmhpd SA8775P_CX>;
1348 gpi_dma0: qcom,gpi-dma@900000 {
1349 compatible = "qcom,sm6350-gpi-dma";
1351 #dma-cells = <3>;
1364 dma-channels = <12>;
1365 dma-channel-mask = <0xfff>;
1371 compatible = "qcom,geni-se-qup";
1373 #address-cells = <2>;
1374 #size-cells = <2>;
1376 clock-names = "m-ahb", "s-ahb";
1383 compatible = "qcom,geni-i2c";
1385 #address-cells = <1>;
1386 #size-cells = <0>;
1389 clock-names = "se";
1396 interconnect-names = "qup-core",
1397 "qup-config",
1398 "qup-memory";
1399 power-domains = <&rpmhpd SA8775P_CX>;
1402 dma-names = "tx",
1403 "rx";
1408 compatible = "qcom,geni-spi";
1410 #address-cells = <1>;
1411 #size-cells = <0>;
1414 clock-names = "se";
1421 interconnect-names = "qup-core",
1422 "qup-config",
1423 "qup-memory";
1424 power-domains = <&rpmhpd SA8775P_CX>;
1427 dma-names = "tx",
1428 "rx";
1433 compatible = "qcom,geni-uart";
1437 clock-names = "se";
1442 interconnect-names = "qup-core", "qup-config";
1443 power-domains = <&rpmhpd SA8775P_CX>;
1448 compatible = "qcom,geni-i2c";
1450 #address-cells = <1>;
1451 #size-cells = <0>;
1454 clock-names = "se";
1461 interconnect-names = "qup-core",
1462 "qup-config",
1463 "qup-memory";
1464 power-domains = <&rpmhpd SA8775P_CX>;
1467 dma-names = "tx",
1468 "rx";
1473 compatible = "qcom,geni-spi";
1475 #address-cells = <1>;
1476 #size-cells = <0>;
1479 clock-names = "se";
1486 interconnect-names = "qup-core",
1487 "qup-config",
1488 "qup-memory";
1489 power-domains = <&rpmhpd SA8775P_CX>;
1492 dma-names = "tx",
1493 "rx";
1498 compatible = "qcom,geni-uart";
1502 clock-names = "se";
1507 interconnect-names = "qup-core", "qup-config";
1508 power-domains = <&rpmhpd SA8775P_CX>;
1513 compatible = "qcom,geni-i2c";
1515 #address-cells = <1>;
1516 #size-cells = <0>;
1519 clock-names = "se";
1526 interconnect-names = "qup-core",
1527 "qup-config",
1528 "qup-memory";
1529 power-domains = <&rpmhpd SA8775P_CX>;
1532 dma-names = "tx",
1533 "rx";
1538 compatible = "qcom,geni-spi";
1540 #address-cells = <1>;
1541 #size-cells = <0>;
1544 clock-names = "se";
1551 interconnect-names = "qup-core",
1552 "qup-config",
1553 "qup-memory";
1554 power-domains = <&rpmhpd SA8775P_CX>;
1557 dma-names = "tx",
1558 "rx";
1562 uart2: serial@988000 { label
1563 compatible = "qcom,geni-uart";
1567 clock-names = "se";
1572 interconnect-names = "qup-core", "qup-config";
1573 power-domains = <&rpmhpd SA8775P_CX>;
1578 compatible = "qcom,geni-i2c";
1580 #address-cells = <1>;
1581 #size-cells = <0>;
1584 clock-names = "se";
1591 interconnect-names = "qup-core",
1592 "qup-config",
1593 "qup-memory";
1594 power-domains = <&rpmhpd SA8775P_CX>;
1597 dma-names = "tx",
1598 "rx";
1603 compatible = "qcom,geni-spi";
1605 #address-cells = <1>;
1606 #size-cells = <0>;
1609 clock-names = "se";
1616 interconnect-names = "qup-core",
1617 "qup-config",
1618 "qup-memory";
1619 power-domains = <&rpmhpd SA8775P_CX>;
1622 dma-names = "tx",
1623 "rx";
1628 compatible = "qcom,geni-uart";
1632 clock-names = "se";
1637 interconnect-names = "qup-core", "qup-config";
1638 power-domains = <&rpmhpd SA8775P_CX>;
1643 compatible = "qcom,geni-i2c";
1645 #address-cells = <1>;
1646 #size-cells = <0>;
1649 clock-names = "se";
1656 interconnect-names = "qup-core",
1657 "qup-config",
1658 "qup-memory";
1659 power-domains = <&rpmhpd SA8775P_CX>;
1662 dma-names = "tx",
1663 "rx";
1668 compatible = "qcom,geni-spi";
1670 #address-cells = <1>;
1671 #size-cells = <0>;
1674 clock-names = "se";
1681 interconnect-names = "qup-core",
1682 "qup-config",
1683 "qup-memory";
1684 power-domains = <&rpmhpd SA8775P_CX>;
1687 dma-names = "tx",
1688 "rx";
1693 compatible = "qcom,geni-uart";
1697 clock-names = "se";
1702 interconnect-names = "qup-core", "qup-config";
1703 power-domains = <&rpmhpd SA8775P_CX>;
1708 compatible = "qcom,geni-i2c";
1710 #address-cells = <1>;
1711 #size-cells = <0>;
1714 clock-names = "se";
1721 interconnect-names = "qup-core",
1722 "qup-config",
1723 "qup-memory";
1724 power-domains = <&rpmhpd SA8775P_CX>;
1727 dma-names = "tx",
1728 "rx";
1733 compatible = "qcom,geni-spi";
1735 #address-cells = <1>;
1736 #size-cells = <0>;
1739 clock-names = "se";
1746 interconnect-names = "qup-core",
1747 "qup-config",
1748 "qup-memory";
1749 power-domains = <&rpmhpd SA8775P_CX>;
1752 dma-names = "tx",
1753 "rx";
1758 compatible = "qcom,geni-uart";
1762 clock-names = "se";
1767 interconnect-names = "qup-core", "qup-config";
1768 power-domains = <&rpmhpd SA8775P_CX>;
1773 gpi_dma1: qcom,gpi-dma@a00000 {
1774 compatible = "qcom,sm6350-gpi-dma";
1776 #dma-cells = <3>;
1790 dma-channels = <12>;
1791 dma-channel-mask = <0xfff>;
1796 compatible = "qcom,geni-se-qup";
1798 #address-cells = <2>;
1799 #size-cells = <2>;
1801 clock-names = "m-ahb", "s-ahb";
1808 compatible = "qcom,geni-i2c";
1810 #address-cells = <1>;
1811 #size-cells = <0>;
1814 clock-names = "se";
1821 interconnect-names = "qup-core",
1822 "qup-config",
1823 "qup-memory";
1824 power-domains = <&rpmhpd SA8775P_CX>;
1827 dma-names = "tx",
1828 "rx";
1833 compatible = "qcom,geni-spi";
1835 #address-cells = <1>;
1836 #size-cells = <0>;
1839 clock-names = "se";
1846 interconnect-names = "qup-core",
1847 "qup-config",
1848 "qup-memory";
1849 power-domains = <&rpmhpd SA8775P_CX>;
1852 dma-names = "tx",
1853 "rx";
1858 compatible = "qcom,geni-uart";
1861 clock-names = "se";
1863 interconnect-names = "qup-core", "qup-config";
1868 power-domains = <&rpmhpd SA8775P_CX>;
1869 operating-points-v2 = <&qup_opp_table_100mhz>;
1874 compatible = "qcom,geni-i2c";
1876 #address-cells = <1>;
1877 #size-cells = <0>;
1880 clock-names = "se";
1887 interconnect-names = "qup-core",
1888 "qup-config",
1889 "qup-memory";
1890 power-domains = <&rpmhpd SA8775P_CX>;
1893 dma-names = "tx",
1894 "rx";
1899 compatible = "qcom,geni-spi";
1901 #address-cells = <1>;
1902 #size-cells = <0>;
1905 clock-names = "se";
1912 interconnect-names = "qup-core",
1913 "qup-config",
1914 "qup-memory";
1915 power-domains = <&rpmhpd SA8775P_CX>;
1918 dma-names = "tx",
1919 "rx";
1924 compatible = "qcom,geni-uart";
1927 clock-names = "se";
1929 interconnect-names = "qup-core", "qup-config";
1934 power-domains = <&rpmhpd SA8775P_CX>;
1935 operating-points-v2 = <&qup_opp_table_100mhz>;
1940 compatible = "qcom,geni-i2c";
1942 #address-cells = <1>;
1943 #size-cells = <0>;
1946 clock-names = "se";
1953 interconnect-names = "qup-core",
1954 "qup-config",
1955 "qup-memory";
1956 power-domains = <&rpmhpd SA8775P_CX>;
1959 dma-names = "tx",
1960 "rx";
1965 compatible = "qcom,geni-spi";
1967 #address-cells = <1>;
1968 #size-cells = <0>;
1971 clock-names = "se";
1978 interconnect-names = "qup-core",
1979 "qup-config",
1980 "qup-memory";
1981 power-domains = <&rpmhpd SA8775P_CX>;
1984 dma-names = "tx",
1985 "rx";
1990 compatible = "qcom,geni-uart";
1994 clock-names = "se";
1999 interconnect-names = "qup-core", "qup-config";
2000 power-domains = <&rpmhpd SA8775P_CX>;
2005 compatible = "qcom,geni-i2c";
2007 #address-cells = <1>;
2008 #size-cells = <0>;
2011 clock-names = "se";
2018 interconnect-names = "qup-core",
2019 "qup-config",
2020 "qup-memory";
2021 power-domains = <&rpmhpd SA8775P_CX>;
2024 dma-names = "tx",
2025 "rx";
2030 compatible = "qcom,geni-spi";
2032 #address-cells = <1>;
2033 #size-cells = <0>;
2036 clock-names = "se";
2043 interconnect-names = "qup-core",
2044 "qup-config",
2045 "qup-memory";
2046 power-domains = <&rpmhpd SA8775P_CX>;
2049 dma-names = "tx",
2050 "rx";
2055 compatible = "qcom,geni-uart";
2058 clock-names = "se";
2060 interconnect-names = "qup-core", "qup-config";
2065 power-domains = <&rpmhpd SA8775P_CX>;
2066 operating-points-v2 = <&qup_opp_table_100mhz>;
2071 compatible = "qcom,geni-i2c";
2073 #address-cells = <1>;
2074 #size-cells = <0>;
2077 clock-names = "se";
2084 interconnect-names = "qup-core",
2085 "qup-config",
2086 "qup-memory";
2087 power-domains = <&rpmhpd SA8775P_CX>;
2090 dma-names = "tx",
2091 "rx";
2096 compatible = "qcom,geni-spi";
2098 #address-cells = <1>;
2099 #size-cells = <0>;
2102 clock-names = "se";
2109 interconnect-names = "qup-core",
2110 "qup-config",
2111 "qup-memory";
2112 power-domains = <&rpmhpd SA8775P_CX>;
2115 dma-names = "tx",
2116 "rx";
2121 compatible = "qcom,geni-uart";
2124 clock-names = "se";
2126 interconnect-names = "qup-core", "qup-config";
2131 power-domains = <&rpmhpd SA8775P_CX>;
2132 operating-points-v2 = <&qup_opp_table_100mhz>;
2137 compatible = "qcom,geni-i2c";
2139 #address-cells = <1>;
2140 #size-cells = <0>;
2143 clock-names = "se";
2150 interconnect-names = "qup-core",
2151 "qup-config",
2152 "qup-memory";
2153 power-domains = <&rpmhpd SA8775P_CX>;
2156 dma-names = "tx",
2157 "rx";
2162 compatible = "qcom,geni-spi";
2164 #address-cells = <1>;
2165 #size-cells = <0>;
2168 clock-names = "se";
2175 interconnect-names = "qup-core",
2176 "qup-config",
2177 "qup-memory";
2178 power-domains = <&rpmhpd SA8775P_CX>;
2181 dma-names = "tx",
2182 "rx";
2187 compatible = "qcom,geni-uart";
2191 clock-names = "se";
2196 interconnect-names = "qup-core", "qup-config";
2197 power-domains = <&rpmhpd SA8775P_CX>;
2202 compatible = "qcom,geni-i2c";
2204 #address-cells = <1>;
2205 #size-cells = <0>;
2208 clock-names = "se";
2215 interconnect-names = "qup-core",
2216 "qup-config",
2217 "qup-memory";
2218 power-domains = <&rpmhpd SA8775P_CX>;
2221 dma-names = "tx",
2222 "rx";
2228 gpi_dma3: qcom,gpi-dma@b00000 {
2229 compatible = "qcom,sm6350-gpi-dma";
2231 #dma-cells = <3>;
2237 dma-channels = <4>;
2238 dma-channel-mask = <0xf>;
2243 compatible = "qcom,geni-se-qup";
2245 #address-cells = <2>;
2246 #size-cells = <2>;
2248 clock-names = "m-ahb", "s-ahb";
2255 compatible = "qcom,geni-i2c";
2257 #address-cells = <1>;
2258 #size-cells = <0>;
2261 clock-names = "se";
2268 interconnect-names = "qup-core",
2269 "qup-config",
2270 "qup-memory";
2271 power-domains = <&rpmhpd SA8775P_CX>;
2274 dma-names = "tx",
2275 "rx";
2280 compatible = "qcom,geni-spi";
2282 #address-cells = <1>;
2283 #size-cells = <0>;
2286 clock-names = "se";
2293 interconnect-names = "qup-core",
2294 "qup-config",
2295 "qup-memory";
2296 power-domains = <&rpmhpd SA8775P_CX>;
2299 dma-names = "tx",
2300 "rx";
2305 compatible = "qcom,geni-uart";
2308 clock-names = "se";
2310 interconnect-names = "qup-core", "qup-config";
2315 power-domains = <&rpmhpd SA8775P_CX>;
2316 operating-points-v2 = <&qup_opp_table_100mhz>;
2322 compatible = "qcom,sa8775p-trng", "qcom,trng";
2327 compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
2331 phy-names = "ufsphy";
2332 lanes-per-direction = <2>;
2333 #reset-cells = <1>;
2335 reset-names = "rst";
2336 power-domains = <&gcc UFS_PHY_GDSC>;
2337 required-opps = <&rpmhpd_opp_nom>;
2339 dma-coherent;
2348 clock-names = "core_clk",
2356 freq-table-hz = <75000000 300000000>,
2369 compatible = "qcom,sa8775p-qmp-ufs-phy";
2378 clock-names = "ref", "ref_aux", "qref";
2379 power-domains = <&gcc UFS_PHY_GDSC>;
2381 reset-names = "ufsphy";
2382 #phy-cells = <0>;
2387 compatible = "qcom,sa8775p-inline-crypto-engine",
2388 "qcom,inline-crypto-engine";
2393 cryptobam: dma-controller@1dc4000 {
2394 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
2397 #dma-cells = <1>;
2399 qcom,controlled-remotely;
2405 compatible = "qcom,sa8775p-qce", "qcom,qce";
2408 dma-names = "rx", "tx";
2412 interconnect-names = "memory";
2416 compatible = "arm,coresight-stm", "arm,primecell";
2419 reg-names = "stm-base", "stm-stimulus-base";
2422 clock-names = "apb_pclk";
2424 out-ports {
2427 remote-endpoint =
2435 compatible = "qcom,coresight-tpdm", "arm,primecell";
2439 clock-names = "apb_pclk";
2441 qcom,cmb-element-bits = <32>;
2442 qcom,cmb-msrs-num = <32>;
2445 out-ports {
2448 remote-endpoint =
2456 compatible = "qcom,coresight-tpda", "arm,primecell";
2460 clock-names = "apb_pclk";
2462 out-ports {
2465 remote-endpoint =
2471 in-ports {
2472 #address-cells = <1>;
2473 #size-cells = <0>;
2478 remote-endpoint =
2486 remote-endpoint =
2494 compatible = "qcom,coresight-tpdm", "arm,primecell";
2498 clock-names = "apb_pclk";
2500 qcom,cmb-element-bits = <32>;
2501 qcom,cmb-msrs-num = <32>;
2503 out-ports {
2506 remote-endpoint =
2514 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2518 clock-names = "apb_pclk";
2520 out-ports {
2523 remote-endpoint =
2529 in-ports {
2530 #address-cells = <1>;
2531 #size-cells = <0>;
2536 remote-endpoint =
2544 remote-endpoint =
2552 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2556 clock-names = "apb_pclk";
2558 out-ports {
2561 remote-endpoint =
2567 in-ports {
2568 #address-cells = <1>;
2569 #size-cells = <0>;
2574 remote-endpoint =
2582 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2586 clock-names = "apb_pclk";
2588 out-ports {
2591 remote-endpoint =
2597 in-ports {
2598 #address-cells = <1>;
2599 #size-cells = <0>;
2604 remote-endpoint =
2612 remote-endpoint =
2620 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2624 clock-names = "apb_pclk";
2626 out-ports {
2629 remote-endpoint =
2635 in-ports {
2636 #address-cells = <1>;
2637 #size-cells = <0>;
2642 remote-endpoint =
2650 remote-endpoint =
2658 compatible = "arm,coresight-tmc", "arm,primecell";
2662 clock-names = "apb_pclk";
2664 out-ports {
2667 remote-endpoint =
2673 in-ports {
2676 remote-endpoint =
2684 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
2688 clock-names = "apb_pclk";
2690 out-ports {
2691 #address-cells = <1>;
2692 #size-cells = <0>;
2697 remote-endpoint =
2703 in-ports {
2706 remote-endpoint =
2714 compatible = "qcom,coresight-tpda", "arm,primecell";
2718 clock-names = "apb_pclk";
2720 out-ports {
2723 remote-endpoint =
2729 in-ports {
2730 #address-cells = <1>;
2731 #size-cells = <0>;
2736 remote-endpoint =
2744 remote-endpoint =
2752 remote-endpoint =
2760 remote-endpoint =
2768 remote-endpoint =
2776 compatible = "qcom,coresight-tpdm", "arm,primecell";
2780 clock-names = "apb_pclk";
2782 qcom,cmb-element-bits = <64>;
2783 qcom,cmb-msrs-num = <32>;
2785 out-ports {
2788 remote-endpoint =
2796 compatible = "qcom,coresight-tpdm", "arm,primecell";
2800 clock-names = "apb_pclk";
2802 qcom,cmb-element-bits = <64>;
2803 qcom,cmb-msrs-num = <32>;
2805 out-ports {
2808 remote-endpoint =
2816 compatible = "qcom,coresight-tpdm", "arm,primecell";
2820 clock-names = "apb_pclk";
2822 qcom,cmb-element-bits = <64>;
2823 qcom,cmb-msrs-num = <32>;
2825 out-ports {
2828 remote-endpoint =
2836 compatible = "qcom,coresight-tpdm", "arm,primecell";
2840 clock-names = "apb_pclk";
2842 qcom,cmb-element-bits = <64>;
2843 qcom,cmb-msrs-num = <32>;
2845 out-ports {
2848 remote-endpoint =
2856 compatible = "qcom,coresight-tpdm", "arm,primecell";
2860 clock-names = "apb_pclk";
2862 qcom,dsb-element-bits = <32>;
2863 qcom,dsb-msrs-num = <32>;
2865 out-ports {
2868 remote-endpoint =
2876 compatible = "arm,coresight-cti", "arm,primecell";
2880 clock-names = "apb_pclk";
2889 clock-names = "apb_pclk";
2890 arm,coresight-loses-context-with-cpu;
2891 qcom,skip-power-up;
2893 out-ports {
2896 remote-endpoint =
2909 clock-names = "apb_pclk";
2910 arm,coresight-loses-context-with-cpu;
2911 qcom,skip-power-up;
2913 out-ports {
2916 remote-endpoint =
2929 clock-names = "apb_pclk";
2930 arm,coresight-loses-context-with-cpu;
2931 qcom,skip-power-up;
2933 out-ports {
2936 remote-endpoint =
2949 clock-names = "apb_pclk";
2950 arm,coresight-loses-context-with-cpu;
2951 qcom,skip-power-up;
2953 out-ports {
2956 remote-endpoint =
2969 clock-names = "apb_pclk";
2970 arm,coresight-loses-context-with-cpu;
2971 qcom,skip-power-up;
2973 out-ports {
2976 remote-endpoint =
2989 clock-names = "apb_pclk";
2990 arm,coresight-loses-context-with-cpu;
2991 qcom,skip-power-up;
2993 out-ports {
2996 remote-endpoint =
3009 clock-names = "apb_pclk";
3010 arm,coresight-loses-context-with-cpu;
3011 qcom,skip-power-up;
3013 out-ports {
3016 remote-endpoint =
3029 clock-names = "apb_pclk";
3030 arm,coresight-loses-context-with-cpu;
3031 qcom,skip-power-up;
3033 out-ports {
3036 remote-endpoint =
3044 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
3048 clock-names = "apb_pclk";
3050 out-ports {
3053 remote-endpoint =
3059 in-ports {
3060 #address-cells = <1>;
3061 #size-cells = <0>;
3066 remote-endpoint =
3074 remote-endpoint =
3082 remote-endpoint =
3090 remote-endpoint =
3098 remote-endpoint =
3106 remote-endpoint =
3114 remote-endpoint =
3122 remote-endpoint =
3130 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
3134 clock-names = "apb_pclk";
3136 out-ports {
3139 remote-endpoint =
3145 in-ports {
3146 #address-cells = <1>;
3147 #size-cells = <0>;
3152 remote-endpoint =
3160 remote-endpoint =
3168 compatible = "qcom,coresight-tpdm", "arm,primecell";
3172 clock-names = "apb_pclk";
3174 qcom,cmb-element-bits = <64>;
3175 qcom,cmb-msrs-num = <32>;
3177 out-ports {
3180 remote-endpoint =
3188 compatible = "qcom,coresight-tpdm", "arm,primecell";
3192 clock-names = "apb_pclk";
3194 qcom,dsb-element-bits = <32>;
3195 qcom,dsb-msrs-num = <32>;
3197 out-ports {
3200 remote-endpoint =
3208 compatible = "qcom,coresight-tpda", "arm,primecell";
3212 clock-names = "apb_pclk";
3214 out-ports {
3217 remote-endpoint =
3223 in-ports {
3224 #address-cells = <1>;
3225 #size-cells = <0>;
3230 remote-endpoint =
3238 remote-endpoint =
3246 remote-endpoint =
3254 remote-endpoint =
3262 remote-endpoint =
3270 compatible = "qcom,coresight-tpdm", "arm,primecell";
3274 clock-names = "apb_pclk";
3276 qcom,cmb-element-bits = <32>;
3277 qcom,cmb-msrs-num = <32>;
3279 out-ports {
3282 remote-endpoint =
3290 compatible = "qcom,coresight-tpdm", "arm,primecell";
3294 clock-names = "apb_pclk";
3296 qcom,cmb-element-bits = <32>;
3297 qcom,cmb-msrs-num = <32>;
3299 out-ports {
3302 remote-endpoint =
3310 compatible = "qcom,coresight-tpdm", "arm,primecell";
3314 clock-names = "apb_pclk";
3316 qcom,dsb-element-bits = <32>;
3317 qcom,dsb-msrs-num = <32>;
3319 out-ports {
3322 remote-endpoint =
3330 compatible = "qcom,sa8775p-usb-hs-phy",
3331 "qcom,usb-snps-hs-5nm-phy";
3334 clock-names = "ref";
3337 #phy-cells = <0>;
3343 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
3350 clock-names = "aux", "ref", "com_aux", "pipe";
3354 reset-names = "phy", "phy_phy";
3356 power-domains = <&gcc USB30_PRIM_GDSC>;
3358 #clock-cells = <0>;
3359 clock-output-names = "usb3_prim_phy_pipe_clk_src";
3361 #phy-cells = <0>;
3367 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3369 #address-cells = <2>;
3370 #size-cells = <2>;
3378 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3380 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
3382 assigned-clock-rates = <19200000>, <200000000>;
3384 interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
3389 interrupt-names = "pwr_event",
3395 power-domains = <&gcc USB30_PRIM_GDSC>;
3396 required-opps = <&rpmhpd_opp_nom>;
3402 interconnect-names = "usb-ddr", "apps-usb";
3404 wakeup-source;
3414 phy-names = "usb2-phy", "usb3-phy";
3419 compatible = "qcom,sa8775p-usb-hs-phy",
3420 "qcom,usb-snps-hs-5nm-phy";
3423 clock-names = "ref";
3426 #phy-cells = <0>;
3432 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
3439 clock-names = "aux", "ref", "com_aux", "pipe";
3443 reset-names = "phy", "phy_phy";
3445 power-domains = <&gcc USB30_SEC_GDSC>;
3447 #clock-cells = <0>;
3448 clock-output-names = "usb3_sec_phy_pipe_clk_src";
3450 #phy-cells = <0>;
3456 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3458 #address-cells = <2>;
3459 #size-cells = <2>;
3467 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3469 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
3471 assigned-clock-rates = <19200000>, <200000000>;
3473 interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
3478 interrupt-names = "pwr_event",
3484 power-domains = <&gcc USB30_SEC_GDSC>;
3485 required-opps = <&rpmhpd_opp_nom>;
3491 interconnect-names = "usb-ddr", "apps-usb";
3493 wakeup-source;
3503 phy-names = "usb2-phy", "usb3-phy";
3508 compatible = "qcom,sa8775p-usb-hs-phy",
3509 "qcom,usb-snps-hs-5nm-phy";
3512 clock-names = "ref";
3515 #phy-cells = <0>;
3521 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3523 #address-cells = <2>;
3524 #size-cells = <2>;
3532 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3534 assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
3536 assigned-clock-rates = <19200000>, <200000000>;
3538 interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
3542 interrupt-names = "pwr_event",
3547 power-domains = <&gcc USB20_PRIM_GDSC>;
3548 required-opps = <&rpmhpd_opp_nom>;
3554 interconnect-names = "usb-ddr", "apps-usb";
3556 wakeup-source;
3566 phy-names = "usb2-phy";
3571 compatible = "qcom,tcsr-mutex";
3573 #hwlock-cells = <1>;
3577 compatible = "qcom,sa8775p-tcsr", "syscon";
3581 gpucc: clock-controller@3d90000 {
3582 compatible = "qcom,sa8775p-gpucc";
3587 clock-names = "bi_tcxo",
3590 #clock-cells = <1>;
3591 #reset-cells = <1>;
3592 #power-domain-cells = <1>;
3596 compatible = "qcom,sa8775p-smmu-500", "qcom,adreno-smmu",
3597 "qcom,smmu-500", "arm,mmu-500";
3599 #iommu-cells = <2>;
3600 #global-interrupts = <2>;
3601 dma-coherent;
3602 power-domains = <&gpucc GPU_CC_CX_GDSC>;
3610 clock-names = "gcc_gpu_memnoc_gfx_clk",
3632 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
3635 clock-names = "sgmi_ref";
3636 #phy-cells = <0>;
3641 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
3644 clock-names = "sgmi_ref";
3645 #phy-cells = <0>;
3650 compatible = "qcom,sa8775p-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
3656 operating-points-v2 = <&llcc_bwmon_opp_table>;
3658 llcc_bwmon_opp_table: opp-table {
3659 compatible = "operating-points-v2";
3661 opp-0 {
3662 opp-peak-kBps = <762000>;
3665 opp-1 {
3666 opp-peak-kBps = <1720000>;
3669 opp-2 {
3670 opp-peak-kBps = <2086000>;
3673 opp-3 {
3674 opp-peak-kBps = <2601000>;
3677 opp-4 {
3678 opp-peak-kBps = <2929000>;
3681 opp-5 {
3682 opp-peak-kBps = <5931000>;
3685 opp-6 {
3686 opp-peak-kBps = <6515000>;
3689 opp-7 {
3690 opp-peak-kBps = <7984000>;
3693 opp-8 {
3694 opp-peak-kBps = <10437000>;
3697 opp-9 {
3698 opp-peak-kBps = <12195000>;
3704 compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
3710 operating-points-v2 = <&cpu_bwmon_opp_table>;
3712 cpu_bwmon_opp_table: opp-table {
3713 compatible = "operating-points-v2";
3715 opp-0 {
3716 opp-peak-kBps = <9155000>;
3719 opp-1 {
3720 opp-peak-kBps = <12298000>;
3723 opp-2 {
3724 opp-peak-kBps = <14236000>;
3727 opp-3 {
3728 opp-peak-kBps = <16265000>;
3735 compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
3741 operating-points-v2 = <&cpu_bwmon_opp_table>;
3744 llcc: system-cache-controller@9200000 {
3745 compatible = "qcom,sa8775p-llcc";
3753 reg-names = "llcc0_base",
3763 pdc: interrupt-controller@b220000 {
3764 compatible = "qcom,sa8775p-pdc", "qcom,pdc";
3767 qcom,pdc-ranges = <0 480 40>,
3805 #interrupt-cells = <2>;
3806 interrupt-parent = <&intc>;
3807 interrupt-controller;
3810 tsens2: thermal-sensor@c251000 {
3811 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3817 interrupt-names = "uplow", "critical";
3818 #thermal-sensor-cells = <1>;
3821 tsens3: thermal-sensor@c252000 {
3822 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3828 interrupt-names = "uplow", "critical";
3829 #thermal-sensor-cells = <1>;
3832 tsens0: thermal-sensor@c263000 {
3833 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3839 interrupt-names = "uplow", "critical";
3840 #thermal-sensor-cells = <1>;
3843 tsens1: thermal-sensor@c265000 {
3844 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3850 interrupt-names = "uplow", "critical";
3851 #thermal-sensor-cells = <1>;
3854 aoss_qmp: power-management@c300000 {
3855 compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
3857 interrupts-extended = <&ipcc IPCC_CLIENT_AOP
3861 #clock-cells = <0>;
3865 compatible = "qcom,rpmh-stats";
3870 compatible = "qcom,spmi-pmic-arb";
3876 reg-names = "core",
3883 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3884 interrupt-names = "periph_irq";
3885 interrupt-controller;
3886 #interrupt-cells = <4>;
3887 #address-cells = <2>;
3888 #size-cells = <0>;
3892 compatible = "qcom,sa8775p-tlmm";
3895 gpio-controller;
3896 #gpio-cells = <2>;
3897 interrupt-controller;
3898 #interrupt-cells = <2>;
3899 gpio-ranges = <&tlmm 0 0 149>;
3900 wakeup-parent = <&pdc>;
3904 compatible = "qcom,sa8775p-imem", "syscon", "simple-mfd";
3908 #address-cells = <1>;
3909 #size-cells = <1>;
3911 pil-reloc@94c {
3912 compatible = "qcom,pil-reloc-info";
3918 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
3920 #iommu-cells = <2>;
3921 #global-interrupts = <2>;
3922 dma-coherent;
4057 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
4059 #iommu-cells = <2>;
4060 #global-interrupts = <2>;
4061 dma-coherent;
4131 intc: interrupt-controller@17a00000 {
4132 compatible = "arm,gic-v3";
4135 interrupt-controller;
4136 #interrupt-cells = <3>;
4138 #redistributor-regions = <1>;
4139 redistributor-stride = <0x0 0x20000>;
4143 compatible = "qcom,apss-wdt-sa8775p", "qcom,kpss-wdt";
4150 compatible = "arm,armv7-timer-mem";
4153 #address-cells = <1>;
4154 #size-cells = <1>;
4161 frame-number = <0>;
4167 frame-number = <1>;
4174 frame-number = <2>;
4181 frame-number = <3>;
4188 frame-number = <4>;
4195 frame-number = <5>;
4202 frame-number = <6>;
4208 compatible = "qcom,rpmh-rsc";
4212 reg-names = "drv-0", "drv-1", "drv-2";
4216 qcom,tcs-offset = <0xd00>;
4217 qcom,drv-id = <2>;
4218 qcom,tcs-config = <ACTIVE_TCS 2>,
4224 apps_bcm_voter: bcm-voter {
4225 compatible = "qcom,bcm-voter";
4228 rpmhcc: clock-controller {
4229 compatible = "qcom,sa8775p-rpmh-clk";
4230 #clock-cells = <1>;
4231 clock-names = "xo";
4235 rpmhpd: power-controller {
4236 compatible = "qcom,sa8775p-rpmhpd";
4237 #power-domain-cells = <1>;
4238 operating-points-v2 = <&rpmhpd_opp_table>;
4240 rpmhpd_opp_table: opp-table {
4241 compatible = "operating-points-v2";
4243 rpmhpd_opp_ret: opp-0 {
4244 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
4247 rpmhpd_opp_min_svs: opp-1 {
4248 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
4252 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
4256 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
4259 rpmhpd_opp_svs_l1: opp-4 {
4260 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
4263 rpmhpd_opp_nom: opp-5 {
4264 opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
4267 rpmhpd_opp_nom_l1: opp-6 {
4268 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
4271 rpmhpd_opp_nom_l2: opp-7 {
4272 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
4275 rpmhpd_opp_turbo: opp-8 {
4276 opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
4279 rpmhpd_opp_turbo_l1: opp-9 {
4280 opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
4287 compatible = "qcom,sa8775p-cpufreq-epss",
4288 "qcom,cpufreq-epss";
4291 reg-names = "freq-domain0", "freq-domain1";
4294 clock-names = "xo", "alternate";
4296 #freq-domain-cells = <1>;
4300 compatible = "qcom,sa8775p-gpdsp0-pas";
4303 interrupts-extended = <&intc GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
4308 interrupt-names = "wdog", "fatal", "ready",
4309 "handover", "stop-ack";
4312 clock-names = "xo";
4314 power-domains = <&rpmhpd RPMHPD_CX>,
4316 power-domain-names = "cx", "mxc";
4321 memory-region = <&pil_gdsp0_mem>;
4325 qcom,smem-states = <&smp2p_gpdsp0_out 0>;
4326 qcom,smem-state-names = "stop";
4330 glink-edge {
4331 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
4338 qcom,remote-pid = <17>;
4343 compatible = "qcom,sa8775p-gpdsp1-pas";
4346 interrupts-extended = <&intc GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
4351 interrupt-names = "wdog", "fatal", "ready",
4352 "handover", "stop-ack";
4355 clock-names = "xo";
4357 power-domains = <&rpmhpd RPMHPD_CX>,
4359 power-domain-names = "cx", "mxc";
4364 memory-region = <&pil_gdsp1_mem>;
4368 qcom,smem-states = <&smp2p_gpdsp1_out 0>;
4369 qcom,smem-state-names = "stop";
4373 glink-edge {
4374 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
4381 qcom,remote-pid = <18>;
4386 compatible = "qcom,sa8775p-ethqos";
4389 reg-names = "stmmaceth", "rgmii";
4393 interrupt-names = "macirq", "sfty";
4399 clock-names = "stmmaceth",
4408 interconnect-names = "mac-mem", "cpu-mac";
4410 power-domains = <&gcc EMAC1_GDSC>;
4413 phy-names = "serdes";
4416 dma-coherent;
4420 rx-fifo-depth = <16384>;
4421 tx-fifo-depth = <16384>;
4427 compatible = "qcom,sa8775p-ethqos";
4430 reg-names = "stmmaceth", "rgmii";
4434 interrupt-names = "macirq", "sfty";
4440 clock-names = "stmmaceth",
4449 interconnect-names = "mac-mem", "cpu-mac";
4451 power-domains = <&gcc EMAC0_GDSC>;
4454 phy-names = "serdes";
4457 dma-coherent;
4461 rx-fifo-depth = <16384>;
4462 tx-fifo-depth = <16384>;
4468 compatible = "qcom,sa8775p-cdsp0-pas";
4471 interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
4476 interrupt-names = "wdog", "fatal", "ready",
4477 "handover", "stop-ack";
4480 clock-names = "xo";
4482 power-domains = <&rpmhpd RPMHPD_CX>,
4485 power-domain-names = "cx", "mxc", "nsp";
4490 memory-region = <&pil_cdsp0_mem>;
4494 qcom,smem-states = <&smp2p_cdsp0_out 0>;
4495 qcom,smem-state-names = "stop";
4499 glink-edge {
4500 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
4507 qcom,remote-pid = <5>;
4511 qcom,glink-channels = "fastrpcglink-apps-dsp";
4513 #address-cells = <1>;
4514 #size-cells = <0>;
4516 compute-cb@1 {
4517 compatible = "qcom,fastrpc-compute-cb";
4529 dma-coherent;
4532 compute-cb@2 {
4533 compatible = "qcom,fastrpc-compute-cb";
4545 dma-coherent;
4548 compute-cb@3 {
4549 compatible = "qcom,fastrpc-compute-cb";
4561 dma-coherent;
4564 compute-cb@4 {
4565 compatible = "qcom,fastrpc-compute-cb";
4577 dma-coherent;
4580 compute-cb@5 {
4581 compatible = "qcom,fastrpc-compute-cb";
4593 dma-coherent;
4596 compute-cb@6 {
4597 compatible = "qcom,fastrpc-compute-cb";
4609 dma-coherent;
4612 compute-cb@7 {
4613 compatible = "qcom,fastrpc-compute-cb";
4625 dma-coherent;
4628 compute-cb@8 {
4629 compatible = "qcom,fastrpc-compute-cb";
4641 dma-coherent;
4644 compute-cb@9 {
4645 compatible = "qcom,fastrpc-compute-cb";
4657 dma-coherent;
4660 compute-cb@10 {
4661 compatible = "qcom,fastrpc-compute-cb";
4673 dma-coherent;
4676 compute-cb@11 {
4677 compatible = "qcom,fastrpc-compute-cb";
4689 dma-coherent;
4696 compatible = "qcom,sa8775p-cdsp1-pas";
4699 interrupts-extended = <&intc GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
4704 interrupt-names = "wdog", "fatal", "ready",
4705 "handover", "stop-ack";
4708 clock-names = "xo";
4710 power-domains = <&rpmhpd RPMHPD_CX>,
4713 power-domain-names = "cx", "mxc", "nsp";
4718 memory-region = <&pil_cdsp1_mem>;
4722 qcom,smem-states = <&smp2p_cdsp1_out 0>;
4723 qcom,smem-state-names = "stop";
4727 glink-edge {
4728 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
4735 qcom,remote-pid = <12>;
4739 qcom,glink-channels = "fastrpcglink-apps-dsp";
4741 #address-cells = <1>;
4742 #size-cells = <0>;
4744 compute-cb@1 {
4745 compatible = "qcom,fastrpc-compute-cb";
4757 dma-coherent;
4760 compute-cb@2 {
4761 compatible = "qcom,fastrpc-compute-cb";
4773 dma-coherent;
4776 compute-cb@3 {
4777 compatible = "qcom,fastrpc-compute-cb";
4789 dma-coherent;
4792 compute-cb@4 {
4793 compatible = "qcom,fastrpc-compute-cb";
4805 dma-coherent;
4808 compute-cb@5 {
4809 compatible = "qcom,fastrpc-compute-cb";
4821 dma-coherent;
4824 compute-cb@6 {
4825 compatible = "qcom,fastrpc-compute-cb";
4837 dma-coherent;
4840 compute-cb@7 {
4841 compatible = "qcom,fastrpc-compute-cb";
4853 dma-coherent;
4856 compute-cb@8 {
4857 compatible = "qcom,fastrpc-compute-cb";
4869 dma-coherent;
4872 compute-cb@9 {
4873 compatible = "qcom,fastrpc-compute-cb";
4885 dma-coherent;
4888 compute-cb@10 {
4889 compatible = "qcom,fastrpc-compute-cb";
4901 dma-coherent;
4904 compute-cb@11 {
4905 compatible = "qcom,fastrpc-compute-cb";
4917 dma-coherent;
4920 compute-cb@12 {
4921 compatible = "qcom,fastrpc-compute-cb";
4933 dma-coherent;
4936 compute-cb@13 {
4937 compatible = "qcom,fastrpc-compute-cb";
4949 dma-coherent;
4956 compatible = "qcom,sa8775p-adsp-pas";
4959 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
4964 interrupt-names = "wdog", "fatal", "ready", "handover",
4965 "stop-ack";
4968 clock-names = "xo";
4970 power-domains = <&rpmhpd RPMHPD_LCX>,
4972 power-domain-names = "lcx", "lmx";
4976 memory-region = <&pil_adsp_mem>;
4980 qcom,smem-states = <&smp2p_adsp_out 0>;
4981 qcom,smem-state-names = "stop";
4985 remoteproc_adsp_glink: glink-edge {
4986 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
4993 qcom,remote-pid = <2>;
4997 qcom,glink-channels = "fastrpcglink-apps-dsp";
4999 memory-region = <&adsp_rpc_remote_heap_mem>;
5002 #address-cells = <1>;
5003 #size-cells = <0>;
5005 compute-cb@3 {
5006 compatible = "qcom,fastrpc-compute-cb";
5009 dma-coherent;
5012 compute-cb@4 {
5013 compatible = "qcom,fastrpc-compute-cb";
5016 dma-coherent;
5019 compute-cb@5 {
5020 compatible = "qcom,fastrpc-compute-cb";
5024 dma-coherent;
5031 thermal-zones {
5032 aoss-0-thermal {
5033 thermal-sensors = <&tsens0 0>;
5036 trip-point0 {
5042 trip-point1 {
5050 cpu-0-0-0-thermal {
5051 polling-delay-passive = <10>;
5053 thermal-sensors = <&tsens0 1>;
5056 trip-point0 {
5062 trip-point1 {
5070 cpu-0-1-0-thermal {
5071 polling-delay-passive = <10>;
5073 thermal-sensors = <&tsens0 2>;
5076 trip-point0 {
5082 trip-point1 {
5090 cpu-0-2-0-thermal {
5091 polling-delay-passive = <10>;
5093 thermal-sensors = <&tsens0 3>;
5096 trip-point0 {
5102 trip-point1 {
5110 cpu-0-3-0-thermal {
5111 polling-delay-passive = <10>;
5113 thermal-sensors = <&tsens0 4>;
5116 trip-point0 {
5122 trip-point1 {
5130 gpuss-0-thermal {
5131 polling-delay-passive = <10>;
5133 thermal-sensors = <&tsens0 5>;
5136 trip-point0 {
5142 trip-point1 {
5150 gpuss-1-thermal {
5151 polling-delay-passive = <10>;
5153 thermal-sensors = <&tsens0 6>;
5156 trip-point0 {
5162 trip-point1 {
5170 gpuss-2-thermal {
5171 polling-delay-passive = <10>;
5173 thermal-sensors = <&tsens0 7>;
5176 trip-point0 {
5182 trip-point1 {
5190 audio-thermal {
5191 thermal-sensors = <&tsens0 8>;
5194 trip-point0 {
5200 trip-point1 {
5208 camss-0-thermal {
5209 thermal-sensors = <&tsens0 9>;
5212 trip-point0 {
5218 trip-point1 {
5226 pcie-0-thermal {
5227 thermal-sensors = <&tsens0 10>;
5230 trip-point0 {
5236 trip-point1 {
5244 cpuss-0-0-thermal {
5245 thermal-sensors = <&tsens0 11>;
5248 trip-point0 {
5254 trip-point1 {
5262 aoss-1-thermal {
5263 thermal-sensors = <&tsens1 0>;
5266 trip-point0 {
5272 trip-point1 {
5280 cpu-0-0-1-thermal {
5281 polling-delay-passive = <10>;
5283 thermal-sensors = <&tsens1 1>;
5286 trip-point0 {
5292 trip-point1 {
5300 cpu-0-1-1-thermal {
5301 polling-delay-passive = <10>;
5303 thermal-sensors = <&tsens1 2>;
5306 trip-point0 {
5312 trip-point1 {
5320 cpu-0-2-1-thermal {
5321 polling-delay-passive = <10>;
5323 thermal-sensors = <&tsens1 3>;
5326 trip-point0 {
5332 trip-point1 {
5340 cpu-0-3-1-thermal {
5341 polling-delay-passive = <10>;
5343 thermal-sensors = <&tsens1 4>;
5346 trip-point0 {
5352 trip-point1 {
5360 gpuss-3-thermal {
5361 polling-delay-passive = <10>;
5363 thermal-sensors = <&tsens1 5>;
5366 trip-point0 {
5372 trip-point1 {
5380 gpuss-4-thermal {
5381 polling-delay-passive = <10>;
5383 thermal-sensors = <&tsens1 6>;
5386 trip-point0 {
5392 trip-point1 {
5400 gpuss-5-thermal {
5401 polling-delay-passive = <10>;
5403 thermal-sensors = <&tsens1 7>;
5406 trip-point0 {
5412 trip-point1 {
5420 video-thermal {
5421 thermal-sensors = <&tsens1 8>;
5424 trip-point0 {
5430 trip-point1 {
5438 camss-1-thermal {
5439 thermal-sensors = <&tsens1 9>;
5442 trip-point0 {
5448 trip-point1 {
5456 pcie-1-thermal {
5457 thermal-sensors = <&tsens1 10>;
5460 trip-point0 {
5466 trip-point1 {
5474 cpuss-0-1-thermal {
5475 thermal-sensors = <&tsens1 11>;
5478 trip-point0 {
5484 trip-point1 {
5492 aoss-2-thermal {
5493 thermal-sensors = <&tsens2 0>;
5496 trip-point0 {
5502 trip-point1 {
5510 cpu-1-0-0-thermal {
5511 polling-delay-passive = <10>;
5513 thermal-sensors = <&tsens2 1>;
5516 trip-point0 {
5522 trip-point1 {
5530 cpu-1-1-0-thermal {
5531 polling-delay-passive = <10>;
5533 thermal-sensors = <&tsens2 2>;
5536 trip-point0 {
5542 trip-point1 {
5550 cpu-1-2-0-thermal {
5551 polling-delay-passive = <10>;
5553 thermal-sensors = <&tsens2 3>;
5556 trip-point0 {
5562 trip-point1 {
5570 cpu-1-3-0-thermal {
5571 polling-delay-passive = <10>;
5573 thermal-sensors = <&tsens2 4>;
5576 trip-point0 {
5582 trip-point1 {
5590 nsp-0-0-0-thermal {
5591 polling-delay-passive = <10>;
5593 thermal-sensors = <&tsens2 5>;
5596 trip-point0 {
5602 trip-point1 {
5610 nsp-0-1-0-thermal {
5611 polling-delay-passive = <10>;
5613 thermal-sensors = <&tsens2 6>;
5616 trip-point0 {
5622 trip-point1 {
5630 nsp-0-2-0-thermal {
5631 polling-delay-passive = <10>;
5633 thermal-sensors = <&tsens2 7>;
5636 trip-point0 {
5642 trip-point1 {
5650 nsp-1-0-0-thermal {
5651 polling-delay-passive = <10>;
5653 thermal-sensors = <&tsens2 8>;
5656 trip-point0 {
5662 trip-point1 {
5670 nsp-1-1-0-thermal {
5671 polling-delay-passive = <10>;
5673 thermal-sensors = <&tsens2 9>;
5676 trip-point0 {
5682 trip-point1 {
5690 nsp-1-2-0-thermal {
5691 polling-delay-passive = <10>;
5693 thermal-sensors = <&tsens2 10>;
5696 trip-point0 {
5702 trip-point1 {
5710 ddrss-0-thermal {
5711 thermal-sensors = <&tsens2 11>;
5714 trip-point0 {
5720 trip-point1 {
5728 cpuss-1-0-thermal {
5729 thermal-sensors = <&tsens2 12>;
5732 trip-point0 {
5738 trip-point1 {
5746 aoss-3-thermal {
5747 thermal-sensors = <&tsens3 0>;
5750 trip-point0 {
5756 trip-point1 {
5764 cpu-1-0-1-thermal {
5765 polling-delay-passive = <10>;
5767 thermal-sensors = <&tsens3 1>;
5770 trip-point0 {
5776 trip-point1 {
5784 cpu-1-1-1-thermal {
5785 polling-delay-passive = <10>;
5787 thermal-sensors = <&tsens3 2>;
5790 trip-point0 {
5796 trip-point1 {
5804 cpu-1-2-1-thermal {
5805 polling-delay-passive = <10>;
5807 thermal-sensors = <&tsens3 3>;
5810 trip-point0 {
5816 trip-point1 {
5824 cpu-1-3-1-thermal {
5825 polling-delay-passive = <10>;
5827 thermal-sensors = <&tsens3 4>;
5830 trip-point0 {
5836 trip-point1 {
5844 nsp-0-0-1-thermal {
5845 polling-delay-passive = <10>;
5847 thermal-sensors = <&tsens3 5>;
5850 trip-point0 {
5856 trip-point1 {
5864 nsp-0-1-1-thermal {
5865 polling-delay-passive = <10>;
5867 thermal-sensors = <&tsens3 6>;
5870 trip-point0 {
5876 trip-point1 {
5884 nsp-0-2-1-thermal {
5885 polling-delay-passive = <10>;
5887 thermal-sensors = <&tsens3 7>;
5890 trip-point0 {
5896 trip-point1 {
5904 nsp-1-0-1-thermal {
5905 polling-delay-passive = <10>;
5907 thermal-sensors = <&tsens3 8>;
5910 trip-point0 {
5916 trip-point1 {
5924 nsp-1-1-1-thermal {
5925 polling-delay-passive = <10>;
5927 thermal-sensors = <&tsens3 9>;
5930 trip-point0 {
5936 trip-point1 {
5944 nsp-1-2-1-thermal {
5945 polling-delay-passive = <10>;
5947 thermal-sensors = <&tsens3 10>;
5950 trip-point0 {
5956 trip-point1 {
5964 ddrss-1-thermal {
5965 thermal-sensors = <&tsens3 11>;
5968 trip-point0 {
5974 trip-point1 {
5982 cpuss-1-1-thermal {
5983 thermal-sensors = <&tsens3 12>;
5986 trip-point0 {
5992 trip-point1 {
6002 compatible = "arm,armv8-timer";
6010 compatible = "qcom,pcie-sa8775p";
6017 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
6020 #address-cells = <3>;
6021 #size-cells = <2>;
6024 bus-range = <0x00 0xff>;
6026 dma-coherent;
6028 linux,pci-domain = <0>;
6029 num-lanes = <2>;
6039 interrupt-names = "msi0", "msi1", "msi2", "msi3",
6041 #interrupt-cells = <1>;
6042 interrupt-map-mask = <0 0 0 0x7>;
6043 interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
6054 clock-names = "aux",
6060 assigned-clocks = <&gcc GCC_PCIE_0_AUX_CLK>;
6061 assigned-clock-rates = <19200000>;
6065 interconnect-names = "pcie-mem", "cpu-pcie";
6067 iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
6071 reset-names = "pci";
6072 power-domains = <&gcc PCIE_0_GDSC>;
6075 phy-names = "pciephy";
6082 bus-range = <0x01 0xff>;
6084 #address-cells = <3>;
6085 #size-cells = <2>;
6090 pcie0_ep: pcie-ep@1c00000 {
6091 compatible = "qcom,sa8775p-pcie-ep";
6099 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
6108 clock-names = "aux",
6118 interrupt-names = "global", "doorbell", "dma";
6122 interconnect-names = "pcie-mem", "cpu-pcie";
6124 dma-coherent;
6127 reset-names = "core";
6128 power-domains = <&gcc PCIE_0_GDSC>;
6130 phy-names = "pciephy";
6131 max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
6132 num-lanes = <2>;
6133 linux,pci-domain = <0>;
6139 compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy";
6150 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
6153 assigned-clocks = <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>;
6154 assigned-clock-rates = <100000000>;
6157 reset-names = "phy";
6159 #clock-cells = <0>;
6160 clock-output-names = "pcie_0_pipe_clk";
6162 #phy-cells = <0>;
6168 compatible = "qcom,pcie-sa8775p";
6175 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
6178 #address-cells = <3>;
6179 #size-cells = <2>;
6182 bus-range = <0x00 0xff>;
6184 dma-coherent;
6186 linux,pci-domain = <1>;
6187 num-lanes = <4>;
6197 interrupt-names = "msi0", "msi1", "msi2", "msi3",
6199 #interrupt-cells = <1>;
6200 interrupt-map-mask = <0 0 0 0x7>;
6201 interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
6212 clock-names = "aux",
6218 assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
6219 assigned-clock-rates = <19200000>;
6223 interconnect-names = "pcie-mem", "cpu-pcie";
6225 iommu-map = <0x0 &pcie_smmu 0x0080 0x1>,
6229 reset-names = "pci";
6230 power-domains = <&gcc PCIE_1_GDSC>;
6233 phy-names = "pciephy";
6240 bus-range = <0x01 0xff>;
6242 #address-cells = <3>;
6243 #size-cells = <2>;
6248 pcie1_ep: pcie-ep@1c10000 {
6249 compatible = "qcom,sa8775p-pcie-ep";
6257 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
6266 clock-names = "aux",
6276 interrupt-names = "global", "doorbell", "dma";
6280 interconnect-names = "pcie-mem", "cpu-pcie";
6282 dma-coherent;
6285 reset-names = "core";
6286 power-domains = <&gcc PCIE_1_GDSC>;
6288 phy-names = "pciephy";
6289 max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
6290 num-lanes = <4>;
6291 linux,pci-domain = <1>;
6297 compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy";
6308 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
6311 assigned-clocks = <&gcc GCC_PCIE_1_PHY_RCHNG_CLK>;
6312 assigned-clock-rates = <100000000>;
6315 reset-names = "phy";
6317 #clock-cells = <0>;
6318 clock-output-names = "pcie_1_pipe_clk";
6320 #phy-cells = <0>;