Lines Matching +full:dsp +full:- +full:uart1 +full:- +full:rx
1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interconnect/qcom,icc.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
15 #include <dt-bindings/firmware/qcom,scm.h>
16 #include <dt-bindings/power/qcom,rpmhpd.h>
17 #include <dt-bindings/power/qcom-rpmpd.h>
18 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
21 interrupt-parent = <&intc>;
23 #address-cells = <2>;
24 #size-cells = <2>;
27 xo_board_clk: xo-board-clk {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
32 sleep_clk: sleep-clk {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
39 #address-cells = <2>;
40 #size-cells = <0>;
46 enable-method = "psci";
47 qcom,freq-domain = <&cpufreq_hw 0>;
48 next-level-cache = <&l2_0>;
49 capacity-dmips-mhz = <1024>;
50 dynamic-power-coefficient = <100>;
51 l2_0: l2-cache {
53 cache-level = <2>;
54 cache-unified;
55 next-level-cache = <&l3_0>;
56 l3_0: l3-cache {
58 cache-level = <3>;
59 cache-unified;
68 enable-method = "psci";
69 qcom,freq-domain = <&cpufreq_hw 0>;
70 next-level-cache = <&l2_1>;
71 capacity-dmips-mhz = <1024>;
72 dynamic-power-coefficient = <100>;
73 l2_1: l2-cache {
75 cache-level = <2>;
76 cache-unified;
77 next-level-cache = <&l3_0>;
85 enable-method = "psci";
86 qcom,freq-domain = <&cpufreq_hw 0>;
87 next-level-cache = <&l2_2>;
88 capacity-dmips-mhz = <1024>;
89 dynamic-power-coefficient = <100>;
90 l2_2: l2-cache {
92 cache-level = <2>;
93 cache-unified;
94 next-level-cache = <&l3_0>;
102 enable-method = "psci";
103 qcom,freq-domain = <&cpufreq_hw 0>;
104 next-level-cache = <&l2_3>;
105 capacity-dmips-mhz = <1024>;
106 dynamic-power-coefficient = <100>;
107 l2_3: l2-cache {
109 cache-level = <2>;
110 cache-unified;
111 next-level-cache = <&l3_0>;
119 enable-method = "psci";
120 qcom,freq-domain = <&cpufreq_hw 1>;
121 next-level-cache = <&l2_4>;
122 capacity-dmips-mhz = <1024>;
123 dynamic-power-coefficient = <100>;
124 l2_4: l2-cache {
126 cache-level = <2>;
127 cache-unified;
128 next-level-cache = <&l3_1>;
129 l3_1: l3-cache {
131 cache-level = <3>;
132 cache-unified;
142 enable-method = "psci";
143 qcom,freq-domain = <&cpufreq_hw 1>;
144 next-level-cache = <&l2_5>;
145 capacity-dmips-mhz = <1024>;
146 dynamic-power-coefficient = <100>;
147 l2_5: l2-cache {
149 cache-level = <2>;
150 cache-unified;
151 next-level-cache = <&l3_1>;
159 enable-method = "psci";
160 qcom,freq-domain = <&cpufreq_hw 1>;
161 next-level-cache = <&l2_6>;
162 capacity-dmips-mhz = <1024>;
163 dynamic-power-coefficient = <100>;
164 l2_6: l2-cache {
166 cache-level = <2>;
167 cache-unified;
168 next-level-cache = <&l3_1>;
176 enable-method = "psci";
177 qcom,freq-domain = <&cpufreq_hw 1>;
178 next-level-cache = <&l2_7>;
179 capacity-dmips-mhz = <1024>;
180 dynamic-power-coefficient = <100>;
181 l2_7: l2-cache {
183 cache-level = <2>;
184 cache-unified;
185 next-level-cache = <&l3_1>;
189 cpu-map {
227 idle-states {
228 entry-method = "psci";
230 gold_cpu_sleep_0: cpu-sleep-0 {
231 compatible = "arm,idle-state";
232 idle-state-name = "gold-power-collapse";
233 arm,psci-suspend-param = <0x40000003>;
234 entry-latency-us = <549>;
235 exit-latency-us = <901>;
236 min-residency-us = <1774>;
237 local-timer-stop;
240 gold_rail_cpu_sleep_0: cpu-sleep-1 {
241 compatible = "arm,idle-state";
242 idle-state-name = "gold-rail-power-collapse";
243 arm,psci-suspend-param = <0x40000004>;
244 entry-latency-us = <702>;
245 exit-latency-us = <1061>;
246 min-residency-us = <4488>;
247 local-timer-stop;
251 domain-idle-states {
252 cluster_sleep_gold: cluster-sleep-0 {
253 compatible = "domain-idle-state";
254 arm,psci-suspend-param = <0x41000044>;
255 entry-latency-us = <2752>;
256 exit-latency-us = <3048>;
257 min-residency-us = <6118>;
260 cluster_sleep_apss_rsc_pc: cluster-sleep-1 {
261 compatible = "domain-idle-state";
262 arm,psci-suspend-param = <0x42000144>;
263 entry-latency-us = <3263>;
264 exit-latency-us = <6562>;
265 min-residency-us = <9987>;
270 dummy-sink {
271 compatible = "arm,coresight-dummy-sink";
273 in-ports {
276 remote-endpoint =
285 compatible = "qcom,scm-sa8775p", "qcom,scm";
286 qcom,dload-mode = <&tcsr 0x13000>;
287 memory-region = <&tz_ffi_mem>;
291 aggre1_noc: interconnect-aggre1-noc {
292 compatible = "qcom,sa8775p-aggre1-noc";
293 #interconnect-cells = <2>;
294 qcom,bcm-voters = <&apps_bcm_voter>;
297 aggre2_noc: interconnect-aggre2-noc {
298 compatible = "qcom,sa8775p-aggre2-noc";
299 #interconnect-cells = <2>;
300 qcom,bcm-voters = <&apps_bcm_voter>;
303 clk_virt: interconnect-clk-virt {
304 compatible = "qcom,sa8775p-clk-virt";
305 #interconnect-cells = <2>;
306 qcom,bcm-voters = <&apps_bcm_voter>;
309 config_noc: interconnect-config-noc {
310 compatible = "qcom,sa8775p-config-noc";
311 #interconnect-cells = <2>;
312 qcom,bcm-voters = <&apps_bcm_voter>;
315 dc_noc: interconnect-dc-noc {
316 compatible = "qcom,sa8775p-dc-noc";
317 #interconnect-cells = <2>;
318 qcom,bcm-voters = <&apps_bcm_voter>;
321 gem_noc: interconnect-gem-noc {
322 compatible = "qcom,sa8775p-gem-noc";
323 #interconnect-cells = <2>;
324 qcom,bcm-voters = <&apps_bcm_voter>;
327 gpdsp_anoc: interconnect-gpdsp-anoc {
328 compatible = "qcom,sa8775p-gpdsp-anoc";
329 #interconnect-cells = <2>;
330 qcom,bcm-voters = <&apps_bcm_voter>;
333 lpass_ag_noc: interconnect-lpass-ag-noc {
334 compatible = "qcom,sa8775p-lpass-ag-noc";
335 #interconnect-cells = <2>;
336 qcom,bcm-voters = <&apps_bcm_voter>;
339 mc_virt: interconnect-mc-virt {
340 compatible = "qcom,sa8775p-mc-virt";
341 #interconnect-cells = <2>;
342 qcom,bcm-voters = <&apps_bcm_voter>;
345 mmss_noc: interconnect-mmss-noc {
346 compatible = "qcom,sa8775p-mmss-noc";
347 #interconnect-cells = <2>;
348 qcom,bcm-voters = <&apps_bcm_voter>;
351 nspa_noc: interconnect-nspa-noc {
352 compatible = "qcom,sa8775p-nspa-noc";
353 #interconnect-cells = <2>;
354 qcom,bcm-voters = <&apps_bcm_voter>;
357 nspb_noc: interconnect-nspb-noc {
358 compatible = "qcom,sa8775p-nspb-noc";
359 #interconnect-cells = <2>;
360 qcom,bcm-voters = <&apps_bcm_voter>;
363 pcie_anoc: interconnect-pcie-anoc {
364 compatible = "qcom,sa8775p-pcie-anoc";
365 #interconnect-cells = <2>;
366 qcom,bcm-voters = <&apps_bcm_voter>;
369 system_noc: interconnect-system-noc {
370 compatible = "qcom,sa8775p-system-noc";
371 #interconnect-cells = <2>;
372 qcom,bcm-voters = <&apps_bcm_voter>;
381 qup_opp_table_100mhz: opp-table-qup100mhz {
382 compatible = "operating-points-v2";
384 opp-100000000 {
385 opp-hz = /bits/ 64 <100000000>;
386 required-opps = <&rpmhpd_opp_svs_l1>;
391 compatible = "arm,armv8-pmuv3";
396 compatible = "arm,psci-1.0";
399 cpu_pd0: power-domain-cpu0 {
400 #power-domain-cells = <0>;
401 power-domains = <&cluster_0_pd>;
402 domain-idle-states = <&gold_cpu_sleep_0>,
406 cpu_pd1: power-domain-cpu1 {
407 #power-domain-cells = <0>;
408 power-domains = <&cluster_0_pd>;
409 domain-idle-states = <&gold_cpu_sleep_0>,
413 cpu_pd2: power-domain-cpu2 {
414 #power-domain-cells = <0>;
415 power-domains = <&cluster_0_pd>;
416 domain-idle-states = <&gold_cpu_sleep_0>,
420 cpu_pd3: power-domain-cpu3 {
421 #power-domain-cells = <0>;
422 power-domains = <&cluster_0_pd>;
423 domain-idle-states = <&gold_cpu_sleep_0>,
427 cpu_pd4: power-domain-cpu4 {
428 #power-domain-cells = <0>;
429 power-domains = <&cluster_1_pd>;
430 domain-idle-states = <&gold_cpu_sleep_0>,
434 cpu_pd5: power-domain-cpu5 {
435 #power-domain-cells = <0>;
436 power-domains = <&cluster_1_pd>;
437 domain-idle-states = <&gold_cpu_sleep_0>,
441 cpu_pd6: power-domain-cpu6 {
442 #power-domain-cells = <0>;
443 power-domains = <&cluster_1_pd>;
444 domain-idle-states = <&gold_cpu_sleep_0>,
448 cpu_pd7: power-domain-cpu7 {
449 #power-domain-cells = <0>;
450 power-domains = <&cluster_1_pd>;
451 domain-idle-states = <&gold_cpu_sleep_0>,
455 cluster_0_pd: power-domain-cluster0 {
456 #power-domain-cells = <0>;
457 power-domains = <&cluster_2_pd>;
458 domain-idle-states = <&cluster_sleep_gold>;
461 cluster_1_pd: power-domain-cluster1 {
462 #power-domain-cells = <0>;
463 power-domains = <&cluster_2_pd>;
464 domain-idle-states = <&cluster_sleep_gold>;
467 cluster_2_pd: power-domain-cluster2 {
468 #power-domain-cells = <0>;
469 domain-idle-states = <&cluster_sleep_apss_rsc_pc>;
473 reserved-memory {
474 #address-cells = <2>;
475 #size-cells = <2>;
478 sail_ss_mem: sail-ss@80000000 {
480 no-map;
485 no-map;
488 xbl_boot_mem: xbl-boot@90600000 {
490 no-map;
493 aop_image_mem: aop-image@90800000 {
495 no-map;
498 aop_cmd_db_mem: aop-cmd-db@90860000 {
499 compatible = "qcom,cmd-db";
501 no-map;
504 uefi_log: uefi-log@908b0000 {
506 no-map;
509 ddr_training_checksum: ddr-training-checksum@908c0000 {
511 no-map;
516 no-map;
519 secdata_apss_mem: secdata-apss@908fe000 {
521 no-map;
527 no-map;
531 tz_sail_mailbox_mem: tz-sail-mailbox@90c00000 {
533 no-map;
536 sail_mailbox_mem: sail-ss@90d00000 {
538 no-map;
541 sail_ota_mem: sail-ss@90e00000 {
543 no-map;
546 aoss_backup_mem: aoss-backup@91b00000 {
548 no-map;
551 cpucp_backup_mem: cpucp-backup@91b40000 {
553 no-map;
556 tz_config_backup_mem: tz-config-backup@91b80000 {
558 no-map;
561 ddr_training_data_mem: ddr-training-data@91b90000 {
563 no-map;
566 cdt_data_backup_mem: cdt-data-backup@91ba0000 {
568 no-map;
571 tz_ffi_mem: tz-ffi@91c00000 {
572 compatible = "shared-dma-pool";
574 no-map;
577 lpass_machine_learning_mem: lpass-machine-learning@93b00000 {
579 no-map;
582 adsp_rpc_remote_heap_mem: adsp-rpc-remote-heap@94a00000 {
584 no-map;
587 pil_camera_mem: pil-camera@95200000 {
589 no-map;
592 pil_adsp_mem: pil-adsp@95c00000 {
594 no-map;
597 pil_gdsp0_mem: pil-gdsp0@97b00000 {
599 no-map;
602 pil_gdsp1_mem: pil-gdsp1@99900000 {
604 no-map;
607 pil_cdsp0_mem: pil-cdsp0@9b800000 {
609 no-map;
612 pil_gpu_mem: pil-gpu@9d600000 {
614 no-map;
617 pil_cdsp1_mem: pil-cdsp1@9d700000 {
619 no-map;
622 pil_cvp_mem: pil-cvp@9f500000 {
624 no-map;
627 pil_video_mem: pil-video@9fc00000 {
629 no-map;
632 audio_mdf_mem: audio-mdf-region@ae000000 {
634 no-map;
637 firmware_mem: firmware-region@b0000000 {
639 no-map;
642 hyptz_reserved_mem: hyptz-reserved@beb00000 {
644 no-map;
647 scmi_mem: scmi-region@d0000000 {
649 no-map;
652 firmware_logs_mem: firmware-logs@d0040000 {
654 no-map;
657 firmware_audio_mem: firmware-audio@d0050000 {
659 no-map;
662 firmware_reserved_mem: firmware-reserved@d0054000 {
664 no-map;
667 firmware_quantum_test_mem: firmware-quantum-test@d00f0000 {
669 no-map;
674 no-map;
679 no-map;
682 deepsleep_backup_mem: deepsleep-backup@d1800000 {
684 no-map;
687 trusted_apps_mem: trusted-apps@d1900000 {
689 no-map;
692 tz_stat_mem: tz-stat@db100000 {
694 no-map;
697 cpucp_fw_mem: cpucp-fw@db200000 {
699 no-map;
703 smp2p-adsp {
706 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
711 qcom,local-pid = <0>;
712 qcom,remote-pid = <2>;
714 smp2p_adsp_out: master-kernel {
715 qcom,entry-name = "master-kernel";
716 #qcom,smem-state-cells = <1>;
719 smp2p_adsp_in: slave-kernel {
720 qcom,entry-name = "slave-kernel";
721 interrupt-controller;
722 #interrupt-cells = <2>;
726 smp2p-cdsp0 {
729 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
734 qcom,local-pid = <0>;
735 qcom,remote-pid = <5>;
737 smp2p_cdsp0_out: master-kernel {
738 qcom,entry-name = "master-kernel";
739 #qcom,smem-state-cells = <1>;
742 smp2p_cdsp0_in: slave-kernel {
743 qcom,entry-name = "slave-kernel";
744 interrupt-controller;
745 #interrupt-cells = <2>;
749 smp2p-cdsp1 {
752 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
757 qcom,local-pid = <0>;
758 qcom,remote-pid = <12>;
760 smp2p_cdsp1_out: master-kernel {
761 qcom,entry-name = "master-kernel";
762 #qcom,smem-state-cells = <1>;
765 smp2p_cdsp1_in: slave-kernel {
766 qcom,entry-name = "slave-kernel";
767 interrupt-controller;
768 #interrupt-cells = <2>;
772 smp2p-gpdsp0 {
775 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
780 qcom,local-pid = <0>;
781 qcom,remote-pid = <17>;
783 smp2p_gpdsp0_out: master-kernel {
784 qcom,entry-name = "master-kernel";
785 #qcom,smem-state-cells = <1>;
788 smp2p_gpdsp0_in: slave-kernel {
789 qcom,entry-name = "slave-kernel";
790 interrupt-controller;
791 #interrupt-cells = <2>;
795 smp2p-gpdsp1 {
798 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
803 qcom,local-pid = <0>;
804 qcom,remote-pid = <18>;
806 smp2p_gpdsp1_out: master-kernel {
807 qcom,entry-name = "master-kernel";
808 #qcom,smem-state-cells = <1>;
811 smp2p_gpdsp1_in: slave-kernel {
812 qcom,entry-name = "slave-kernel";
813 interrupt-controller;
814 #interrupt-cells = <2>;
819 compatible = "simple-bus";
820 #address-cells = <2>;
821 #size-cells = <2>;
824 gcc: clock-controller@100000 {
825 compatible = "qcom,sa8775p-gcc";
827 #clock-cells = <1>;
828 #reset-cells = <1>;
829 #power-domain-cells = <1>;
845 power-domains = <&rpmhpd SA8775P_CX>;
849 compatible = "qcom,sa8775p-ipcc", "qcom,ipcc";
852 interrupt-controller;
853 #interrupt-cells = <3>;
854 #mbox-cells = <2>;
857 gpi_dma2: qcom,gpi-dma@800000 {
858 compatible = "qcom,sm6350-gpi-dma";
860 #dma-cells = <3>;
873 dma-channels = <12>;
874 dma-channel-mask = <0xfff>;
880 compatible = "qcom,geni-se-qup";
885 clock-names = "m-ahb", "s-ahb";
887 #address-cells = <2>;
888 #size-cells = <2>;
892 compatible = "qcom,geni-i2c";
894 #address-cells = <1>;
895 #size-cells = <0>;
898 clock-names = "se";
905 interconnect-names = "qup-core",
906 "qup-config",
907 "qup-memory";
908 power-domains = <&rpmhpd SA8775P_CX>;
911 dma-names = "tx",
912 "rx";
917 compatible = "qcom,geni-spi";
919 #address-cells = <1>;
920 #size-cells = <0>;
923 clock-names = "se";
930 interconnect-names = "qup-core",
931 "qup-config",
932 "qup-memory";
933 power-domains = <&rpmhpd SA8775P_CX>;
936 dma-names = "tx",
937 "rx";
942 compatible = "qcom,geni-uart";
946 clock-names = "se";
951 interconnect-names = "qup-core", "qup-config";
952 power-domains = <&rpmhpd SA8775P_CX>;
957 compatible = "qcom,geni-i2c";
959 #address-cells = <1>;
960 #size-cells = <0>;
963 clock-names = "se";
970 interconnect-names = "qup-core",
971 "qup-config",
972 "qup-memory";
973 power-domains = <&rpmhpd SA8775P_CX>;
976 dma-names = "tx",
977 "rx";
982 compatible = "qcom,geni-spi";
984 #address-cells = <1>;
985 #size-cells = <0>;
988 clock-names = "se";
995 interconnect-names = "qup-core",
996 "qup-config",
997 "qup-memory";
998 power-domains = <&rpmhpd SA8775P_CX>;
1001 dma-names = "tx",
1002 "rx";
1007 compatible = "qcom,geni-uart";
1011 clock-names = "se";
1016 interconnect-names = "qup-core", "qup-config";
1017 power-domains = <&rpmhpd SA8775P_CX>;
1022 compatible = "qcom,geni-i2c";
1024 #address-cells = <1>;
1025 #size-cells = <0>;
1028 clock-names = "se";
1035 interconnect-names = "qup-core",
1036 "qup-config",
1037 "qup-memory";
1038 power-domains = <&rpmhpd SA8775P_CX>;
1041 dma-names = "tx",
1042 "rx";
1047 compatible = "qcom,geni-spi";
1051 clock-names = "se";
1058 interconnect-names = "qup-core",
1059 "qup-config",
1060 "qup-memory";
1061 power-domains = <&rpmhpd SA8775P_CX>;
1064 dma-names = "tx",
1065 "rx";
1066 #address-cells = <1>;
1067 #size-cells = <0>;
1072 compatible = "qcom,geni-uart";
1076 clock-names = "se";
1081 interconnect-names = "qup-core", "qup-config";
1082 power-domains = <&rpmhpd SA8775P_CX>;
1087 compatible = "qcom,geni-i2c";
1089 #address-cells = <1>;
1090 #size-cells = <0>;
1093 clock-names = "se";
1100 interconnect-names = "qup-core",
1101 "qup-config",
1102 "qup-memory";
1103 power-domains = <&rpmhpd SA8775P_CX>;
1106 dma-names = "tx",
1107 "rx";
1112 compatible = "qcom,geni-spi";
1114 #address-cells = <1>;
1115 #size-cells = <0>;
1118 clock-names = "se";
1125 interconnect-names = "qup-core",
1126 "qup-config",
1127 "qup-memory";
1128 power-domains = <&rpmhpd SA8775P_CX>;
1131 dma-names = "tx",
1132 "rx";
1137 compatible = "qcom,geni-uart";
1141 clock-names = "se";
1146 interconnect-names = "qup-core", "qup-config";
1147 power-domains = <&rpmhpd SA8775P_CX>;
1152 compatible = "qcom,geni-i2c";
1156 clock-names = "se";
1163 interconnect-names = "qup-core",
1164 "qup-config",
1165 "qup-memory";
1166 power-domains = <&rpmhpd SA8775P_CX>;
1169 dma-names = "tx",
1170 "rx";
1171 #address-cells = <1>;
1172 #size-cells = <0>;
1177 compatible = "qcom,geni-spi";
1179 #address-cells = <1>;
1180 #size-cells = <0>;
1183 clock-names = "se";
1190 interconnect-names = "qup-core",
1191 "qup-config",
1192 "qup-memory";
1193 power-domains = <&rpmhpd SA8775P_CX>;
1196 dma-names = "tx",
1197 "rx";
1202 compatible = "qcom,geni-uart";
1206 clock-names = "se";
1211 interconnect-names = "qup-core", "qup-config";
1212 power-domains = <&rpmhpd SA8775P_CX>;
1217 compatible = "qcom,geni-i2c";
1219 #address-cells = <1>;
1220 #size-cells = <0>;
1223 clock-names = "se";
1230 interconnect-names = "qup-core",
1231 "qup-config",
1232 "qup-memory";
1233 power-domains = <&rpmhpd SA8775P_CX>;
1236 dma-names = "tx",
1237 "rx";
1242 compatible = "qcom,geni-spi";
1244 #address-cells = <1>;
1245 #size-cells = <0>;
1248 clock-names = "se";
1255 interconnect-names = "qup-core",
1256 "qup-config",
1257 "qup-memory";
1258 power-domains = <&rpmhpd SA8775P_CX>;
1261 dma-names = "tx",
1262 "rx";
1267 compatible = "qcom,geni-uart";
1271 clock-names = "se";
1276 interconnect-names = "qup-core", "qup-config";
1277 power-domains = <&rpmhpd SA8775P_CX>;
1282 compatible = "qcom,geni-i2c";
1284 #address-cells = <1>;
1285 #size-cells = <0>;
1288 clock-names = "se";
1295 interconnect-names = "qup-core",
1296 "qup-config",
1297 "qup-memory";
1298 power-domains = <&rpmhpd SA8775P_CX>;
1301 dma-names = "tx",
1302 "rx";
1307 compatible = "qcom,geni-spi";
1309 #address-cells = <1>;
1310 #size-cells = <0>;
1313 clock-names = "se";
1320 interconnect-names = "qup-core",
1321 "qup-config",
1322 "qup-memory";
1323 power-domains = <&rpmhpd SA8775P_CX>;
1326 dma-names = "tx",
1327 "rx";
1332 compatible = "qcom,geni-uart";
1336 clock-names = "se";
1341 interconnect-names = "qup-core", "qup-config";
1342 power-domains = <&rpmhpd SA8775P_CX>;
1348 gpi_dma0: qcom,gpi-dma@900000 {
1349 compatible = "qcom,sm6350-gpi-dma";
1351 #dma-cells = <3>;
1364 dma-channels = <12>;
1365 dma-channel-mask = <0xfff>;
1371 compatible = "qcom,geni-se-qup";
1373 #address-cells = <2>;
1374 #size-cells = <2>;
1376 clock-names = "m-ahb", "s-ahb";
1383 compatible = "qcom,geni-i2c";
1385 #address-cells = <1>;
1386 #size-cells = <0>;
1389 clock-names = "se";
1396 interconnect-names = "qup-core",
1397 "qup-config",
1398 "qup-memory";
1399 power-domains = <&rpmhpd SA8775P_CX>;
1402 dma-names = "tx",
1403 "rx";
1408 compatible = "qcom,geni-spi";
1410 #address-cells = <1>;
1411 #size-cells = <0>;
1414 clock-names = "se";
1421 interconnect-names = "qup-core",
1422 "qup-config",
1423 "qup-memory";
1424 power-domains = <&rpmhpd SA8775P_CX>;
1427 dma-names = "tx",
1428 "rx";
1433 compatible = "qcom,geni-uart";
1437 clock-names = "se";
1442 interconnect-names = "qup-core", "qup-config";
1443 power-domains = <&rpmhpd SA8775P_CX>;
1448 compatible = "qcom,geni-i2c";
1450 #address-cells = <1>;
1451 #size-cells = <0>;
1454 clock-names = "se";
1461 interconnect-names = "qup-core",
1462 "qup-config",
1463 "qup-memory";
1464 power-domains = <&rpmhpd SA8775P_CX>;
1467 dma-names = "tx",
1468 "rx";
1473 compatible = "qcom,geni-spi";
1475 #address-cells = <1>;
1476 #size-cells = <0>;
1479 clock-names = "se";
1486 interconnect-names = "qup-core",
1487 "qup-config",
1488 "qup-memory";
1489 power-domains = <&rpmhpd SA8775P_CX>;
1492 dma-names = "tx",
1493 "rx";
1497 uart1: serial@984000 { label
1498 compatible = "qcom,geni-uart";
1502 clock-names = "se";
1507 interconnect-names = "qup-core", "qup-config";
1508 power-domains = <&rpmhpd SA8775P_CX>;
1513 compatible = "qcom,geni-i2c";
1515 #address-cells = <1>;
1516 #size-cells = <0>;
1519 clock-names = "se";
1526 interconnect-names = "qup-core",
1527 "qup-config",
1528 "qup-memory";
1529 power-domains = <&rpmhpd SA8775P_CX>;
1532 dma-names = "tx",
1533 "rx";
1538 compatible = "qcom,geni-spi";
1540 #address-cells = <1>;
1541 #size-cells = <0>;
1544 clock-names = "se";
1551 interconnect-names = "qup-core",
1552 "qup-config",
1553 "qup-memory";
1554 power-domains = <&rpmhpd SA8775P_CX>;
1557 dma-names = "tx",
1558 "rx";
1563 compatible = "qcom,geni-uart";
1567 clock-names = "se";
1572 interconnect-names = "qup-core", "qup-config";
1573 power-domains = <&rpmhpd SA8775P_CX>;
1578 compatible = "qcom,geni-i2c";
1580 #address-cells = <1>;
1581 #size-cells = <0>;
1584 clock-names = "se";
1591 interconnect-names = "qup-core",
1592 "qup-config",
1593 "qup-memory";
1594 power-domains = <&rpmhpd SA8775P_CX>;
1597 dma-names = "tx",
1598 "rx";
1603 compatible = "qcom,geni-spi";
1605 #address-cells = <1>;
1606 #size-cells = <0>;
1609 clock-names = "se";
1616 interconnect-names = "qup-core",
1617 "qup-config",
1618 "qup-memory";
1619 power-domains = <&rpmhpd SA8775P_CX>;
1622 dma-names = "tx",
1623 "rx";
1628 compatible = "qcom,geni-uart";
1632 clock-names = "se";
1637 interconnect-names = "qup-core", "qup-config";
1638 power-domains = <&rpmhpd SA8775P_CX>;
1643 compatible = "qcom,geni-i2c";
1645 #address-cells = <1>;
1646 #size-cells = <0>;
1649 clock-names = "se";
1656 interconnect-names = "qup-core",
1657 "qup-config",
1658 "qup-memory";
1659 power-domains = <&rpmhpd SA8775P_CX>;
1662 dma-names = "tx",
1663 "rx";
1668 compatible = "qcom,geni-spi";
1670 #address-cells = <1>;
1671 #size-cells = <0>;
1674 clock-names = "se";
1681 interconnect-names = "qup-core",
1682 "qup-config",
1683 "qup-memory";
1684 power-domains = <&rpmhpd SA8775P_CX>;
1687 dma-names = "tx",
1688 "rx";
1693 compatible = "qcom,geni-uart";
1697 clock-names = "se";
1702 interconnect-names = "qup-core", "qup-config";
1703 power-domains = <&rpmhpd SA8775P_CX>;
1708 compatible = "qcom,geni-i2c";
1710 #address-cells = <1>;
1711 #size-cells = <0>;
1714 clock-names = "se";
1721 interconnect-names = "qup-core",
1722 "qup-config",
1723 "qup-memory";
1724 power-domains = <&rpmhpd SA8775P_CX>;
1727 dma-names = "tx",
1728 "rx";
1733 compatible = "qcom,geni-spi";
1735 #address-cells = <1>;
1736 #size-cells = <0>;
1739 clock-names = "se";
1746 interconnect-names = "qup-core",
1747 "qup-config",
1748 "qup-memory";
1749 power-domains = <&rpmhpd SA8775P_CX>;
1752 dma-names = "tx",
1753 "rx";
1758 compatible = "qcom,geni-uart";
1762 clock-names = "se";
1767 interconnect-names = "qup-core", "qup-config";
1768 power-domains = <&rpmhpd SA8775P_CX>;
1773 gpi_dma1: qcom,gpi-dma@a00000 {
1774 compatible = "qcom,sm6350-gpi-dma";
1776 #dma-cells = <3>;
1790 dma-channels = <12>;
1791 dma-channel-mask = <0xfff>;
1796 compatible = "qcom,geni-se-qup";
1798 #address-cells = <2>;
1799 #size-cells = <2>;
1801 clock-names = "m-ahb", "s-ahb";
1808 compatible = "qcom,geni-i2c";
1810 #address-cells = <1>;
1811 #size-cells = <0>;
1814 clock-names = "se";
1821 interconnect-names = "qup-core",
1822 "qup-config",
1823 "qup-memory";
1824 power-domains = <&rpmhpd SA8775P_CX>;
1827 dma-names = "tx",
1828 "rx";
1833 compatible = "qcom,geni-spi";
1835 #address-cells = <1>;
1836 #size-cells = <0>;
1839 clock-names = "se";
1846 interconnect-names = "qup-core",
1847 "qup-config",
1848 "qup-memory";
1849 power-domains = <&rpmhpd SA8775P_CX>;
1852 dma-names = "tx",
1853 "rx";
1858 compatible = "qcom,geni-uart";
1861 clock-names = "se";
1863 interconnect-names = "qup-core", "qup-config";
1868 power-domains = <&rpmhpd SA8775P_CX>;
1869 operating-points-v2 = <&qup_opp_table_100mhz>;
1874 compatible = "qcom,geni-i2c";
1876 #address-cells = <1>;
1877 #size-cells = <0>;
1880 clock-names = "se";
1887 interconnect-names = "qup-core",
1888 "qup-config",
1889 "qup-memory";
1890 power-domains = <&rpmhpd SA8775P_CX>;
1893 dma-names = "tx",
1894 "rx";
1899 compatible = "qcom,geni-spi";
1901 #address-cells = <1>;
1902 #size-cells = <0>;
1905 clock-names = "se";
1912 interconnect-names = "qup-core",
1913 "qup-config",
1914 "qup-memory";
1915 power-domains = <&rpmhpd SA8775P_CX>;
1918 dma-names = "tx",
1919 "rx";
1924 compatible = "qcom,geni-uart";
1927 clock-names = "se";
1929 interconnect-names = "qup-core", "qup-config";
1934 power-domains = <&rpmhpd SA8775P_CX>;
1935 operating-points-v2 = <&qup_opp_table_100mhz>;
1940 compatible = "qcom,geni-i2c";
1942 #address-cells = <1>;
1943 #size-cells = <0>;
1946 clock-names = "se";
1953 interconnect-names = "qup-core",
1954 "qup-config",
1955 "qup-memory";
1956 power-domains = <&rpmhpd SA8775P_CX>;
1959 dma-names = "tx",
1960 "rx";
1965 compatible = "qcom,geni-spi";
1967 #address-cells = <1>;
1968 #size-cells = <0>;
1971 clock-names = "se";
1978 interconnect-names = "qup-core",
1979 "qup-config",
1980 "qup-memory";
1981 power-domains = <&rpmhpd SA8775P_CX>;
1984 dma-names = "tx",
1985 "rx";
1990 compatible = "qcom,geni-uart";
1994 clock-names = "se";
1999 interconnect-names = "qup-core", "qup-config";
2000 power-domains = <&rpmhpd SA8775P_CX>;
2005 compatible = "qcom,geni-i2c";
2007 #address-cells = <1>;
2008 #size-cells = <0>;
2011 clock-names = "se";
2018 interconnect-names = "qup-core",
2019 "qup-config",
2020 "qup-memory";
2021 power-domains = <&rpmhpd SA8775P_CX>;
2024 dma-names = "tx",
2025 "rx";
2030 compatible = "qcom,geni-spi";
2032 #address-cells = <1>;
2033 #size-cells = <0>;
2036 clock-names = "se";
2043 interconnect-names = "qup-core",
2044 "qup-config",
2045 "qup-memory";
2046 power-domains = <&rpmhpd SA8775P_CX>;
2049 dma-names = "tx",
2050 "rx";
2055 compatible = "qcom,geni-uart";
2058 clock-names = "se";
2060 interconnect-names = "qup-core", "qup-config";
2065 power-domains = <&rpmhpd SA8775P_CX>;
2066 operating-points-v2 = <&qup_opp_table_100mhz>;
2071 compatible = "qcom,geni-i2c";
2073 #address-cells = <1>;
2074 #size-cells = <0>;
2077 clock-names = "se";
2084 interconnect-names = "qup-core",
2085 "qup-config",
2086 "qup-memory";
2087 power-domains = <&rpmhpd SA8775P_CX>;
2090 dma-names = "tx",
2091 "rx";
2096 compatible = "qcom,geni-spi";
2098 #address-cells = <1>;
2099 #size-cells = <0>;
2102 clock-names = "se";
2109 interconnect-names = "qup-core",
2110 "qup-config",
2111 "qup-memory";
2112 power-domains = <&rpmhpd SA8775P_CX>;
2115 dma-names = "tx",
2116 "rx";
2121 compatible = "qcom,geni-uart";
2124 clock-names = "se";
2126 interconnect-names = "qup-core", "qup-config";
2131 power-domains = <&rpmhpd SA8775P_CX>;
2132 operating-points-v2 = <&qup_opp_table_100mhz>;
2137 compatible = "qcom,geni-i2c";
2139 #address-cells = <1>;
2140 #size-cells = <0>;
2143 clock-names = "se";
2150 interconnect-names = "qup-core",
2151 "qup-config",
2152 "qup-memory";
2153 power-domains = <&rpmhpd SA8775P_CX>;
2156 dma-names = "tx",
2157 "rx";
2162 compatible = "qcom,geni-spi";
2164 #address-cells = <1>;
2165 #size-cells = <0>;
2168 clock-names = "se";
2175 interconnect-names = "qup-core",
2176 "qup-config",
2177 "qup-memory";
2178 power-domains = <&rpmhpd SA8775P_CX>;
2181 dma-names = "tx",
2182 "rx";
2187 compatible = "qcom,geni-uart";
2191 clock-names = "se";
2196 interconnect-names = "qup-core", "qup-config";
2197 power-domains = <&rpmhpd SA8775P_CX>;
2202 compatible = "qcom,geni-i2c";
2204 #address-cells = <1>;
2205 #size-cells = <0>;
2208 clock-names = "se";
2215 interconnect-names = "qup-core",
2216 "qup-config",
2217 "qup-memory";
2218 power-domains = <&rpmhpd SA8775P_CX>;
2221 dma-names = "tx",
2222 "rx";
2228 gpi_dma3: qcom,gpi-dma@b00000 {
2229 compatible = "qcom,sm6350-gpi-dma";
2231 #dma-cells = <3>;
2237 dma-channels = <4>;
2238 dma-channel-mask = <0xf>;
2243 compatible = "qcom,geni-se-qup";
2245 #address-cells = <2>;
2246 #size-cells = <2>;
2248 clock-names = "m-ahb", "s-ahb";
2255 compatible = "qcom,geni-i2c";
2257 #address-cells = <1>;
2258 #size-cells = <0>;
2261 clock-names = "se";
2268 interconnect-names = "qup-core",
2269 "qup-config",
2270 "qup-memory";
2271 power-domains = <&rpmhpd SA8775P_CX>;
2274 dma-names = "tx",
2275 "rx";
2280 compatible = "qcom,geni-spi";
2282 #address-cells = <1>;
2283 #size-cells = <0>;
2286 clock-names = "se";
2293 interconnect-names = "qup-core",
2294 "qup-config",
2295 "qup-memory";
2296 power-domains = <&rpmhpd SA8775P_CX>;
2299 dma-names = "tx",
2300 "rx";
2305 compatible = "qcom,geni-uart";
2308 clock-names = "se";
2310 interconnect-names = "qup-core", "qup-config";
2315 power-domains = <&rpmhpd SA8775P_CX>;
2316 operating-points-v2 = <&qup_opp_table_100mhz>;
2322 compatible = "qcom,sa8775p-trng", "qcom,trng";
2327 compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
2331 phy-names = "ufsphy";
2332 lanes-per-direction = <2>;
2333 #reset-cells = <1>;
2335 reset-names = "rst";
2336 power-domains = <&gcc UFS_PHY_GDSC>;
2337 required-opps = <&rpmhpd_opp_nom>;
2339 dma-coherent;
2348 clock-names = "core_clk",
2356 freq-table-hz = <75000000 300000000>,
2369 compatible = "qcom,sa8775p-qmp-ufs-phy";
2378 clock-names = "ref", "ref_aux", "qref";
2379 power-domains = <&gcc UFS_PHY_GDSC>;
2381 reset-names = "ufsphy";
2382 #phy-cells = <0>;
2387 compatible = "qcom,sa8775p-inline-crypto-engine",
2388 "qcom,inline-crypto-engine";
2393 cryptobam: dma-controller@1dc4000 {
2394 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
2397 #dma-cells = <1>;
2399 qcom,controlled-remotely;
2405 compatible = "qcom,sa8775p-qce", "qcom,qce";
2408 dma-names = "rx", "tx";
2412 interconnect-names = "memory";
2416 compatible = "arm,coresight-stm", "arm,primecell";
2419 reg-names = "stm-base", "stm-stimulus-base";
2422 clock-names = "apb_pclk";
2424 out-ports {
2427 remote-endpoint =
2435 compatible = "qcom,coresight-tpdm", "arm,primecell";
2439 clock-names = "apb_pclk";
2441 qcom,cmb-element-bits = <32>;
2442 qcom,cmb-msrs-num = <32>;
2444 out-ports {
2447 remote-endpoint =
2455 compatible = "qcom,coresight-tpda", "arm,primecell";
2459 clock-names = "apb_pclk";
2461 out-ports {
2464 remote-endpoint =
2470 in-ports {
2471 #address-cells = <1>;
2472 #size-cells = <0>;
2477 remote-endpoint =
2485 remote-endpoint =
2493 compatible = "qcom,coresight-tpdm", "arm,primecell";
2497 clock-names = "apb_pclk";
2499 qcom,cmb-element-bits = <32>;
2500 qcom,cmb-msrs-num = <32>;
2502 out-ports {
2505 remote-endpoint =
2513 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2517 clock-names = "apb_pclk";
2519 out-ports {
2522 remote-endpoint =
2528 in-ports {
2529 #address-cells = <1>;
2530 #size-cells = <0>;
2535 remote-endpoint =
2543 remote-endpoint =
2551 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2555 clock-names = "apb_pclk";
2557 out-ports {
2560 remote-endpoint =
2566 in-ports {
2567 #address-cells = <1>;
2568 #size-cells = <0>;
2573 remote-endpoint =
2581 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2585 clock-names = "apb_pclk";
2587 out-ports {
2590 remote-endpoint =
2596 in-ports {
2597 #address-cells = <1>;
2598 #size-cells = <0>;
2603 remote-endpoint =
2611 remote-endpoint =
2619 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2623 clock-names = "apb_pclk";
2625 out-ports {
2628 remote-endpoint =
2634 in-ports {
2635 #address-cells = <1>;
2636 #size-cells = <0>;
2641 remote-endpoint =
2649 remote-endpoint =
2657 compatible = "arm,coresight-tmc", "arm,primecell";
2661 clock-names = "apb_pclk";
2663 out-ports {
2666 remote-endpoint =
2672 in-ports {
2675 remote-endpoint =
2683 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
2687 clock-names = "apb_pclk";
2689 out-ports {
2690 #address-cells = <1>;
2691 #size-cells = <0>;
2696 remote-endpoint =
2702 in-ports {
2705 remote-endpoint =
2713 compatible = "qcom,coresight-tpda", "arm,primecell";
2717 clock-names = "apb_pclk";
2719 out-ports {
2722 remote-endpoint =
2728 in-ports {
2729 #address-cells = <1>;
2730 #size-cells = <0>;
2735 remote-endpoint =
2743 remote-endpoint =
2751 remote-endpoint =
2759 remote-endpoint =
2767 remote-endpoint =
2775 compatible = "qcom,coresight-tpdm", "arm,primecell";
2779 clock-names = "apb_pclk";
2781 qcom,cmb-element-bits = <64>;
2782 qcom,cmb-msrs-num = <32>;
2784 out-ports {
2787 remote-endpoint =
2795 compatible = "qcom,coresight-tpdm", "arm,primecell";
2799 clock-names = "apb_pclk";
2801 qcom,cmb-element-bits = <64>;
2802 qcom,cmb-msrs-num = <32>;
2804 out-ports {
2807 remote-endpoint =
2815 compatible = "qcom,coresight-tpdm", "arm,primecell";
2819 clock-names = "apb_pclk";
2821 qcom,cmb-element-bits = <64>;
2822 qcom,cmb-msrs-num = <32>;
2824 out-ports {
2827 remote-endpoint =
2835 compatible = "qcom,coresight-tpdm", "arm,primecell";
2839 clock-names = "apb_pclk";
2841 qcom,cmb-element-bits = <64>;
2842 qcom,cmb-msrs-num = <32>;
2844 out-ports {
2847 remote-endpoint =
2855 compatible = "qcom,coresight-tpdm", "arm,primecell";
2859 clock-names = "apb_pclk";
2861 qcom,dsb-element-bits = <32>;
2862 qcom,dsb-msrs-num = <32>;
2864 out-ports {
2867 remote-endpoint =
2875 compatible = "arm,coresight-cti", "arm,primecell";
2879 clock-names = "apb_pclk";
2888 clock-names = "apb_pclk";
2889 arm,coresight-loses-context-with-cpu;
2890 qcom,skip-power-up;
2892 out-ports {
2895 remote-endpoint =
2908 clock-names = "apb_pclk";
2909 arm,coresight-loses-context-with-cpu;
2910 qcom,skip-power-up;
2912 out-ports {
2915 remote-endpoint =
2928 clock-names = "apb_pclk";
2929 arm,coresight-loses-context-with-cpu;
2930 qcom,skip-power-up;
2932 out-ports {
2935 remote-endpoint =
2948 clock-names = "apb_pclk";
2949 arm,coresight-loses-context-with-cpu;
2950 qcom,skip-power-up;
2952 out-ports {
2955 remote-endpoint =
2968 clock-names = "apb_pclk";
2969 arm,coresight-loses-context-with-cpu;
2970 qcom,skip-power-up;
2972 out-ports {
2975 remote-endpoint =
2988 clock-names = "apb_pclk";
2989 arm,coresight-loses-context-with-cpu;
2990 qcom,skip-power-up;
2992 out-ports {
2995 remote-endpoint =
3008 clock-names = "apb_pclk";
3009 arm,coresight-loses-context-with-cpu;
3010 qcom,skip-power-up;
3012 out-ports {
3015 remote-endpoint =
3028 clock-names = "apb_pclk";
3029 arm,coresight-loses-context-with-cpu;
3030 qcom,skip-power-up;
3032 out-ports {
3035 remote-endpoint =
3043 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
3047 clock-names = "apb_pclk";
3049 out-ports {
3052 remote-endpoint =
3058 in-ports {
3059 #address-cells = <1>;
3060 #size-cells = <0>;
3065 remote-endpoint =
3073 remote-endpoint =
3081 remote-endpoint =
3089 remote-endpoint =
3097 remote-endpoint =
3105 remote-endpoint =
3113 remote-endpoint =
3121 remote-endpoint =
3129 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
3133 clock-names = "apb_pclk";
3135 out-ports {
3138 remote-endpoint =
3144 in-ports {
3145 #address-cells = <1>;
3146 #size-cells = <0>;
3151 remote-endpoint =
3159 remote-endpoint =
3167 compatible = "qcom,coresight-tpdm", "arm,primecell";
3171 clock-names = "apb_pclk";
3173 qcom,cmb-element-bits = <64>;
3174 qcom,cmb-msrs-num = <32>;
3176 out-ports {
3179 remote-endpoint =
3187 compatible = "qcom,coresight-tpdm", "arm,primecell";
3191 clock-names = "apb_pclk";
3193 qcom,dsb-element-bits = <32>;
3194 qcom,dsb-msrs-num = <32>;
3196 out-ports {
3199 remote-endpoint =
3207 compatible = "qcom,coresight-tpda", "arm,primecell";
3211 clock-names = "apb_pclk";
3213 out-ports {
3216 remote-endpoint =
3222 in-ports {
3223 #address-cells = <1>;
3224 #size-cells = <0>;
3229 remote-endpoint =
3237 remote-endpoint =
3245 remote-endpoint =
3253 remote-endpoint =
3261 remote-endpoint =
3269 compatible = "qcom,coresight-tpdm", "arm,primecell";
3273 clock-names = "apb_pclk";
3275 qcom,cmb-element-bits = <32>;
3276 qcom,cmb-msrs-num = <32>;
3278 out-ports {
3281 remote-endpoint =
3289 compatible = "qcom,coresight-tpdm", "arm,primecell";
3293 clock-names = "apb_pclk";
3295 qcom,cmb-element-bits = <32>;
3296 qcom,cmb-msrs-num = <32>;
3298 out-ports {
3301 remote-endpoint =
3309 compatible = "qcom,coresight-tpdm", "arm,primecell";
3313 clock-names = "apb_pclk";
3315 qcom,dsb-element-bits = <32>;
3316 qcom,dsb-msrs-num = <32>;
3318 out-ports {
3321 remote-endpoint =
3329 compatible = "qcom,sa8775p-usb-hs-phy",
3330 "qcom,usb-snps-hs-5nm-phy";
3333 clock-names = "ref";
3336 #phy-cells = <0>;
3342 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
3349 clock-names = "aux", "ref", "com_aux", "pipe";
3353 reset-names = "phy", "phy_phy";
3355 power-domains = <&gcc USB30_PRIM_GDSC>;
3357 #clock-cells = <0>;
3358 clock-output-names = "usb3_prim_phy_pipe_clk_src";
3360 #phy-cells = <0>;
3366 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3368 #address-cells = <2>;
3369 #size-cells = <2>;
3377 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3379 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
3381 assigned-clock-rates = <19200000>, <200000000>;
3383 interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
3388 interrupt-names = "pwr_event",
3394 power-domains = <&gcc USB30_PRIM_GDSC>;
3395 required-opps = <&rpmhpd_opp_nom>;
3401 interconnect-names = "usb-ddr", "apps-usb";
3403 wakeup-source;
3413 phy-names = "usb2-phy", "usb3-phy";
3418 compatible = "qcom,sa8775p-usb-hs-phy",
3419 "qcom,usb-snps-hs-5nm-phy";
3422 clock-names = "ref";
3425 #phy-cells = <0>;
3431 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
3438 clock-names = "aux", "ref", "com_aux", "pipe";
3442 reset-names = "phy", "phy_phy";
3444 power-domains = <&gcc USB30_SEC_GDSC>;
3446 #clock-cells = <0>;
3447 clock-output-names = "usb3_sec_phy_pipe_clk_src";
3449 #phy-cells = <0>;
3455 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3457 #address-cells = <2>;
3458 #size-cells = <2>;
3466 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3468 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
3470 assigned-clock-rates = <19200000>, <200000000>;
3472 interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
3477 interrupt-names = "pwr_event",
3483 power-domains = <&gcc USB30_SEC_GDSC>;
3484 required-opps = <&rpmhpd_opp_nom>;
3490 interconnect-names = "usb-ddr", "apps-usb";
3492 wakeup-source;
3502 phy-names = "usb2-phy", "usb3-phy";
3507 compatible = "qcom,sa8775p-usb-hs-phy",
3508 "qcom,usb-snps-hs-5nm-phy";
3511 clock-names = "ref";
3514 #phy-cells = <0>;
3520 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3522 #address-cells = <2>;
3523 #size-cells = <2>;
3531 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3533 assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
3535 assigned-clock-rates = <19200000>, <200000000>;
3537 interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
3541 interrupt-names = "pwr_event",
3546 power-domains = <&gcc USB20_PRIM_GDSC>;
3547 required-opps = <&rpmhpd_opp_nom>;
3553 interconnect-names = "usb-ddr", "apps-usb";
3555 wakeup-source;
3565 phy-names = "usb2-phy";
3570 compatible = "qcom,tcsr-mutex";
3572 #hwlock-cells = <1>;
3576 compatible = "qcom,sa8775p-tcsr", "syscon";
3580 gpucc: clock-controller@3d90000 {
3581 compatible = "qcom,sa8775p-gpucc";
3586 clock-names = "bi_tcxo",
3589 #clock-cells = <1>;
3590 #reset-cells = <1>;
3591 #power-domain-cells = <1>;
3595 compatible = "qcom,sa8775p-smmu-500", "qcom,adreno-smmu",
3596 "qcom,smmu-500", "arm,mmu-500";
3598 #iommu-cells = <2>;
3599 #global-interrupts = <2>;
3600 dma-coherent;
3601 power-domains = <&gpucc GPU_CC_CX_GDSC>;
3609 clock-names = "gcc_gpu_memnoc_gfx_clk",
3631 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
3634 clock-names = "sgmi_ref";
3635 #phy-cells = <0>;
3640 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
3643 clock-names = "sgmi_ref";
3644 #phy-cells = <0>;
3649 compatible = "qcom,sa8775p-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
3655 operating-points-v2 = <&llcc_bwmon_opp_table>;
3657 llcc_bwmon_opp_table: opp-table {
3658 compatible = "operating-points-v2";
3660 opp-0 {
3661 opp-peak-kBps = <762000>;
3664 opp-1 {
3665 opp-peak-kBps = <1720000>;
3668 opp-2 {
3669 opp-peak-kBps = <2086000>;
3672 opp-3 {
3673 opp-peak-kBps = <2601000>;
3676 opp-4 {
3677 opp-peak-kBps = <2929000>;
3680 opp-5 {
3681 opp-peak-kBps = <5931000>;
3684 opp-6 {
3685 opp-peak-kBps = <6515000>;
3688 opp-7 {
3689 opp-peak-kBps = <7984000>;
3692 opp-8 {
3693 opp-peak-kBps = <10437000>;
3696 opp-9 {
3697 opp-peak-kBps = <12195000>;
3703 compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
3709 operating-points-v2 = <&cpu_bwmon_opp_table>;
3711 cpu_bwmon_opp_table: opp-table {
3712 compatible = "operating-points-v2";
3714 opp-0 {
3715 opp-peak-kBps = <9155000>;
3718 opp-1 {
3719 opp-peak-kBps = <12298000>;
3722 opp-2 {
3723 opp-peak-kBps = <14236000>;
3726 opp-3 {
3727 opp-peak-kBps = <16265000>;
3734 compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
3740 operating-points-v2 = <&cpu_bwmon_opp_table>;
3743 llcc: system-cache-controller@9200000 {
3744 compatible = "qcom,sa8775p-llcc";
3752 reg-names = "llcc0_base",
3762 pdc: interrupt-controller@b220000 {
3763 compatible = "qcom,sa8775p-pdc", "qcom,pdc";
3766 qcom,pdc-ranges = <0 480 40>,
3804 #interrupt-cells = <2>;
3805 interrupt-parent = <&intc>;
3806 interrupt-controller;
3809 tsens2: thermal-sensor@c251000 {
3810 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3816 interrupt-names = "uplow", "critical";
3817 #thermal-sensor-cells = <1>;
3820 tsens3: thermal-sensor@c252000 {
3821 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3827 interrupt-names = "uplow", "critical";
3828 #thermal-sensor-cells = <1>;
3831 tsens0: thermal-sensor@c263000 {
3832 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3838 interrupt-names = "uplow", "critical";
3839 #thermal-sensor-cells = <1>;
3842 tsens1: thermal-sensor@c265000 {
3843 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
3849 interrupt-names = "uplow", "critical";
3850 #thermal-sensor-cells = <1>;
3853 aoss_qmp: power-management@c300000 {
3854 compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
3856 interrupts-extended = <&ipcc IPCC_CLIENT_AOP
3860 #clock-cells = <0>;
3864 compatible = "qcom,rpmh-stats";
3869 compatible = "qcom,spmi-pmic-arb";
3875 reg-names = "core",
3882 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3883 interrupt-names = "periph_irq";
3884 interrupt-controller;
3885 #interrupt-cells = <4>;
3886 #address-cells = <2>;
3887 #size-cells = <0>;
3891 compatible = "qcom,sa8775p-tlmm";
3894 gpio-controller;
3895 #gpio-cells = <2>;
3896 interrupt-controller;
3897 #interrupt-cells = <2>;
3898 gpio-ranges = <&tlmm 0 0 149>;
3899 wakeup-parent = <&pdc>;
3903 compatible = "qcom,sa8775p-imem", "syscon", "simple-mfd";
3907 #address-cells = <1>;
3908 #size-cells = <1>;
3910 pil-reloc@94c {
3911 compatible = "qcom,pil-reloc-info";
3917 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
3919 #iommu-cells = <2>;
3920 #global-interrupts = <2>;
3921 dma-coherent;
4056 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
4058 #iommu-cells = <2>;
4059 #global-interrupts = <2>;
4060 dma-coherent;
4130 intc: interrupt-controller@17a00000 {
4131 compatible = "arm,gic-v3";
4134 interrupt-controller;
4135 #interrupt-cells = <3>;
4137 #redistributor-regions = <1>;
4138 redistributor-stride = <0x0 0x20000>;
4142 compatible = "qcom,apss-wdt-sa8775p", "qcom,kpss-wdt";
4149 compatible = "arm,armv7-timer-mem";
4152 #address-cells = <1>;
4153 #size-cells = <1>;
4160 frame-number = <0>;
4166 frame-number = <1>;
4173 frame-number = <2>;
4180 frame-number = <3>;
4187 frame-number = <4>;
4194 frame-number = <5>;
4201 frame-number = <6>;
4207 compatible = "qcom,rpmh-rsc";
4211 reg-names = "drv-0", "drv-1", "drv-2";
4215 qcom,tcs-offset = <0xd00>;
4216 qcom,drv-id = <2>;
4217 qcom,tcs-config = <ACTIVE_TCS 2>,
4223 apps_bcm_voter: bcm-voter {
4224 compatible = "qcom,bcm-voter";
4227 rpmhcc: clock-controller {
4228 compatible = "qcom,sa8775p-rpmh-clk";
4229 #clock-cells = <1>;
4230 clock-names = "xo";
4234 rpmhpd: power-controller {
4235 compatible = "qcom,sa8775p-rpmhpd";
4236 #power-domain-cells = <1>;
4237 operating-points-v2 = <&rpmhpd_opp_table>;
4239 rpmhpd_opp_table: opp-table {
4240 compatible = "operating-points-v2";
4242 rpmhpd_opp_ret: opp-0 {
4243 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
4246 rpmhpd_opp_min_svs: opp-1 {
4247 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
4251 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
4255 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
4258 rpmhpd_opp_svs_l1: opp-4 {
4259 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
4262 rpmhpd_opp_nom: opp-5 {
4263 opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
4266 rpmhpd_opp_nom_l1: opp-6 {
4267 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
4270 rpmhpd_opp_nom_l2: opp-7 {
4271 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
4274 rpmhpd_opp_turbo: opp-8 {
4275 opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
4278 rpmhpd_opp_turbo_l1: opp-9 {
4279 opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
4286 compatible = "qcom,sa8775p-cpufreq-epss",
4287 "qcom,cpufreq-epss";
4290 reg-names = "freq-domain0", "freq-domain1";
4293 clock-names = "xo", "alternate";
4295 #freq-domain-cells = <1>;
4299 compatible = "qcom,sa8775p-gpdsp0-pas";
4302 interrupts-extended = <&intc GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
4307 interrupt-names = "wdog", "fatal", "ready",
4308 "handover", "stop-ack";
4311 clock-names = "xo";
4313 power-domains = <&rpmhpd RPMHPD_CX>,
4315 power-domain-names = "cx", "mxc";
4320 memory-region = <&pil_gdsp0_mem>;
4324 qcom,smem-states = <&smp2p_gpdsp0_out 0>;
4325 qcom,smem-state-names = "stop";
4329 glink-edge {
4330 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
4337 qcom,remote-pid = <17>;
4342 compatible = "qcom,sa8775p-gpdsp1-pas";
4345 interrupts-extended = <&intc GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
4350 interrupt-names = "wdog", "fatal", "ready",
4351 "handover", "stop-ack";
4354 clock-names = "xo";
4356 power-domains = <&rpmhpd RPMHPD_CX>,
4358 power-domain-names = "cx", "mxc";
4363 memory-region = <&pil_gdsp1_mem>;
4367 qcom,smem-states = <&smp2p_gpdsp1_out 0>;
4368 qcom,smem-state-names = "stop";
4372 glink-edge {
4373 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
4380 qcom,remote-pid = <18>;
4385 compatible = "qcom,sa8775p-ethqos";
4388 reg-names = "stmmaceth", "rgmii";
4392 interrupt-names = "macirq", "sfty";
4398 clock-names = "stmmaceth",
4407 interconnect-names = "mac-mem", "cpu-mac";
4409 power-domains = <&gcc EMAC1_GDSC>;
4412 phy-names = "serdes";
4415 dma-coherent;
4419 rx-fifo-depth = <16384>;
4420 tx-fifo-depth = <16384>;
4426 compatible = "qcom,sa8775p-ethqos";
4429 reg-names = "stmmaceth", "rgmii";
4433 interrupt-names = "macirq", "sfty";
4439 clock-names = "stmmaceth",
4448 interconnect-names = "mac-mem", "cpu-mac";
4450 power-domains = <&gcc EMAC0_GDSC>;
4453 phy-names = "serdes";
4456 dma-coherent;
4460 rx-fifo-depth = <16384>;
4461 tx-fifo-depth = <16384>;
4467 compatible = "qcom,sa8775p-cdsp0-pas";
4470 interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
4475 interrupt-names = "wdog", "fatal", "ready",
4476 "handover", "stop-ack";
4479 clock-names = "xo";
4481 power-domains = <&rpmhpd RPMHPD_CX>,
4484 power-domain-names = "cx", "mxc", "nsp";
4489 memory-region = <&pil_cdsp0_mem>;
4493 qcom,smem-states = <&smp2p_cdsp0_out 0>;
4494 qcom,smem-state-names = "stop";
4498 glink-edge {
4499 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
4506 qcom,remote-pid = <5>;
4510 qcom,glink-channels = "fastrpcglink-apps-dsp";
4512 #address-cells = <1>;
4513 #size-cells = <0>;
4515 compute-cb@1 {
4516 compatible = "qcom,fastrpc-compute-cb";
4528 dma-coherent;
4531 compute-cb@2 {
4532 compatible = "qcom,fastrpc-compute-cb";
4544 dma-coherent;
4547 compute-cb@3 {
4548 compatible = "qcom,fastrpc-compute-cb";
4560 dma-coherent;
4563 compute-cb@4 {
4564 compatible = "qcom,fastrpc-compute-cb";
4576 dma-coherent;
4579 compute-cb@5 {
4580 compatible = "qcom,fastrpc-compute-cb";
4592 dma-coherent;
4595 compute-cb@6 {
4596 compatible = "qcom,fastrpc-compute-cb";
4608 dma-coherent;
4611 compute-cb@7 {
4612 compatible = "qcom,fastrpc-compute-cb";
4624 dma-coherent;
4627 compute-cb@8 {
4628 compatible = "qcom,fastrpc-compute-cb";
4640 dma-coherent;
4643 compute-cb@9 {
4644 compatible = "qcom,fastrpc-compute-cb";
4656 dma-coherent;
4659 compute-cb@10 {
4660 compatible = "qcom,fastrpc-compute-cb";
4672 dma-coherent;
4675 compute-cb@11 {
4676 compatible = "qcom,fastrpc-compute-cb";
4688 dma-coherent;
4695 compatible = "qcom,sa8775p-cdsp1-pas";
4698 interrupts-extended = <&intc GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
4703 interrupt-names = "wdog", "fatal", "ready",
4704 "handover", "stop-ack";
4707 clock-names = "xo";
4709 power-domains = <&rpmhpd RPMHPD_CX>,
4712 power-domain-names = "cx", "mxc", "nsp";
4717 memory-region = <&pil_cdsp1_mem>;
4721 qcom,smem-states = <&smp2p_cdsp1_out 0>;
4722 qcom,smem-state-names = "stop";
4726 glink-edge {
4727 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
4734 qcom,remote-pid = <12>;
4738 qcom,glink-channels = "fastrpcglink-apps-dsp";
4740 #address-cells = <1>;
4741 #size-cells = <0>;
4743 compute-cb@1 {
4744 compatible = "qcom,fastrpc-compute-cb";
4756 dma-coherent;
4759 compute-cb@2 {
4760 compatible = "qcom,fastrpc-compute-cb";
4772 dma-coherent;
4775 compute-cb@3 {
4776 compatible = "qcom,fastrpc-compute-cb";
4788 dma-coherent;
4791 compute-cb@4 {
4792 compatible = "qcom,fastrpc-compute-cb";
4804 dma-coherent;
4807 compute-cb@5 {
4808 compatible = "qcom,fastrpc-compute-cb";
4820 dma-coherent;
4823 compute-cb@6 {
4824 compatible = "qcom,fastrpc-compute-cb";
4836 dma-coherent;
4839 compute-cb@7 {
4840 compatible = "qcom,fastrpc-compute-cb";
4852 dma-coherent;
4855 compute-cb@8 {
4856 compatible = "qcom,fastrpc-compute-cb";
4868 dma-coherent;
4871 compute-cb@9 {
4872 compatible = "qcom,fastrpc-compute-cb";
4884 dma-coherent;
4887 compute-cb@10 {
4888 compatible = "qcom,fastrpc-compute-cb";
4900 dma-coherent;
4903 compute-cb@11 {
4904 compatible = "qcom,fastrpc-compute-cb";
4916 dma-coherent;
4919 compute-cb@12 {
4920 compatible = "qcom,fastrpc-compute-cb";
4932 dma-coherent;
4935 compute-cb@13 {
4936 compatible = "qcom,fastrpc-compute-cb";
4948 dma-coherent;
4955 compatible = "qcom,sa8775p-adsp-pas";
4958 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
4963 interrupt-names = "wdog", "fatal", "ready", "handover",
4964 "stop-ack";
4967 clock-names = "xo";
4969 power-domains = <&rpmhpd RPMHPD_LCX>,
4971 power-domain-names = "lcx", "lmx";
4975 memory-region = <&pil_adsp_mem>;
4979 qcom,smem-states = <&smp2p_adsp_out 0>;
4980 qcom,smem-state-names = "stop";
4984 remoteproc_adsp_glink: glink-edge {
4985 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
4992 qcom,remote-pid = <2>;
4996 qcom,glink-channels = "fastrpcglink-apps-dsp";
4998 memory-region = <&adsp_rpc_remote_heap_mem>;
5001 #address-cells = <1>;
5002 #size-cells = <0>;
5004 compute-cb@3 {
5005 compatible = "qcom,fastrpc-compute-cb";
5008 dma-coherent;
5011 compute-cb@4 {
5012 compatible = "qcom,fastrpc-compute-cb";
5015 dma-coherent;
5018 compute-cb@5 {
5019 compatible = "qcom,fastrpc-compute-cb";
5023 dma-coherent;
5030 thermal-zones {
5031 aoss-0-thermal {
5032 thermal-sensors = <&tsens0 0>;
5035 trip-point0 {
5041 trip-point1 {
5049 cpu-0-0-0-thermal {
5050 polling-delay-passive = <10>;
5052 thermal-sensors = <&tsens0 1>;
5055 trip-point0 {
5061 trip-point1 {
5069 cpu-0-1-0-thermal {
5070 polling-delay-passive = <10>;
5072 thermal-sensors = <&tsens0 2>;
5075 trip-point0 {
5081 trip-point1 {
5089 cpu-0-2-0-thermal {
5090 polling-delay-passive = <10>;
5092 thermal-sensors = <&tsens0 3>;
5095 trip-point0 {
5101 trip-point1 {
5109 cpu-0-3-0-thermal {
5110 polling-delay-passive = <10>;
5112 thermal-sensors = <&tsens0 4>;
5115 trip-point0 {
5121 trip-point1 {
5129 gpuss-0-thermal {
5130 polling-delay-passive = <10>;
5132 thermal-sensors = <&tsens0 5>;
5135 trip-point0 {
5141 trip-point1 {
5149 gpuss-1-thermal {
5150 polling-delay-passive = <10>;
5152 thermal-sensors = <&tsens0 6>;
5155 trip-point0 {
5161 trip-point1 {
5169 gpuss-2-thermal {
5170 polling-delay-passive = <10>;
5172 thermal-sensors = <&tsens0 7>;
5175 trip-point0 {
5181 trip-point1 {
5189 audio-thermal {
5190 thermal-sensors = <&tsens0 8>;
5193 trip-point0 {
5199 trip-point1 {
5207 camss-0-thermal {
5208 thermal-sensors = <&tsens0 9>;
5211 trip-point0 {
5217 trip-point1 {
5225 pcie-0-thermal {
5226 thermal-sensors = <&tsens0 10>;
5229 trip-point0 {
5235 trip-point1 {
5243 cpuss-0-0-thermal {
5244 thermal-sensors = <&tsens0 11>;
5247 trip-point0 {
5253 trip-point1 {
5261 aoss-1-thermal {
5262 thermal-sensors = <&tsens1 0>;
5265 trip-point0 {
5271 trip-point1 {
5279 cpu-0-0-1-thermal {
5280 polling-delay-passive = <10>;
5282 thermal-sensors = <&tsens1 1>;
5285 trip-point0 {
5291 trip-point1 {
5299 cpu-0-1-1-thermal {
5300 polling-delay-passive = <10>;
5302 thermal-sensors = <&tsens1 2>;
5305 trip-point0 {
5311 trip-point1 {
5319 cpu-0-2-1-thermal {
5320 polling-delay-passive = <10>;
5322 thermal-sensors = <&tsens1 3>;
5325 trip-point0 {
5331 trip-point1 {
5339 cpu-0-3-1-thermal {
5340 polling-delay-passive = <10>;
5342 thermal-sensors = <&tsens1 4>;
5345 trip-point0 {
5351 trip-point1 {
5359 gpuss-3-thermal {
5360 polling-delay-passive = <10>;
5362 thermal-sensors = <&tsens1 5>;
5365 trip-point0 {
5371 trip-point1 {
5379 gpuss-4-thermal {
5380 polling-delay-passive = <10>;
5382 thermal-sensors = <&tsens1 6>;
5385 trip-point0 {
5391 trip-point1 {
5399 gpuss-5-thermal {
5400 polling-delay-passive = <10>;
5402 thermal-sensors = <&tsens1 7>;
5405 trip-point0 {
5411 trip-point1 {
5419 video-thermal {
5420 thermal-sensors = <&tsens1 8>;
5423 trip-point0 {
5429 trip-point1 {
5437 camss-1-thermal {
5438 thermal-sensors = <&tsens1 9>;
5441 trip-point0 {
5447 trip-point1 {
5455 pcie-1-thermal {
5456 thermal-sensors = <&tsens1 10>;
5459 trip-point0 {
5465 trip-point1 {
5473 cpuss-0-1-thermal {
5474 thermal-sensors = <&tsens1 11>;
5477 trip-point0 {
5483 trip-point1 {
5491 aoss-2-thermal {
5492 thermal-sensors = <&tsens2 0>;
5495 trip-point0 {
5501 trip-point1 {
5509 cpu-1-0-0-thermal {
5510 polling-delay-passive = <10>;
5512 thermal-sensors = <&tsens2 1>;
5515 trip-point0 {
5521 trip-point1 {
5529 cpu-1-1-0-thermal {
5530 polling-delay-passive = <10>;
5532 thermal-sensors = <&tsens2 2>;
5535 trip-point0 {
5541 trip-point1 {
5549 cpu-1-2-0-thermal {
5550 polling-delay-passive = <10>;
5552 thermal-sensors = <&tsens2 3>;
5555 trip-point0 {
5561 trip-point1 {
5569 cpu-1-3-0-thermal {
5570 polling-delay-passive = <10>;
5572 thermal-sensors = <&tsens2 4>;
5575 trip-point0 {
5581 trip-point1 {
5589 nsp-0-0-0-thermal {
5590 polling-delay-passive = <10>;
5592 thermal-sensors = <&tsens2 5>;
5595 trip-point0 {
5601 trip-point1 {
5609 nsp-0-1-0-thermal {
5610 polling-delay-passive = <10>;
5612 thermal-sensors = <&tsens2 6>;
5615 trip-point0 {
5621 trip-point1 {
5629 nsp-0-2-0-thermal {
5630 polling-delay-passive = <10>;
5632 thermal-sensors = <&tsens2 7>;
5635 trip-point0 {
5641 trip-point1 {
5649 nsp-1-0-0-thermal {
5650 polling-delay-passive = <10>;
5652 thermal-sensors = <&tsens2 8>;
5655 trip-point0 {
5661 trip-point1 {
5669 nsp-1-1-0-thermal {
5670 polling-delay-passive = <10>;
5672 thermal-sensors = <&tsens2 9>;
5675 trip-point0 {
5681 trip-point1 {
5689 nsp-1-2-0-thermal {
5690 polling-delay-passive = <10>;
5692 thermal-sensors = <&tsens2 10>;
5695 trip-point0 {
5701 trip-point1 {
5709 ddrss-0-thermal {
5710 thermal-sensors = <&tsens2 11>;
5713 trip-point0 {
5719 trip-point1 {
5727 cpuss-1-0-thermal {
5728 thermal-sensors = <&tsens2 12>;
5731 trip-point0 {
5737 trip-point1 {
5745 aoss-3-thermal {
5746 thermal-sensors = <&tsens3 0>;
5749 trip-point0 {
5755 trip-point1 {
5763 cpu-1-0-1-thermal {
5764 polling-delay-passive = <10>;
5766 thermal-sensors = <&tsens3 1>;
5769 trip-point0 {
5775 trip-point1 {
5783 cpu-1-1-1-thermal {
5784 polling-delay-passive = <10>;
5786 thermal-sensors = <&tsens3 2>;
5789 trip-point0 {
5795 trip-point1 {
5803 cpu-1-2-1-thermal {
5804 polling-delay-passive = <10>;
5806 thermal-sensors = <&tsens3 3>;
5809 trip-point0 {
5815 trip-point1 {
5823 cpu-1-3-1-thermal {
5824 polling-delay-passive = <10>;
5826 thermal-sensors = <&tsens3 4>;
5829 trip-point0 {
5835 trip-point1 {
5843 nsp-0-0-1-thermal {
5844 polling-delay-passive = <10>;
5846 thermal-sensors = <&tsens3 5>;
5849 trip-point0 {
5855 trip-point1 {
5863 nsp-0-1-1-thermal {
5864 polling-delay-passive = <10>;
5866 thermal-sensors = <&tsens3 6>;
5869 trip-point0 {
5875 trip-point1 {
5883 nsp-0-2-1-thermal {
5884 polling-delay-passive = <10>;
5886 thermal-sensors = <&tsens3 7>;
5889 trip-point0 {
5895 trip-point1 {
5903 nsp-1-0-1-thermal {
5904 polling-delay-passive = <10>;
5906 thermal-sensors = <&tsens3 8>;
5909 trip-point0 {
5915 trip-point1 {
5923 nsp-1-1-1-thermal {
5924 polling-delay-passive = <10>;
5926 thermal-sensors = <&tsens3 9>;
5929 trip-point0 {
5935 trip-point1 {
5943 nsp-1-2-1-thermal {
5944 polling-delay-passive = <10>;
5946 thermal-sensors = <&tsens3 10>;
5949 trip-point0 {
5955 trip-point1 {
5963 ddrss-1-thermal {
5964 thermal-sensors = <&tsens3 11>;
5967 trip-point0 {
5973 trip-point1 {
5981 cpuss-1-1-thermal {
5982 thermal-sensors = <&tsens3 12>;
5985 trip-point0 {
5991 trip-point1 {
6001 compatible = "arm,armv8-timer";
6009 compatible = "qcom,pcie-sa8775p";
6016 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
6019 #address-cells = <3>;
6020 #size-cells = <2>;
6023 bus-range = <0x00 0xff>;
6025 dma-coherent;
6027 linux,pci-domain = <0>;
6028 num-lanes = <2>;
6038 interrupt-names = "msi0", "msi1", "msi2", "msi3",
6040 #interrupt-cells = <1>;
6041 interrupt-map-mask = <0 0 0 0x7>;
6042 interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
6053 clock-names = "aux",
6059 assigned-clocks = <&gcc GCC_PCIE_0_AUX_CLK>;
6060 assigned-clock-rates = <19200000>;
6064 interconnect-names = "pcie-mem", "cpu-pcie";
6066 iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
6070 reset-names = "pci";
6071 power-domains = <&gcc PCIE_0_GDSC>;
6074 phy-names = "pciephy";
6081 bus-range = <0x01 0xff>;
6083 #address-cells = <3>;
6084 #size-cells = <2>;
6089 pcie0_ep: pcie-ep@1c00000 {
6090 compatible = "qcom,sa8775p-pcie-ep";
6098 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
6107 clock-names = "aux",
6117 interrupt-names = "global", "doorbell", "dma";
6121 interconnect-names = "pcie-mem", "cpu-pcie";
6123 dma-coherent;
6126 reset-names = "core";
6127 power-domains = <&gcc PCIE_0_GDSC>;
6129 phy-names = "pciephy";
6130 max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
6131 num-lanes = <2>;
6132 linux,pci-domain = <0>;
6138 compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy";
6149 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
6152 assigned-clocks = <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>;
6153 assigned-clock-rates = <100000000>;
6156 reset-names = "phy";
6158 #clock-cells = <0>;
6159 clock-output-names = "pcie_0_pipe_clk";
6161 #phy-cells = <0>;
6167 compatible = "qcom,pcie-sa8775p";
6174 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
6177 #address-cells = <3>;
6178 #size-cells = <2>;
6181 bus-range = <0x00 0xff>;
6183 dma-coherent;
6185 linux,pci-domain = <1>;
6186 num-lanes = <4>;
6196 interrupt-names = "msi0", "msi1", "msi2", "msi3",
6198 #interrupt-cells = <1>;
6199 interrupt-map-mask = <0 0 0 0x7>;
6200 interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
6211 clock-names = "aux",
6217 assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
6218 assigned-clock-rates = <19200000>;
6222 interconnect-names = "pcie-mem", "cpu-pcie";
6224 iommu-map = <0x0 &pcie_smmu 0x0080 0x1>,
6228 reset-names = "pci";
6229 power-domains = <&gcc PCIE_1_GDSC>;
6232 phy-names = "pciephy";
6239 bus-range = <0x01 0xff>;
6241 #address-cells = <3>;
6242 #size-cells = <2>;
6247 pcie1_ep: pcie-ep@1c10000 {
6248 compatible = "qcom,sa8775p-pcie-ep";
6256 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
6265 clock-names = "aux",
6275 interrupt-names = "global", "doorbell", "dma";
6279 interconnect-names = "pcie-mem", "cpu-pcie";
6281 dma-coherent;
6284 reset-names = "core";
6285 power-domains = <&gcc PCIE_1_GDSC>;
6287 phy-names = "pciephy";
6288 max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
6289 num-lanes = <4>;
6290 linux,pci-domain = <1>;
6296 compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy";
6307 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
6310 assigned-clocks = <&gcc GCC_PCIE_1_PHY_RCHNG_CLK>;
6311 assigned-clock-rates = <100000000>;
6314 reset-names = "phy";
6316 #clock-cells = <0>;
6317 clock-output-names = "pcie_1_pipe_clk";
6319 #phy-cells = <0>;