Lines Matching +full:0 +full:x15200000
29 #clock-cells = <0>;
34 #clock-cells = <0>;
40 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0x0 0x0>;
47 qcom,freq-domain = <&cpufreq_hw 0>;
67 reg = <0x0 0x100>;
69 qcom,freq-domain = <&cpufreq_hw 0>;
84 reg = <0x0 0x200>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
101 reg = <0x0 0x300>;
103 qcom,freq-domain = <&cpufreq_hw 0>;
118 reg = <0x0 0x10000>;
141 reg = <0x0 0x10100>;
158 reg = <0x0 0x10200>;
175 reg = <0x0 0x10300>;
230 gold_cpu_sleep_0: cpu-sleep-0 {
233 arm,psci-suspend-param = <0x40000003>;
243 arm,psci-suspend-param = <0x40000004>;
252 cluster_sleep_gold: cluster-sleep-0 {
254 arm,psci-suspend-param = <0x41000044>;
262 arm,psci-suspend-param = <0x42000144>;
286 qcom,dload-mode = <&tcsr 0x13000>;
378 reg = <0x0 0x80000000 0x0 0x0>;
400 #power-domain-cells = <0>;
407 #power-domain-cells = <0>;
414 #power-domain-cells = <0>;
421 #power-domain-cells = <0>;
428 #power-domain-cells = <0>;
435 #power-domain-cells = <0>;
442 #power-domain-cells = <0>;
449 #power-domain-cells = <0>;
456 #power-domain-cells = <0>;
462 #power-domain-cells = <0>;
468 #power-domain-cells = <0>;
479 reg = <0x0 0x80000000 0x0 0x10000000>;
484 reg = <0x0 0x90000000 0x0 0x600000>;
489 reg = <0x0 0x90600000 0x0 0x200000>;
494 reg = <0x0 0x90800000 0x0 0x60000>;
500 reg = <0x0 0x90860000 0x0 0x20000>;
505 reg = <0x0 0x908b0000 0x0 0x10000>;
510 reg = <0x0 0x908c0000 0x0 0x1000>;
515 reg = <0x0 0x908f0000 0x0 0xe000>;
520 reg = <0x0 0x908fe000 0x0 0x2000>;
526 reg = <0x0 0x90900000 0x0 0x200000>;
532 reg = <0x0 0x90c00000 0x0 0x100000>;
537 reg = <0x0 0x90d00000 0x0 0x100000>;
542 reg = <0x0 0x90e00000 0x0 0x300000>;
547 reg = <0x0 0x91b00000 0x0 0x40000>;
552 reg = <0x0 0x91b40000 0x0 0x40000>;
557 reg = <0x0 0x91b80000 0x0 0x10000>;
562 reg = <0x0 0x91b90000 0x0 0x10000>;
567 reg = <0x0 0x91ba0000 0x0 0x1000>;
573 reg = <0x0 0x91c00000 0x0 0x1400000>;
578 reg = <0x0 0x93b00000 0x0 0xf00000>;
583 reg = <0x0 0x94a00000 0x0 0x800000>;
588 reg = <0x0 0x95200000 0x0 0x500000>;
593 reg = <0x0 0x95c00000 0x0 0x1e00000>;
598 reg = <0x0 0x97b00000 0x0 0x1e00000>;
603 reg = <0x0 0x99900000 0x0 0x1e00000>;
608 reg = <0x0 0x9b800000 0x0 0x1e00000>;
613 reg = <0x0 0x9d600000 0x0 0x2000>;
618 reg = <0x0 0x9d700000 0x0 0x1e00000>;
623 reg = <0x0 0x9f500000 0x0 0x700000>;
628 reg = <0x0 0x9fc00000 0x0 0x700000>;
633 reg = <0x0 0xae000000 0x0 0x1000000>;
638 reg = <0x0 0xb0000000 0x0 0x800000>;
643 reg = <0x0 0xbeb00000 0x0 0x11500000>;
648 reg = <0x0 0xd0000000 0x0 0x40000>;
653 reg = <0x0 0xd0040000 0x0 0x10000>;
658 reg = <0x0 0xd0050000 0x0 0x4000>;
663 reg = <0x0 0xd0054000 0x0 0x9c000>;
668 reg = <0x0 0xd00f0000 0x0 0x10000>;
673 reg = <0x0 0xd0100000 0x0 0x1200000>;
678 reg = <0x0 0xd1300000 0x0 0x500000>;
683 reg = <0x0 0xd1800000 0x0 0x100000>;
688 reg = <0x0 0xd1900000 0x0 0x3800000>;
693 reg = <0x0 0xdb100000 0x0 0x100000>;
698 reg = <0x0 0xdb200000 0x0 0x100000>;
711 qcom,local-pid = <0>;
734 qcom,local-pid = <0>;
757 qcom,local-pid = <0>;
780 qcom,local-pid = <0>;
803 qcom,local-pid = <0>;
818 soc: soc@0 {
822 ranges = <0 0 0 0 0x10 0>;
826 reg = <0x0 0x00100000 0x0 0xc7018>;
832 <0>,
833 <0>,
834 <0>,
837 <0>,
838 <0>,
839 <0>,
842 <0>,
843 <0>,
844 <0>;
850 reg = <0x0 0x00408000 0x0 0x1000>;
859 reg = <0x0 0x00800000 0x0 0x60000>;
874 dma-channel-mask = <0xfff>;
875 iommus = <&apps_smmu 0x5b6 0x0>;
881 reg = <0x0 0x008c0000 0x0 0x6000>;
886 iommus = <&apps_smmu 0x5a3 0x0>;
893 reg = <0x0 0x880000 0x0 0x4000>;
895 #size-cells = <0>;
909 dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
910 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
918 reg = <0x0 0x880000 0x0 0x4000>;
920 #size-cells = <0>;
934 dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
935 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
943 reg = <0x0 0x00880000 0x0 0x4000>;
958 reg = <0x0 0x884000 0x0 0x4000>;
960 #size-cells = <0>;
974 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
983 reg = <0x0 0x884000 0x0 0x4000>;
985 #size-cells = <0>;
999 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
1008 reg = <0x0 0x00884000 0x0 0x4000>;
1023 reg = <0x0 0x888000 0x0 0x4000>;
1025 #size-cells = <0>;
1039 dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
1048 reg = <0x0 0x00888000 0x0 0x4000>;
1062 dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
1067 #size-cells = <0>;
1073 reg = <0x0 0x00888000 0x0 0x4000>;
1088 reg = <0x0 0x88c000 0x0 0x4000>;
1090 #size-cells = <0>;
1104 dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
1113 reg = <0x0 0x88c000 0x0 0x4000>;
1115 #size-cells = <0>;
1129 dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
1138 reg = <0x0 0x0088c000 0x0 0x4000>;
1153 reg = <0x0 0x00890000 0x0 0x4000>;
1167 dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
1172 #size-cells = <0>;
1178 reg = <0x0 0x890000 0x0 0x4000>;
1180 #size-cells = <0>;
1194 dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
1203 reg = <0x0 0x00890000 0x0 0x4000>;
1218 reg = <0x0 0x894000 0x0 0x4000>;
1220 #size-cells = <0>;
1234 dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
1243 reg = <0x0 0x894000 0x0 0x4000>;
1245 #size-cells = <0>;
1259 dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
1268 reg = <0x0 0x00894000 0x0 0x4000>;
1283 reg = <0x0 0x898000 0x0 0x4000>;
1285 #size-cells = <0>;
1299 dmas = <&gpi_dma2 0 6 QCOM_GPI_I2C>,
1308 reg = <0x0 0x898000 0x0 0x4000>;
1310 #size-cells = <0>;
1324 dmas = <&gpi_dma2 0 6 QCOM_GPI_SPI>,
1333 reg = <0x0 0x00898000 0x0 0x4000>;
1350 reg = <0x0 0x00900000 0x0 0x60000>;
1365 dma-channel-mask = <0xfff>;
1366 iommus = <&apps_smmu 0x416 0x0>;
1372 reg = <0x0 0x9c0000 0x0 0x6000>;
1379 iommus = <&apps_smmu 0x403 0x0>;
1384 reg = <0x0 0x980000 0x0 0x4000>;
1386 #size-cells = <0>;
1400 dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
1401 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1409 reg = <0x0 0x980000 0x0 0x4000>;
1411 #size-cells = <0>;
1425 dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
1426 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1434 reg = <0x0 0x980000 0x0 0x4000>;
1449 reg = <0x0 0x984000 0x0 0x4000>;
1451 #size-cells = <0>;
1465 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1474 reg = <0x0 0x984000 0x0 0x4000>;
1476 #size-cells = <0>;
1490 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1499 reg = <0x0 0x984000 0x0 0x4000>;
1514 reg = <0x0 0x988000 0x0 0x4000>;
1516 #size-cells = <0>;
1530 dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
1539 reg = <0x0 0x988000 0x0 0x4000>;
1541 #size-cells = <0>;
1555 dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
1564 reg = <0x0 0x988000 0x0 0x4000>;
1579 reg = <0x0 0x98c000 0x0 0x4000>;
1581 #size-cells = <0>;
1595 dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
1604 reg = <0x0 0x98c000 0x0 0x4000>;
1606 #size-cells = <0>;
1620 dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
1629 reg = <0x0 0x98c000 0x0 0x4000>;
1644 reg = <0x0 0x990000 0x0 0x4000>;
1646 #size-cells = <0>;
1660 dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
1669 reg = <0x0 0x990000 0x0 0x4000>;
1671 #size-cells = <0>;
1685 dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
1694 reg = <0x0 0x990000 0x0 0x4000>;
1709 reg = <0x0 0x994000 0x0 0x4000>;
1711 #size-cells = <0>;
1725 dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
1734 reg = <0x0 0x994000 0x0 0x4000>;
1736 #size-cells = <0>;
1750 dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
1759 reg = <0x0 0x994000 0x0 0x4000>;
1775 reg = <0x0 0x00a00000 0x0 0x60000>;
1789 iommus = <&apps_smmu 0x456 0x0>;
1791 dma-channel-mask = <0xfff>;
1797 reg = <0x0 0x00ac0000 0x0 0x6000>;
1804 iommus = <&apps_smmu 0x443 0x0>;
1809 reg = <0x0 0xa80000 0x0 0x4000>;
1811 #size-cells = <0>;
1825 dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
1826 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1834 reg = <0x0 0xa80000 0x0 0x4000>;
1836 #size-cells = <0>;
1850 dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
1851 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1859 reg = <0x0 0x00a80000 0x0 0x4000>;
1875 reg = <0x0 0xa84000 0x0 0x4000>;
1877 #size-cells = <0>;
1891 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1900 reg = <0x0 0xa84000 0x0 0x4000>;
1902 #size-cells = <0>;
1916 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1925 reg = <0x0 0x00a84000 0x0 0x4000>;
1941 reg = <0x0 0xa88000 0x0 0x4000>;
1943 #size-cells = <0>;
1957 dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
1966 reg = <0x0 0xa88000 0x0 0x4000>;
1968 #size-cells = <0>;
1982 dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
1991 reg = <0x0 0xa88000 0x0 0x4000>;
2006 reg = <0x0 0xa8c000 0x0 0x4000>;
2008 #size-cells = <0>;
2022 dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
2031 reg = <0x0 0xa8c000 0x0 0x4000>;
2033 #size-cells = <0>;
2047 dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
2056 reg = <0x0 0x00a8c000 0x0 0x4000>;
2061 interconnects = <&clk_virt MASTER_QUP_CORE_1 0
2062 &clk_virt SLAVE_QUP_CORE_1 0>,
2063 <&gem_noc MASTER_APPSS_PROC 0
2064 &config_noc SLAVE_QUP_1 0>;
2072 reg = <0x0 0xa90000 0x0 0x4000>;
2074 #size-cells = <0>;
2088 dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
2097 reg = <0x0 0xa90000 0x0 0x4000>;
2099 #size-cells = <0>;
2113 dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
2122 reg = <0x0 0x00a90000 0x0 0x4000>;
2138 reg = <0x0 0xa94000 0x0 0x4000>;
2140 #size-cells = <0>;
2154 dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
2163 reg = <0x0 0xa94000 0x0 0x4000>;
2165 #size-cells = <0>;
2179 dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
2188 reg = <0x0 0x00a94000 0x0 0x4000>;
2203 reg = <0x0 0xa98000 0x0 0x4000>;
2205 #size-cells = <0>;
2219 dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
2230 reg = <0x0 0x00b00000 0x0 0x58000>;
2236 iommus = <&apps_smmu 0x056 0x0>;
2238 dma-channel-mask = <0xf>;
2244 reg = <0x0 0xbc0000 0x0 0x6000>;
2251 iommus = <&apps_smmu 0x43 0x0>;
2256 reg = <0x0 0xb80000 0x0 0x4000>;
2258 #size-cells = <0>;
2272 dmas = <&gpi_dma3 0 0 QCOM_GPI_I2C>,
2273 <&gpi_dma3 1 0 QCOM_GPI_I2C>;
2281 reg = <0x0 0xb80000 0x0 0x4000>;
2283 #size-cells = <0>;
2297 dmas = <&gpi_dma3 0 0 QCOM_GPI_SPI>,
2298 <&gpi_dma3 1 0 QCOM_GPI_SPI>;
2306 reg = <0x0 0x00b80000 0x0 0x4000>;
2323 reg = <0 0x010d2000 0 0x1000>;
2328 reg = <0x0 0x01d84000 0x0 0x3000>;
2338 iommus = <&apps_smmu 0x100 0x0>;
2357 <0 0>,
2358 <0 0>,
2360 <0 0>,
2361 <0 0>,
2362 <0 0>,
2363 <0 0>;
2370 reg = <0x0 0x01d87000 0x0 0xe10>;
2380 resets = <&ufs_mem_hc 0>;
2382 #phy-cells = <0>;
2389 reg = <0x0 0x01d88000 0x0 0x18000>;
2395 reg = <0x0 0x01dc4000 0x0 0x28000>;
2398 qcom,ee = <0>;
2400 iommus = <&apps_smmu 0x480 0x00>,
2401 <&apps_smmu 0x481 0x00>;
2406 reg = <0x0 0x01dfa000 0x0 0x6000>;
2409 iommus = <&apps_smmu 0x480 0x00>,
2410 <&apps_smmu 0x481 0x00>;
2411 interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 0 &mc_virt SLAVE_EBI1 0>;
2417 reg = <0x0 0x4002000 0x0 0x1000>,
2418 <0x0 0x16280000 0x0 0x180000>;
2436 reg = <0x0 0x4003000 0x0 0x1000>;
2456 reg = <0x0 0x4004000 0x0 0x1000>;
2472 #size-cells = <0>;
2474 port@0 {
2475 reg = <0>;
2494 reg = <0x0 0x400f000 0x0 0x1000>;
2514 reg = <0x0 0x4041000 0x0 0x1000>;
2530 #size-cells = <0>;
2552 reg = <0x0 0x4042000 0x0 0x1000>;
2568 #size-cells = <0>;
2582 reg = <0x0 0x4045000 0x0 0x1000>;
2598 #size-cells = <0>;
2600 port@0 {
2601 reg = <0>;
2620 reg = <0x0 0x4b04000 0x0 0x1000>;
2636 #size-cells = <0>;
2658 reg = <0x0 0x4b05000 0x0 0x1000>;
2684 reg = <0x0 0x4b06000 0x0 0x1000>;
2691 #size-cells = <0>;
2714 reg = <0x0 0x4b08000 0x0 0x1000>;
2730 #size-cells = <0>;
2732 port@0 {
2733 reg = <0>;
2776 reg = <0x0 0x4b09000 0x0 0x1000>;
2796 reg = <0x0 0x4b0a000 0x0 0x1000>;
2816 reg = <0x0 0x4b0b000 0x0 0x1000>;
2836 reg = <0x0 0x4b0c000 0x0 0x1000>;
2856 reg = <0x0 0x4b0d000 0x0 0x1000>;
2876 reg = <0x0 0x4b13000 0x0 0x1000>;
2884 reg = <0x0 0x6040000 0x0 0x1000>;
2904 reg = <0x0 0x6140000 0x0 0x1000>;
2924 reg = <0x0 0x6240000 0x0 0x1000>;
2944 reg = <0x0 0x6340000 0x0 0x1000>;
2964 reg = <0x0 0x6440000 0x0 0x1000>;
2984 reg = <0x0 0x6540000 0x0 0x1000>;
3004 reg = <0x0 0x6640000 0x0 0x1000>;
3024 reg = <0x0 0x6740000 0x0 0x1000>;
3044 reg = <0x0 0x6800000 0x0 0x1000>;
3060 #size-cells = <0>;
3062 port@0 {
3063 reg = <0>;
3130 reg = <0x0 0x6810000 0x0 0x1000>;
3146 #size-cells = <0>;
3148 port@0 {
3149 reg = <0>;
3168 reg = <0x0 0x6860000 0x0 0x1000>;
3188 reg = <0x0 0x6861000 0x0 0x1000>;
3208 reg = <0x0 0x6863000 0x0 0x1000>;
3224 #size-cells = <0>;
3226 port@0 {
3227 reg = <0>;
3270 reg = <0x0 0x68a0000 0x0 0x1000>;
3290 reg = <0x0 0x68b0000 0x0 0x1000>;
3310 reg = <0x0 0x68c0000 0x0 0x1000>;
3331 reg = <0 0x088e4000 0 0x120>;
3336 #phy-cells = <0>;
3343 reg = <0 0x088e8000 0 0x2000>;
3357 #clock-cells = <0>;
3360 #phy-cells = <0>;
3367 reg = <0 0x0a6f8800 0 0x400>;
3399 interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
3400 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
3409 reg = <0 0x0a600000 0 0xe000>;
3411 iommus = <&apps_smmu 0x080 0x0>;
3420 reg = <0 0x088e6000 0 0x120>;
3425 #phy-cells = <0>;
3432 reg = <0 0x088ea000 0 0x2000>;
3446 #clock-cells = <0>;
3449 #phy-cells = <0>;
3456 reg = <0 0x0a8f8800 0 0x400>;
3488 interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI1 0>,
3489 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
3498 reg = <0 0x0a800000 0 0xe000>;
3500 iommus = <&apps_smmu 0x0a0 0x0>;
3509 reg = <0 0x088e7000 0 0x120>;
3514 #phy-cells = <0>;
3521 reg = <0 0x0a4f8800 0 0x400>;
3551 interconnects = <&aggre1_noc MASTER_USB2 0 &mc_virt SLAVE_EBI1 0>,
3552 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB2 0>;
3561 reg = <0 0x0a400000 0 0xe000>;
3563 iommus = <&apps_smmu 0x020 0x0>;
3571 reg = <0x0 0x01f40000 0x0 0x20000>;
3577 reg = <0x0 0x1fc0000 0x0 0x30000>;
3582 reg = <0x0 0x03d90000 0x0 0xa000>;
3597 reg = <0x0 0x03da0000 0x0 0x20000>;
3632 reg = <0x0 0x08901000 0x0 0xe10>;
3635 #phy-cells = <0>;
3641 reg = <0x0 0x08902000 0x0 0xe10>;
3644 #phy-cells = <0>;
3650 reg = <0x0 0x9091000 0x0 0x1000>;
3660 opp-0 {
3704 reg = <0x0 0x90b5400 0x0 0x600>;
3714 opp-0 {
3735 reg = <0x0 0x90b6400 0x0 0x600>;
3745 reg = <0x0 0x09200000 0x0 0x80000>,
3746 <0x0 0x09300000 0x0 0x80000>,
3747 <0x0 0x09400000 0x0 0x80000>,
3748 <0x0 0x09500000 0x0 0x80000>,
3749 <0x0 0x09600000 0x0 0x80000>,
3750 <0x0 0x09700000 0x0 0x80000>,
3751 <0x0 0x09a00000 0x0 0x80000>;
3764 reg = <0x0 0x0b220000 0x0 0x30000>,
3765 <0x0 0x17c000f0 0x0 0x64>;
3766 qcom,pdc-ranges = <0 480 40>,
3811 reg = <0x0 0x0c251000 0x0 0x1ff>,
3812 <0x0 0x0c224000 0x0 0x8>;
3822 reg = <0x0 0x0c252000 0x0 0x1ff>,
3823 <0x0 0x0c225000 0x0 0x8>;
3833 reg = <0x0 0x0c263000 0x0 0x1ff>,
3834 <0x0 0x0c222000 0x0 0x8>;
3844 reg = <0x0 0x0c265000 0x0 0x1ff>,
3845 <0x0 0x0c223000 0x0 0x8>;
3855 reg = <0x0 0x0c300000 0x0 0x400>;
3860 #clock-cells = <0>;
3865 reg = <0x0 0x0c3f0000 0x0 0x400>;
3870 reg = <0x0 0x0c440000 0x0 0x1100>,
3871 <0x0 0x0c600000 0x0 0x2000000>,
3872 <0x0 0x0e600000 0x0 0x100000>,
3873 <0x0 0x0e700000 0x0 0xa0000>,
3874 <0x0 0x0c40a000 0x0 0x26000>;
3880 qcom,channel = <0>;
3881 qcom,ee = <0>;
3887 #size-cells = <0>;
3892 reg = <0x0 0x0f000000 0x0 0x1000000>;
3898 gpio-ranges = <&tlmm 0 0 149>;
3904 reg = <0x0 0x146d8000 0x0 0x1000>;
3905 ranges = <0x0 0x0 0x146d8000 0x1000>;
3912 reg = <0x94c 0xc8>;
3918 reg = <0x0 0x15000000 0x0 0x100000>;
4057 reg = <0x0 0x15200000 0x0 0x80000>;
4132 reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */
4133 <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */
4138 redistributor-stride = <0x0 0x20000>;
4143 reg = <0x0 0x17c10000 0x0 0x1000>;
4145 interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
4150 reg = <0x0 0x17c20000 0x0 0x1000>;
4151 ranges = <0x0 0x0 0x0 0x20000000>;
4156 reg = <0x17c21000 0x1000>,
4157 <0x17c22000 0x1000>;
4160 frame-number = <0>;
4164 reg = <0x17c23000 0x1000>;
4171 reg = <0x17c25000 0x1000>;
4178 reg = <0x17c27000 0x1000>;
4185 reg = <0x17c29000 0x1000>;
4192 reg = <0x17c2b000 0x1000>;
4199 reg = <0x17c2d000 0x1000>;
4208 reg = <0x0 0x18200000 0x0 0x10000>,
4209 <0x0 0x18210000 0x0 0x10000>,
4210 <0x0 0x18220000 0x0 0x10000>;
4211 reg-names = "drv-0", "drv-1", "drv-2";
4215 qcom,tcs-offset = <0xd00>;
4220 <CONTROL_TCS 0>;
4242 rpmhpd_opp_ret: opp-0 {
4288 reg = <0x0 0x18591000 0x0 0x1000>,
4289 <0x0 0x18593000 0x0 0x1000>;
4300 reg = <0x0 0x20c00000 0x0 0x10000>;
4303 <&smp2p_gpdsp0_in 0 0>,
4304 <&smp2p_gpdsp0_in 2 0>,
4305 <&smp2p_gpdsp0_in 1 0>,
4306 <&smp2p_gpdsp0_in 3 0>;
4317 interconnects = <&gpdsp_anoc MASTER_DSP0 0
4318 &config_noc SLAVE_CLK_CTL 0>;
4324 qcom,smem-states = <&smp2p_gpdsp0_out 0>;
4343 reg = <0x0 0x21c00000 0x0 0x10000>;
4346 <&smp2p_gpdsp1_in 0 0>,
4347 <&smp2p_gpdsp1_in 2 0>,
4348 <&smp2p_gpdsp1_in 1 0>,
4349 <&smp2p_gpdsp1_in 3 0>;
4360 interconnects = <&gpdsp_anoc MASTER_DSP1 0
4361 &config_noc SLAVE_CLK_CTL 0>;
4367 qcom,smem-states = <&smp2p_gpdsp1_out 0>;
4386 reg = <0x0 0x23000000 0x0 0x10000>,
4387 <0x0 0x23016000 0x0 0x100>;
4414 iommus = <&apps_smmu 0x140 0xf>;
4427 reg = <0x0 0x23040000 0x0 0x10000>,
4428 <0x0 0x23056000 0x0 0x100>;
4455 iommus = <&apps_smmu 0x120 0xf>;
4468 reg = <0x0 0x26300000 0x0 0x10000>;
4471 <&smp2p_cdsp0_in 0 IRQ_TYPE_EDGE_RISING>,
4486 interconnects = <&nspa_noc MASTER_CDSP_PROC 0
4487 &mc_virt SLAVE_EBI1 0>;
4493 qcom,smem-states = <&smp2p_cdsp0_out 0>;
4513 #size-cells = <0>;
4518 iommus = <&apps_smmu 0x2141 0x04a0>,
4519 <&apps_smmu 0x2161 0x04a0>,
4520 <&apps_smmu 0x2181 0x0400>,
4521 <&apps_smmu 0x21c1 0x04a0>,
4522 <&apps_smmu 0x21e1 0x04a0>,
4523 <&apps_smmu 0x2541 0x04a0>,
4524 <&apps_smmu 0x2561 0x04a0>,
4525 <&apps_smmu 0x2581 0x0400>,
4526 <&apps_smmu 0x25c1 0x04a0>,
4527 <&apps_smmu 0x25e1 0x04a0>;
4534 iommus = <&apps_smmu 0x2142 0x04a0>,
4535 <&apps_smmu 0x2162 0x04a0>,
4536 <&apps_smmu 0x2182 0x0400>,
4537 <&apps_smmu 0x21c2 0x04a0>,
4538 <&apps_smmu 0x21e2 0x04a0>,
4539 <&apps_smmu 0x2542 0x04a0>,
4540 <&apps_smmu 0x2562 0x04a0>,
4541 <&apps_smmu 0x2582 0x0400>,
4542 <&apps_smmu 0x25c2 0x04a0>,
4543 <&apps_smmu 0x25e2 0x04a0>;
4550 iommus = <&apps_smmu 0x2143 0x04a0>,
4551 <&apps_smmu 0x2163 0x04a0>,
4552 <&apps_smmu 0x2183 0x0400>,
4553 <&apps_smmu 0x21c3 0x04a0>,
4554 <&apps_smmu 0x21e3 0x04a0>,
4555 <&apps_smmu 0x2543 0x04a0>,
4556 <&apps_smmu 0x2563 0x04a0>,
4557 <&apps_smmu 0x2583 0x0400>,
4558 <&apps_smmu 0x25c3 0x04a0>,
4559 <&apps_smmu 0x25e3 0x04a0>;
4566 iommus = <&apps_smmu 0x2144 0x04a0>,
4567 <&apps_smmu 0x2164 0x04a0>,
4568 <&apps_smmu 0x2184 0x0400>,
4569 <&apps_smmu 0x21c4 0x04a0>,
4570 <&apps_smmu 0x21e4 0x04a0>,
4571 <&apps_smmu 0x2544 0x04a0>,
4572 <&apps_smmu 0x2564 0x04a0>,
4573 <&apps_smmu 0x2584 0x0400>,
4574 <&apps_smmu 0x25c4 0x04a0>,
4575 <&apps_smmu 0x25e4 0x04a0>;
4582 iommus = <&apps_smmu 0x2145 0x04a0>,
4583 <&apps_smmu 0x2165 0x04a0>,
4584 <&apps_smmu 0x2185 0x0400>,
4585 <&apps_smmu 0x21c5 0x04a0>,
4586 <&apps_smmu 0x21e5 0x04a0>,
4587 <&apps_smmu 0x2545 0x04a0>,
4588 <&apps_smmu 0x2565 0x04a0>,
4589 <&apps_smmu 0x2585 0x0400>,
4590 <&apps_smmu 0x25c5 0x04a0>,
4591 <&apps_smmu 0x25e5 0x04a0>;
4598 iommus = <&apps_smmu 0x2146 0x04a0>,
4599 <&apps_smmu 0x2166 0x04a0>,
4600 <&apps_smmu 0x2186 0x0400>,
4601 <&apps_smmu 0x21c6 0x04a0>,
4602 <&apps_smmu 0x21e6 0x04a0>,
4603 <&apps_smmu 0x2546 0x04a0>,
4604 <&apps_smmu 0x2566 0x04a0>,
4605 <&apps_smmu 0x2586 0x0400>,
4606 <&apps_smmu 0x25c6 0x04a0>,
4607 <&apps_smmu 0x25e6 0x04a0>;
4614 iommus = <&apps_smmu 0x2147 0x04a0>,
4615 <&apps_smmu 0x2167 0x04a0>,
4616 <&apps_smmu 0x2187 0x0400>,
4617 <&apps_smmu 0x21c7 0x04a0>,
4618 <&apps_smmu 0x21e7 0x04a0>,
4619 <&apps_smmu 0x2547 0x04a0>,
4620 <&apps_smmu 0x2567 0x04a0>,
4621 <&apps_smmu 0x2587 0x0400>,
4622 <&apps_smmu 0x25c7 0x04a0>,
4623 <&apps_smmu 0x25e7 0x04a0>;
4630 iommus = <&apps_smmu 0x2148 0x04a0>,
4631 <&apps_smmu 0x2168 0x04a0>,
4632 <&apps_smmu 0x2188 0x0400>,
4633 <&apps_smmu 0x21c8 0x04a0>,
4634 <&apps_smmu 0x21e8 0x04a0>,
4635 <&apps_smmu 0x2548 0x04a0>,
4636 <&apps_smmu 0x2568 0x04a0>,
4637 <&apps_smmu 0x2588 0x0400>,
4638 <&apps_smmu 0x25c8 0x04a0>,
4639 <&apps_smmu 0x25e8 0x04a0>;
4646 iommus = <&apps_smmu 0x2149 0x04a0>,
4647 <&apps_smmu 0x2169 0x04a0>,
4648 <&apps_smmu 0x2189 0x0400>,
4649 <&apps_smmu 0x21c9 0x04a0>,
4650 <&apps_smmu 0x21e9 0x04a0>,
4651 <&apps_smmu 0x2549 0x04a0>,
4652 <&apps_smmu 0x2569 0x04a0>,
4653 <&apps_smmu 0x2589 0x0400>,
4654 <&apps_smmu 0x25c9 0x04a0>,
4655 <&apps_smmu 0x25e9 0x04a0>;
4662 iommus = <&apps_smmu 0x214a 0x04a0>,
4663 <&apps_smmu 0x216a 0x04a0>,
4664 <&apps_smmu 0x218a 0x0400>,
4665 <&apps_smmu 0x21ca 0x04a0>,
4666 <&apps_smmu 0x21ea 0x04a0>,
4667 <&apps_smmu 0x254a 0x04a0>,
4668 <&apps_smmu 0x256a 0x04a0>,
4669 <&apps_smmu 0x258a 0x0400>,
4670 <&apps_smmu 0x25ca 0x04a0>,
4671 <&apps_smmu 0x25ea 0x04a0>;
4678 iommus = <&apps_smmu 0x214b 0x04a0>,
4679 <&apps_smmu 0x216b 0x04a0>,
4680 <&apps_smmu 0x218b 0x0400>,
4681 <&apps_smmu 0x21cb 0x04a0>,
4682 <&apps_smmu 0x21eb 0x04a0>,
4683 <&apps_smmu 0x254b 0x04a0>,
4684 <&apps_smmu 0x256b 0x04a0>,
4685 <&apps_smmu 0x258b 0x0400>,
4686 <&apps_smmu 0x25cb 0x04a0>,
4687 <&apps_smmu 0x25eb 0x04a0>;
4696 reg = <0x0 0x2A300000 0x0 0x10000>;
4699 <&smp2p_cdsp1_in 0 IRQ_TYPE_EDGE_RISING>,
4714 interconnects = <&nspb_noc MASTER_CDSP_PROC_B 0
4715 &mc_virt SLAVE_EBI1 0>;
4721 qcom,smem-states = <&smp2p_cdsp1_out 0>;
4741 #size-cells = <0>;
4746 iommus = <&apps_smmu 0x2941 0x04a0>,
4747 <&apps_smmu 0x2961 0x04a0>,
4748 <&apps_smmu 0x2981 0x0400>,
4749 <&apps_smmu 0x29c1 0x04a0>,
4750 <&apps_smmu 0x29e1 0x04a0>,
4751 <&apps_smmu 0x2d41 0x04a0>,
4752 <&apps_smmu 0x2d61 0x04a0>,
4753 <&apps_smmu 0x2d81 0x0400>,
4754 <&apps_smmu 0x2dc1 0x04a0>,
4755 <&apps_smmu 0x2de1 0x04a0>;
4762 iommus = <&apps_smmu 0x2942 0x04a0>,
4763 <&apps_smmu 0x2962 0x04a0>,
4764 <&apps_smmu 0x2982 0x0400>,
4765 <&apps_smmu 0x29c2 0x04a0>,
4766 <&apps_smmu 0x29e2 0x04a0>,
4767 <&apps_smmu 0x2d42 0x04a0>,
4768 <&apps_smmu 0x2d62 0x04a0>,
4769 <&apps_smmu 0x2d82 0x0400>,
4770 <&apps_smmu 0x2dc2 0x04a0>,
4771 <&apps_smmu 0x2de2 0x04a0>;
4778 iommus = <&apps_smmu 0x2943 0x04a0>,
4779 <&apps_smmu 0x2963 0x04a0>,
4780 <&apps_smmu 0x2983 0x0400>,
4781 <&apps_smmu 0x29c3 0x04a0>,
4782 <&apps_smmu 0x29e3 0x04a0>,
4783 <&apps_smmu 0x2d43 0x04a0>,
4784 <&apps_smmu 0x2d63 0x04a0>,
4785 <&apps_smmu 0x2d83 0x0400>,
4786 <&apps_smmu 0x2dc3 0x04a0>,
4787 <&apps_smmu 0x2de3 0x04a0>;
4794 iommus = <&apps_smmu 0x2944 0x04a0>,
4795 <&apps_smmu 0x2964 0x04a0>,
4796 <&apps_smmu 0x2984 0x0400>,
4797 <&apps_smmu 0x29c4 0x04a0>,
4798 <&apps_smmu 0x29e4 0x04a0>,
4799 <&apps_smmu 0x2d44 0x04a0>,
4800 <&apps_smmu 0x2d64 0x04a0>,
4801 <&apps_smmu 0x2d84 0x0400>,
4802 <&apps_smmu 0x2dc4 0x04a0>,
4803 <&apps_smmu 0x2de4 0x04a0>;
4810 iommus = <&apps_smmu 0x2945 0x04a0>,
4811 <&apps_smmu 0x2965 0x04a0>,
4812 <&apps_smmu 0x2985 0x0400>,
4813 <&apps_smmu 0x29c5 0x04a0>,
4814 <&apps_smmu 0x29e5 0x04a0>,
4815 <&apps_smmu 0x2d45 0x04a0>,
4816 <&apps_smmu 0x2d65 0x04a0>,
4817 <&apps_smmu 0x2d85 0x0400>,
4818 <&apps_smmu 0x2dc5 0x04a0>,
4819 <&apps_smmu 0x2de5 0x04a0>;
4826 iommus = <&apps_smmu 0x2946 0x04a0>,
4827 <&apps_smmu 0x2966 0x04a0>,
4828 <&apps_smmu 0x2986 0x0400>,
4829 <&apps_smmu 0x29c6 0x04a0>,
4830 <&apps_smmu 0x29e6 0x04a0>,
4831 <&apps_smmu 0x2d46 0x04a0>,
4832 <&apps_smmu 0x2d66 0x04a0>,
4833 <&apps_smmu 0x2d86 0x0400>,
4834 <&apps_smmu 0x2dc6 0x04a0>,
4835 <&apps_smmu 0x2de6 0x04a0>;
4842 iommus = <&apps_smmu 0x2947 0x04a0>,
4843 <&apps_smmu 0x2967 0x04a0>,
4844 <&apps_smmu 0x2987 0x0400>,
4845 <&apps_smmu 0x29c7 0x04a0>,
4846 <&apps_smmu 0x29e7 0x04a0>,
4847 <&apps_smmu 0x2d47 0x04a0>,
4848 <&apps_smmu 0x2d67 0x04a0>,
4849 <&apps_smmu 0x2d87 0x0400>,
4850 <&apps_smmu 0x2dc7 0x04a0>,
4851 <&apps_smmu 0x2de7 0x04a0>;
4858 iommus = <&apps_smmu 0x2948 0x04a0>,
4859 <&apps_smmu 0x2968 0x04a0>,
4860 <&apps_smmu 0x2988 0x0400>,
4861 <&apps_smmu 0x29c8 0x04a0>,
4862 <&apps_smmu 0x29e8 0x04a0>,
4863 <&apps_smmu 0x2d48 0x04a0>,
4864 <&apps_smmu 0x2d68 0x04a0>,
4865 <&apps_smmu 0x2d88 0x0400>,
4866 <&apps_smmu 0x2dc8 0x04a0>,
4867 <&apps_smmu 0x2de8 0x04a0>;
4874 iommus = <&apps_smmu 0x2949 0x04a0>,
4875 <&apps_smmu 0x2969 0x04a0>,
4876 <&apps_smmu 0x2989 0x0400>,
4877 <&apps_smmu 0x29c9 0x04a0>,
4878 <&apps_smmu 0x29e9 0x04a0>,
4879 <&apps_smmu 0x2d49 0x04a0>,
4880 <&apps_smmu 0x2d69 0x04a0>,
4881 <&apps_smmu 0x2d89 0x0400>,
4882 <&apps_smmu 0x2dc9 0x04a0>,
4883 <&apps_smmu 0x2de9 0x04a0>;
4890 iommus = <&apps_smmu 0x294a 0x04a0>,
4891 <&apps_smmu 0x296a 0x04a0>,
4892 <&apps_smmu 0x298a 0x0400>,
4893 <&apps_smmu 0x29ca 0x04a0>,
4894 <&apps_smmu 0x29ea 0x04a0>,
4895 <&apps_smmu 0x2d4a 0x04a0>,
4896 <&apps_smmu 0x2d6a 0x04a0>,
4897 <&apps_smmu 0x2d8a 0x0400>,
4898 <&apps_smmu 0x2dca 0x04a0>,
4899 <&apps_smmu 0x2dea 0x04a0>;
4906 iommus = <&apps_smmu 0x294b 0x04a0>,
4907 <&apps_smmu 0x296b 0x04a0>,
4908 <&apps_smmu 0x298b 0x0400>,
4909 <&apps_smmu 0x29cb 0x04a0>,
4910 <&apps_smmu 0x29eb 0x04a0>,
4911 <&apps_smmu 0x2d4b 0x04a0>,
4912 <&apps_smmu 0x2d6b 0x04a0>,
4913 <&apps_smmu 0x2d8b 0x0400>,
4914 <&apps_smmu 0x2dcb 0x04a0>,
4915 <&apps_smmu 0x2deb 0x04a0>;
4922 iommus = <&apps_smmu 0x294c 0x04a0>,
4923 <&apps_smmu 0x296c 0x04a0>,
4924 <&apps_smmu 0x298c 0x0400>,
4925 <&apps_smmu 0x29cc 0x04a0>,
4926 <&apps_smmu 0x29ec 0x04a0>,
4927 <&apps_smmu 0x2d4c 0x04a0>,
4928 <&apps_smmu 0x2d6c 0x04a0>,
4929 <&apps_smmu 0x2d8c 0x0400>,
4930 <&apps_smmu 0x2dcc 0x04a0>,
4931 <&apps_smmu 0x2dec 0x04a0>;
4938 iommus = <&apps_smmu 0x294d 0x04a0>,
4939 <&apps_smmu 0x296d 0x04a0>,
4940 <&apps_smmu 0x298d 0x0400>,
4941 <&apps_smmu 0x29Cd 0x04a0>,
4942 <&apps_smmu 0x29ed 0x04a0>,
4943 <&apps_smmu 0x2d4d 0x04a0>,
4944 <&apps_smmu 0x2d6d 0x04a0>,
4945 <&apps_smmu 0x2d8d 0x0400>,
4946 <&apps_smmu 0x2dcd 0x04a0>,
4947 <&apps_smmu 0x2ded 0x04a0>;
4956 reg = <0x0 0x30000000 0x0 0x100>;
4959 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
4973 interconnects = <&lpass_ag_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>;
4979 qcom,smem-states = <&smp2p_adsp_out 0>;
5002 #size-cells = <0>;
5007 iommus = <&apps_smmu 0x3003 0x0>;
5014 iommus = <&apps_smmu 0x3004 0x0>;
5021 iommus = <&apps_smmu 0x3005 0x0>;
5031 aoss-0-thermal {
5032 thermal-sensors = <&tsens0 0>;
5049 cpu-0-0-0-thermal {
5069 cpu-0-1-0-thermal {
5089 cpu-0-2-0-thermal {
5109 cpu-0-3-0-thermal {
5129 gpuss-0-thermal {
5207 camss-0-thermal {
5225 pcie-0-thermal {
5243 cpuss-0-0-thermal {
5262 thermal-sensors = <&tsens1 0>;
5279 cpu-0-0-1-thermal {
5299 cpu-0-1-1-thermal {
5319 cpu-0-2-1-thermal {
5339 cpu-0-3-1-thermal {
5473 cpuss-0-1-thermal {
5492 thermal-sensors = <&tsens2 0>;
5509 cpu-1-0-0-thermal {
5529 cpu-1-1-0-thermal {
5549 cpu-1-2-0-thermal {
5569 cpu-1-3-0-thermal {
5589 nsp-0-0-0-thermal {
5609 nsp-0-1-0-thermal {
5629 nsp-0-2-0-thermal {
5649 nsp-1-0-0-thermal {
5669 nsp-1-1-0-thermal {
5689 nsp-1-2-0-thermal {
5709 ddrss-0-thermal {
5727 cpuss-1-0-thermal {
5746 thermal-sensors = <&tsens3 0>;
5763 cpu-1-0-1-thermal {
5843 nsp-0-0-1-thermal {
5863 nsp-0-1-1-thermal {
5883 nsp-0-2-1-thermal {
5903 nsp-1-0-1-thermal {
6010 reg = <0x0 0x01c00000 0x0 0x3000>,
6011 <0x0 0x40000000 0x0 0xf20>,
6012 <0x0 0x40000f20 0x0 0xa8>,
6013 <0x0 0x40001000 0x0 0x4000>,
6014 <0x0 0x40100000 0x0 0x100000>,
6015 <0x0 0x01c03000 0x0 0x1000>;
6021 ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
6022 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
6023 bus-range = <0x00 0xff>;
6027 linux,pci-domain = <0>;
6041 interrupt-map-mask = <0 0 0 0x7>;
6042 interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
6043 <0 0 0 2 &intc GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>,
6044 <0 0 0 3 &intc GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>,
6045 <0 0 0 4 &intc GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>;
6062 interconnects = <&pcie_anoc MASTER_PCIE_0 0 &mc_virt SLAVE_EBI1 0>,
6063 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>;
6066 iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
6067 <0x100 &pcie_smmu 0x0001 0x1>;
6078 pcieport0: pcie@0 {
6080 reg = <0x0 0x0 0x0 0x0 0x0>;
6081 bus-range = <0x01 0xff>;
6091 reg = <0x0 0x01c00000 0x0 0x3000>,
6092 <0x0 0x40000000 0x0 0xf20>,
6093 <0x0 0x40000f20 0x0 0xa8>,
6094 <0x0 0x40001000 0x0 0x4000>,
6095 <0x0 0x40200000 0x0 0x100000>,
6096 <0x0 0x01c03000 0x0 0x1000>,
6097 <0x0 0x40005000 0x0 0x2000>;
6119 interconnects = <&pcie_anoc MASTER_PCIE_0 0 &mc_virt SLAVE_EBI1 0>,
6120 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>;
6124 iommus = <&pcie_smmu 0x0000 0x7f>;
6132 linux,pci-domain = <0>;
6139 reg = <0x0 0x1c04000 0x0 0x2000>;
6158 #clock-cells = <0>;
6161 #phy-cells = <0>;
6168 reg = <0x0 0x01c10000 0x0 0x3000>,
6169 <0x0 0x60000000 0x0 0xf20>,
6170 <0x0 0x60000f20 0x0 0xa8>,
6171 <0x0 0x60001000 0x0 0x4000>,
6172 <0x0 0x60100000 0x0 0x100000>,
6173 <0x0 0x01c13000 0x0 0x1000>;
6179 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
6180 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x1fd00000>;
6181 bus-range = <0x00 0xff>;
6199 interrupt-map-mask = <0 0 0 0x7>;
6200 interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
6201 <0 0 0 2 &intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
6202 <0 0 0 3 &intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
6203 <0 0 0 4 &intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
6220 interconnects = <&pcie_anoc MASTER_PCIE_1 0 &mc_virt SLAVE_EBI1 0>,
6221 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_1 0>;
6224 iommu-map = <0x0 &pcie_smmu 0x0080 0x1>,
6225 <0x100 &pcie_smmu 0x0081 0x1>;
6236 pcie@0 {
6238 reg = <0x0 0x0 0x0 0x0 0x0>;
6239 bus-range = <0x01 0xff>;
6249 reg = <0x0 0x01c10000 0x0 0x3000>,
6250 <0x0 0x60000000 0x0 0xf20>,
6251 <0x0 0x60000f20 0x0 0xa8>,
6252 <0x0 0x60001000 0x0 0x4000>,
6253 <0x0 0x60200000 0x0 0x100000>,
6254 <0x0 0x01c13000 0x0 0x1000>,
6255 <0x0 0x60005000 0x0 0x2000>;
6277 interconnects = <&pcie_anoc MASTER_PCIE_1 0 &mc_virt SLAVE_EBI1 0>,
6278 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_1 0>;
6282 iommus = <&pcie_smmu 0x80 0x7f>;
6297 reg = <0x0 0x1c14000 0x0 0x4000>;
6316 #clock-cells = <0>;
6319 #phy-cells = <0>;