Lines Matching refs:gcc
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
387 gcc: clock-controller@80000 { label
388 compatible = "qcom,qdu1000-gcc";
404 <&gcc GCC_ECPRI_CC_GPLL0_CLK_SRC>,
405 <&gcc GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC>,
406 <&gcc GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC>,
407 <&gcc GCC_ECPRI_CC_GPLL3_CLK_SRC>,
408 <&gcc GCC_ECPRI_CC_GPLL4_CLK_SRC>,
409 <&gcc GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC>;
438 clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
439 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
454 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
465 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
481 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
491 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
507 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
517 clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
533 clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
543 clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
559 clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
569 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
585 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
595 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
611 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
621 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
654 clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
655 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
666 clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
679 clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
695 clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
705 clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
721 clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
731 clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
747 clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
757 clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
773 clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
783 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
796 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
812 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
822 clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
838 clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
848 clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
864 clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
895 clocks = <&gcc GCC_SDCC5_AHB_CLK>,
896 <&gcc GCC_SDCC5_APPS_CLK>,
902 resets = <&gcc GCC_SDCC5_BCR>;
938 clocks = <&gcc GCC_USB2_CLKREF_EN>;
941 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
950 clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
951 <&gcc GCC_USB2_CLKREF_EN>,
952 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
953 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
959 resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
960 <&gcc GCC_USB3PHY_PHY_PRIM_BCR>;
979 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
980 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
981 <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
982 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
988 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
989 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
1003 power-domains = <&gcc USB30_PRIM_GDSC>;
1006 resets = <&gcc GCC_USB30_PRIM_BCR>;
1587 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;