Lines Matching +full:0 +full:xfdd00000
29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
62 reg = <0x0 0x1>;
70 reg = <0x0 0x2>;
78 reg = <0x0 0x3>;
86 reg = <0x0 0x100>;
99 reg = <0x0 0x101>;
107 reg = <0x0 0x102>;
115 reg = <0x0 0x103>;
168 reg = <0 0x80000000 0 0>;
186 mboxes = <&apcs 0>;
237 reg = <0 0x03400000 0 0x1000>;
242 reg = <0 0x03401000 0 0x2200000>;
247 reg = <0 0x06a00000 0 0x200000>;
252 reg = <0 0x07000000 0 0x5a00000>;
257 reg = <0 0x0ca00000 0 0x1f00000>;
263 reg = <0 0xc6400000 0 0x180000>;
270 reg = <0 0xc6700000 0 0x100000>;
275 reg = <0 0xc7000000 0 0x800000>;
280 reg = <0 0xc9400000 0 0x3f00000>;
285 reg = <0 0x06c00000 0 0x400000>;
305 qcom,local-pid = <0>;
330 qcom,local-pid = <0>;
346 soc: soc@0 {
349 ranges = <0 0 0 0xffffffff>;
356 reg = <0xf9000000 0x1000>,
357 <0xf9002000 0x1000>;
362 reg = <0xf900d000 0x2000>;
368 reg = <0xf9017000 0x1000>;
380 reg = <0xf9020000 0x1000>;
383 frame-number = <0>;
386 reg = <0xf9021000 0x1000>,
387 <0xf9022000 0x1000>;
393 reg = <0xf9023000 0x1000>;
400 reg = <0xf9024000 0x1000>;
407 reg = <0xf9025000 0x1000>;
414 reg = <0xf9026000 0x1000>;
421 reg = <0xf9027000 0x1000>;
428 reg = <0xf9028000 0x1000>;
435 reg = <0xf92f8800 0x400>;
458 reg = <0xf9200000 0xcc00>;
469 reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
482 pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
492 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
505 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
515 reg = <0xf9904000 0x19000>;
520 qcom,ee = <0>;
528 reg = <0xf991e000 0x1000>;
534 pinctrl-0 = <&blsp1_uart2_default>;
541 reg = <0xf9923000 0x500>;
550 pinctrl-0 = <&i2c1_default>;
553 #size-cells = <0>;
559 reg = <0xf9923000 0x500>;
567 pinctrl-0 = <&blsp1_spi1_default>;
570 #size-cells = <0>;
576 reg = <0xf9924000 0x500>;
585 pinctrl-0 = <&i2c2_default>;
588 #size-cells = <0>;
596 reg = <0xf9926000 0x500>;
605 pinctrl-0 = <&i2c4_default>;
608 #size-cells = <0>;
614 reg = <0xf9927000 0x500>;
623 pinctrl-0 = <&i2c5_default>;
626 #size-cells = <0>;
632 reg = <0xf9928000 0x500>;
641 pinctrl-0 = <&i2c6_default>;
644 #size-cells = <0>;
650 reg = <0xf9944000 0x19000>;
655 qcom,ee = <0>;
663 reg = <0xf995e000 0x1000>;
671 pinctrl-0 = <&blsp2_uart2_default>;
678 reg = <0xf9963000 0x500>;
687 pinctrl-0 = <&i2c7_default>;
690 #size-cells = <0>;
696 reg = <0xf9966000 0x500>;
704 pinctrl-0 = <&blsp2_spi10_default>;
707 #size-cells = <0>;
713 reg = <0xf9967000 0x500>;
722 pinctrl-0 = <&i2c11_default>;
725 #size-cells = <0>;
734 reg = <0xfc400000 0x2000>;
742 reg = <0xfc428000 0x4000>;
747 reg = <0xfc4ab000 0x4>;
752 reg = <0xfc4cf000 0x1000>,
753 <0xfc4cb000 0x1000>,
754 <0xfc4ca000 0x1000>;
758 qcom,ee = <0>;
759 qcom,channel = <0>;
761 #size-cells = <0>;
768 reg = <0xfd484000 0x1000>;
774 reg = <0xfd510000 0x4000>;
777 gpio-ranges = <&tlmm 0 0 146>;
1039 reg = <0xfd8c0000 0x5200>;
1057 <0>,
1058 <0>,
1059 <0>,
1060 <0>,
1061 <0>;
1077 reg = <0xfdd00000 0x2000>,
1078 <0xfec00000 0x200000>;
1080 ranges = <0 0xfec00000 0x200000>;
1088 gmu_sram: gmu-sram@0 {
1089 reg = <0x0 0x180000>;