Lines Matching full:gcc
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
169 clocks = <&gcc GCC_CRYPTO_CLK>,
170 <&gcc GCC_CRYPTO_AXI_CLK>,
171 <&gcc GCC_CRYPTO_AHB_CLK>;
455 clocks = <&gcc GCC_USB_PHY_CFG_AHB_CLK>,
456 <&gcc GCC_QUSB_REF_CLK>;
461 resets = <&gcc GCC_QUSB2_PHY_BCR>;
469 clocks = <&gcc GCC_PRNG_AHB_CLK>;
802 gcc: clock-controller@1800000 { label
803 compatible = "qcom,gcc-msm8953";
846 power-domains = <&gcc MDSS_GDSC>;
852 clocks = <&gcc GCC_MDSS_AHB_CLK>,
853 <&gcc GCC_MDSS_AXI_CLK>,
854 <&gcc GCC_MDSS_VSYNC_CLK>,
855 <&gcc GCC_MDSS_MDP_CLK>;
861 resets = <&gcc GCC_MDSS_BCR>;
877 power-domains = <&gcc MDSS_GDSC>;
879 clocks = <&gcc GCC_MDSS_AHB_CLK>,
880 <&gcc GCC_MDSS_AXI_CLK>,
881 <&gcc GCC_MDSS_MDP_CLK>,
882 <&gcc GCC_MDSS_VSYNC_CLK>;
918 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
919 <&gcc PCLK0_CLK_SRC>;
923 clocks = <&gcc GCC_MDSS_MDP_CLK>,
924 <&gcc GCC_MDSS_AHB_CLK>,
925 <&gcc GCC_MDSS_AXI_CLK>,
926 <&gcc GCC_MDSS_BYTE0_CLK>,
927 <&gcc GCC_MDSS_PCLK0_CLK>,
928 <&gcc GCC_MDSS_ESC0_CLK>;
974 clocks = <&gcc GCC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
988 assigned-clocks = <&gcc BYTE1_CLK_SRC>,
989 <&gcc PCLK1_CLK_SRC>;
993 clocks = <&gcc GCC_MDSS_MDP_CLK>,
994 <&gcc GCC_MDSS_AHB_CLK>,
995 <&gcc GCC_MDSS_AXI_CLK>,
996 <&gcc GCC_MDSS_BYTE1_CLK>,
997 <&gcc GCC_MDSS_PCLK1_CLK>,
998 <&gcc GCC_MDSS_ESC1_CLK>;
1041 clocks = <&gcc GCC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
1054 clocks = <&gcc GCC_OXILI_GFX3D_CLK>,
1055 <&gcc GCC_OXILI_AHB_CLK>,
1056 <&gcc GCC_BIMC_GFX_CLK>,
1057 <&gcc GCC_BIMC_GPU_CLK>,
1058 <&gcc GCC_OXILI_TIMER_CLK>,
1059 <&gcc GCC_OXILI_AON_CLK>;
1066 power-domains = <&gcc OXILI_GX_GDSC>;
1140 clocks = <&gcc GCC_OXILI_AHB_CLK>,
1141 <&gcc GCC_BIMC_GFX_CLK>;
1144 power-domains = <&gcc OXILI_CX_GDSC>;
1171 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1172 <&gcc GCC_APSS_TCU_ASYNC_CLK>;
1241 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1242 <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
1243 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1250 resets = <&gcc GCC_MSS_BCR>;
1290 clocks = <&gcc GCC_USB_PHY_CFG_AHB_CLK>,
1291 <&gcc GCC_USB30_MASTER_CLK>,
1292 <&gcc GCC_PCNOC_USB3_AXI_CLK>,
1293 <&gcc GCC_USB30_SLEEP_CLK>,
1294 <&gcc GCC_USB30_MOCK_UTMI_CLK>;
1301 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1302 <&gcc GCC_USB30_MASTER_CLK>;
1305 power-domains = <&gcc USB30_GDSC>;
1352 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
1353 <&gcc GCC_SDCC1_APPS_CLK>,
1412 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
1413 <&gcc GCC_SDCC2_APPS_CLK>,
1462 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1475 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
1476 <&gcc GCC_BLSP1_AHB_CLK>;
1487 clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
1488 <&gcc GCC_BLSP1_AHB_CLK>;
1507 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
1508 <&gcc GCC_BLSP1_AHB_CLK>;
1527 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
1528 <&gcc GCC_BLSP1_AHB_CLK>;
1547 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
1548 <&gcc GCC_BLSP1_AHB_CLK>;
1567 clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
1568 <&gcc GCC_BLSP1_AHB_CLK>;
1586 clocks = <&gcc GCC_BLSP2_AHB_CLK>;
1600 clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
1601 <&gcc GCC_BLSP2_AHB_CLK>;
1620 clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
1621 <&gcc GCC_BLSP2_AHB_CLK>;
1640 clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,
1641 <&gcc GCC_BLSP2_AHB_CLK>;
1660 clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,
1661 <&gcc GCC_BLSP2_AHB_CLK>;
1680 clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>,
1681 <&gcc GCC_BLSP2_AHB_CLK>;
1700 clocks = <&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>,
1701 <&gcc GCC_BLSP2_AHB_CLK>;