Lines Matching +full:0 +full:x81800000
25 #clock-cells = <0>;
31 #clock-cells = <0>;
39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0>;
54 reg = <0x1>;
64 reg = <0x2>;
74 reg = <0x3>;
84 reg = <0x100>;
94 reg = <0x101>;
104 reg = <0x102>;
114 reg = <0x103>;
153 l2_0: l2-cache-0 {
180 reg = <0 0x10000000 0 0>;
198 mboxes = <&apcs 0>;
268 reg = <0x0 0x81800000 0x0 0x2000>;
273 reg = <0x0 0x85b00000 0x0 0x800000>;
279 reg = <0x0 0x86300000 0x0 0x100000>;
286 reg = <0x0 0x86400000 0x0 0x400000>;
291 reg = <0x0 0x86c00000 0x0 0x6a00000>;
296 reg = <0x0 0x8d600000 0x0 0x1100000>;
301 reg = <0x0 0x8e700000 0x0 0x700000>;
306 reg = <0 0x90000000 0 0x1000>;
311 reg = <0x0 0x90001000 0x0 0x13ff000>;
316 reg = <0x0 0x91400000 0x0 0x700000>;
321 reg = <0x0 0x92000000 0x0 0x100000>;
327 reg = <0x0 0xf2d00000 0x0 0x180000>;
342 qcom,local-pid = <0>;
366 qcom,local-pid = <0>;
391 qcom,local-pid = <0>;
412 #size-cells = <0>;
414 mboxes = <0>, <&apcs 13>, <0>, <&apcs 19>;
416 apps_smsm: apps@0 {
417 reg = <0>;
439 soc: soc@0 {
442 ranges = <0 0 0 0xffffffff>;
447 reg = <0x00060000 0x8000>;
452 reg = <0x00079000 0x180>;
453 #phy-cells = <0>;
468 reg = <0x000e3000 0x1000>;
475 reg = <0x004a9000 0x1000>, /* TM */
476 <0x004a8000 0x1000>; /* SROT */
486 reg = <0x004ab000 0x4>;
491 reg = <0x01000000 0x300000>;
494 gpio-ranges = <&tlmm 0 0 142>;
804 reg = <0x01800000 0x80000>;
811 <&mdss_dsi0_phy 0>,
813 <&mdss_dsi1_phy 0>;
824 reg = <0x01905000 0x20000>;
830 reg = <0x01937000 0x30000>;
835 reg = <0x0193f044 0x4>;
841 reg = <0x01a00000 0x1000>,
842 <0x01ab0000 0x1040>;
871 reg = <0x01a01000 0x89000>;
875 interrupts = <0>;
888 iommus = <&apps_iommu 0x15>;
892 #size-cells = <0>;
894 port@0 {
895 reg = <0>;
912 reg = <0x01a94000 0x400>;
920 assigned-clock-parents = <&mdss_dsi0_phy 0>,
939 #size-cells = <0>;
945 #size-cells = <0>;
947 port@0 {
948 reg = <0>;
964 reg = <0x01a94400 0x100>,
965 <0x01a94500 0x300>,
966 <0x01a94800 0x188>;
972 #phy-cells = <0>;
982 reg = <0x01a96000 0x400>;
990 assigned-clock-parents = <&mdss_dsi1_phy 0>,
1012 #size-cells = <0>;
1014 port@0 {
1015 reg = <0>;
1031 reg = <0x01a96400 0x100>,
1032 <0x01a96500 0x300>,
1033 <0x01a96800 0x188>;
1039 #phy-cells = <0>;
1050 reg = <0x01c00000 0x40000>;
1068 iommus = <&gpu_iommu 0>;
1084 opp-supported-hw = <0xff>;
1090 opp-supported-hw = <0xff>;
1096 opp-supported-hw = <0xff>;
1102 opp-supported-hw = <0xff>;
1108 opp-supported-hw = <0xff>;
1114 opp-supported-hw = <0xff>;
1120 opp-supported-hw = <0xff>;
1130 opp-supported-hw = <0xff>;
1138 ranges = <0 0x01c48000 0x8000>;
1153 iommu-ctx@0 {
1155 reg = <0x0000 0x1000>;
1162 reg = <0x2000 0x1000>;
1169 ranges = <0 0x01e20000 0x20000>;
1184 reg = <0x14000 0x1000>;
1191 reg = <0x15000 0x1000>;
1198 reg = <0x16000 0x1000>;
1205 reg = <0x0200f000 0x1000>,
1206 <0x02400000 0x800000>,
1207 <0x02c00000 0x800000>,
1208 <0x03800000 0x200000>,
1209 <0x0200a000 0x2100>;
1213 qcom,ee = <0>;
1214 qcom,channel = <0>;
1219 #size-cells = <0>;
1224 reg = <0x04080000 0x100>,
1225 <0x04020000 0x040>;
1229 <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
1247 qcom,smem-states = <&smp2p_modem_out 0>;
1253 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1268 qcom,smd-edge = <0>;
1278 reg = <0x070f8800 0x400>;
1313 reg = <0x07000000 0xcc00>;
1322 snps,hird-threshold = /bits/ 8 <0x00>;
1330 #size-cells = <0>;
1332 port@0 {
1333 reg = <0>;
1345 reg = <0x07824900 0x500>, <0x07824000 0x800>;
1361 pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
1405 reg = <0x07864900 0x500>, <0x07864000 0x800>;
1421 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
1460 reg = <0x07884000 0x1f000>;
1466 qcom,ee = <0>;
1473 reg = <0x078af000 0x200>;
1484 reg = <0x078b5000 0x600>;
1493 pinctrl-0 = <&i2c_1_default>;
1497 #size-cells = <0>;
1504 reg = <0x078b6000 0x600>;
1513 pinctrl-0 = <&i2c_2_default>;
1517 #size-cells = <0>;
1524 reg = <0x078b7000 0x600>;
1533 pinctrl-0 = <&i2c_3_default>;
1537 #size-cells = <0>;
1544 reg = <0x078b7000 0x600>;
1553 pinctrl-0 = <&spi_3_default>;
1557 #size-cells = <0>;
1564 reg = <0x078b8000 0x600>;
1573 pinctrl-0 = <&i2c_4_default>;
1577 #size-cells = <0>;
1584 reg = <0x07ac4000 0x1f000>;
1590 qcom,ee = <0>;
1597 reg = <0x07af5000 0x600>;
1606 pinctrl-0 = <&i2c_5_default>;
1610 #size-cells = <0>;
1617 reg = <0x07af5000 0x600>;
1626 pinctrl-0 = <&spi_5_default>;
1630 #size-cells = <0>;
1637 reg = <0x07af6000 0x600>;
1646 pinctrl-0 = <&i2c_6_default>;
1650 #size-cells = <0>;
1657 reg = <0x07af6000 0x600>;
1666 pinctrl-0 = <&spi_6_default>;
1670 #size-cells = <0>;
1677 reg = <0x07af7000 0x600>;
1686 pinctrl-0 = <&i2c_7_default>;
1690 #size-cells = <0>;
1697 reg = <0x07af8000 0x600>;
1706 pinctrl-0 = <&i2c_8_default>;
1710 #size-cells = <0>;
1717 reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
1723 <&smp2p_wcnss_in 0 IRQ_TYPE_EDGE_RISING>,
1733 qcom,smem-states = <&smp2p_wcnss_out 0>;
1737 pinctrl-0 = <&wcnss_pin_a>;
1785 reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
1790 reg = <0x0b011000 0x1000>;
1796 reg = <0x0b120000 0x1000>;
1802 frame-number = <0>;
1805 reg = <0x0b121000 0x1000>,
1806 <0x0b122000 0x1000>;
1812 reg = <0x0b123000 0x1000>;
1819 reg = <0x0b124000 0x1000>;
1826 reg = <0x0b125000 0x1000>;
1833 reg = <0x0b126000 0x1000>;
1840 reg = <0x0b127000 0x1000>;
1847 reg = <0x0b128000 0x1000>;
1854 reg = <0x0c200000 0x100>;
1856 interrupts-extended = <&intc 0 293 IRQ_TYPE_EDGE_RISING>,
1857 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
1871 qcom,smem-states = <&smp2p_adsp_out 0>;
1889 #size-cells = <0>;
1902 #size-cells = <0>;
1907 qcom,sd-lines = <0 1>;
1911 qcom,sd-lines = <0 1>;
1915 qcom,sd-lines = <0>;
1931 #size-cells = <0>;
1934 dai@0 {
1935 reg = <0>;
1959 #sound-dai-cells = <0>;