Lines Matching refs:gcc
4 #include <dt-bindings/clock/qcom,gcc-msm8917.h>
161 clocks = <&gcc GCC_CRYPTO_CLK>,
162 <&gcc GCC_CRYPTO_AXI_CLK>,
163 <&gcc GCC_CRYPTO_AHB_CLK>;
471 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
472 <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
474 resets = <&gcc GCC_QUSB2_PHY_BCR>,
475 <&gcc GCC_USB2_HS_PHY_ONLY_BCR>;
615 clocks = <&gcc GCC_PRNG_AHB_CLK>;
957 gcc: clock-controller@1800000 { label
958 compatible = "qcom,gcc-msm8917";
991 power-domains = <&gcc MDSS_GDSC>;
993 clocks = <&gcc GCC_MDSS_AHB_CLK>,
994 <&gcc GCC_MDSS_AXI_CLK>,
995 <&gcc GCC_MDSS_VSYNC_CLK>;
1018 power-domains = <&gcc MDSS_GDSC>;
1020 clocks = <&gcc GCC_MDSS_AHB_CLK>,
1021 <&gcc GCC_MDSS_AXI_CLK>,
1022 <&gcc GCC_MDSS_MDP_CLK>,
1023 <&gcc GCC_MDSS_VSYNC_CLK>;
1053 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1054 <&gcc PCLK0_CLK_SRC>;
1058 clocks = <&gcc GCC_MDSS_MDP_CLK>,
1059 <&gcc GCC_MDSS_AHB_CLK>,
1060 <&gcc GCC_MDSS_AXI_CLK>,
1061 <&gcc GCC_MDSS_BYTE0_CLK>,
1062 <&gcc GCC_MDSS_PCLK0_CLK>,
1063 <&gcc GCC_MDSS_ESC0_CLK>;
1125 clocks = <&gcc GCC_MDSS_AHB_CLK>,
1138 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1139 <&gcc GCC_APSS_TCU_CLK>;
1174 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1175 <&gcc GCC_GFX_TCU_CLK>;
1197 clocks = <&gcc GCC_OXILI_GFX3D_CLK>,
1198 <&gcc GCC_OXILI_AHB_CLK>,
1199 <&gcc GCC_BIMC_GFX_CLK>,
1200 <&gcc GCC_BIMC_GPU_CLK>,
1201 <&gcc GFX3D_CLK_SRC>;
1202 power-domains = <&gcc OXILI_GX_GDSC>;
1284 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
1285 <&gcc GCC_SDCC1_APPS_CLK>,
1309 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
1310 <&gcc GCC_SDCC2_APPS_CLK>,
1325 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1338 clocks = <&gcc GCC_BLSP2_AHB_CLK>;
1351 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
1352 <&gcc GCC_BLSP1_AHB_CLK>;
1366 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
1367 <&gcc GCC_BLSP1_AHB_CLK>;
1381 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
1382 <&gcc GCC_BLSP1_AHB_CLK>;
1398 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
1399 <&gcc GCC_BLSP1_AHB_CLK>;
1415 clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
1416 <&gcc GCC_BLSP1_AHB_CLK>;
1432 clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
1433 <&gcc GCC_BLSP1_AHB_CLK>;
1449 clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
1450 <&gcc GCC_BLSP2_AHB_CLK>;
1466 clocks = <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>,
1467 <&gcc GCC_BLSP2_AHB_CLK>;
1485 clocks = <&gcc GCC_USB_HS_AHB_CLK>,
1486 <&gcc GCC_USB_HS_SYSTEM_CLK>;
1488 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
1490 resets = <&gcc GCC_USB_HS_BCR>;
1583 clocks = <&a53pll>, <&gcc GPLL0_EARLY>, <&rpmcc RPM_SMD_XO_CLK_SRC>;