Lines Matching +full:smem +full:- +full:state +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/interconnect/qcom,msm8916.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
14 #include <dt-bindings/soc/qcom,apr.h>
15 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&intc>;
20 #address-cells = <2>;
21 #size-cells = <2>;
31 reserved-memory {
32 #address-cells = <2>;
33 #size-cells = <2>;
36 tz-apps@86000000 {
38 no-map;
41 smem@86300000 {
42 compatible = "qcom,smem";
44 no-map;
47 qcom,rpm-msg-ram = <&rpm_msg_ram>;
52 no-map;
57 no-map;
62 no-map;
66 compatible = "qcom,rmtfs-mem";
68 no-map;
70 qcom,client-id = <1>;
75 no-map;
84 * define reliable alloc-ranges.
87 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
89 reg = <0x0 0x86800000 0x0 0>; /* size is device-specific */
90 no-map;
97 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
98 no-map;
105 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
106 no-map;
113 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
114 no-map;
120 xo_board: xo-board {
121 compatible = "fixed-clock";
122 #clock-cells = <0>;
123 clock-frequency = <19200000>;
126 sleep_clk: sleep-clk {
127 compatible = "fixed-clock";
128 #clock-cells = <0>;
129 clock-frequency = <32764>;
134 #address-cells = <1>;
135 #size-cells = <0>;
139 compatible = "arm,cortex-a53";
141 next-level-cache = <&l2_0>;
142 enable-method = "psci";
144 operating-points-v2 = <&cpu_opp_table>;
145 #cooling-cells = <2>;
146 power-domains = <&cpu_pd0>;
147 power-domain-names = "psci";
154 compatible = "arm,cortex-a53";
156 next-level-cache = <&l2_0>;
157 enable-method = "psci";
159 operating-points-v2 = <&cpu_opp_table>;
160 #cooling-cells = <2>;
161 power-domains = <&cpu_pd1>;
162 power-domain-names = "psci";
169 compatible = "arm,cortex-a53";
171 next-level-cache = <&l2_0>;
172 enable-method = "psci";
174 operating-points-v2 = <&cpu_opp_table>;
175 #cooling-cells = <2>;
176 power-domains = <&cpu_pd2>;
177 power-domain-names = "psci";
184 compatible = "arm,cortex-a53";
186 next-level-cache = <&l2_0>;
187 enable-method = "psci";
189 operating-points-v2 = <&cpu_opp_table>;
190 #cooling-cells = <2>;
191 power-domains = <&cpu_pd3>;
192 power-domain-names = "psci";
197 l2_0: l2-cache {
199 cache-level = <2>;
200 cache-unified;
203 idle-states {
204 entry-method = "psci";
206 cpu_sleep_0: cpu-sleep-0 {
207 compatible = "arm,idle-state";
208 idle-state-name = "standalone-power-collapse";
209 arm,psci-suspend-param = <0x40000002>;
210 entry-latency-us = <130>;
211 exit-latency-us = <150>;
212 min-residency-us = <2000>;
213 local-timer-stop;
217 domain-idle-states {
219 cluster_ret: cluster-retention {
220 compatible = "domain-idle-state";
221 arm,psci-suspend-param = <0x41000012>;
222 entry-latency-us = <500>;
223 exit-latency-us = <500>;
224 min-residency-us = <2000>;
227 cluster_pwrdn: cluster-gdhs {
228 compatible = "domain-idle-state";
229 arm,psci-suspend-param = <0x41000032>;
230 entry-latency-us = <2000>;
231 exit-latency-us = <2000>;
232 min-residency-us = <6000>;
237 cpu_opp_table: opp-table-cpu {
238 compatible = "operating-points-v2";
239 opp-shared;
241 opp-200000000 {
242 opp-hz = /bits/ 64 <200000000>;
244 opp-400000000 {
245 opp-hz = /bits/ 64 <400000000>;
247 opp-800000000 {
248 opp-hz = /bits/ 64 <800000000>;
250 opp-998400000 {
251 opp-hz = /bits/ 64 <998400000>;
257 compatible = "qcom,scm-msm8916", "qcom,scm";
261 clock-names = "core", "bus", "iface";
262 #reset-cells = <1>;
264 qcom,dload-mode = <&tcsr 0x6100>;
269 compatible = "arm,cortex-a53-pmu";
274 compatible = "arm,psci-1.0";
277 cpu_pd0: power-domain-cpu0 {
278 #power-domain-cells = <0>;
279 power-domains = <&cluster_pd>;
280 domain-idle-states = <&cpu_sleep_0>;
283 cpu_pd1: power-domain-cpu1 {
284 #power-domain-cells = <0>;
285 power-domains = <&cluster_pd>;
286 domain-idle-states = <&cpu_sleep_0>;
289 cpu_pd2: power-domain-cpu2 {
290 #power-domain-cells = <0>;
291 power-domains = <&cluster_pd>;
292 domain-idle-states = <&cpu_sleep_0>;
295 cpu_pd3: power-domain-cpu3 {
296 #power-domain-cells = <0>;
297 power-domains = <&cluster_pd>;
298 domain-idle-states = <&cpu_sleep_0>;
301 cluster_pd: power-domain-cluster {
302 #power-domain-cells = <0>;
303 domain-idle-states = <&cluster_ret>, <&cluster_pwrdn>;
308 compatible = "qcom,msm8916-rpm-proc", "qcom,rpm-proc";
310 smd-edge {
313 qcom,smd-edge = <15>;
315 rpm_requests: rpm-requests {
316 compatible = "qcom,rpm-msm8916", "qcom,smd-rpm";
317 qcom,smd-channels = "rpm_requests";
319 rpmcc: clock-controller {
320 compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
321 #clock-cells = <1>;
323 clock-names = "xo";
326 rpmpd: power-controller {
327 compatible = "qcom,msm8916-rpmpd";
328 #power-domain-cells = <1>;
329 operating-points-v2 = <&rpmpd_opp_table>;
331 rpmpd_opp_table: opp-table {
332 compatible = "operating-points-v2";
335 opp-level = <1>;
338 opp-level = <2>;
341 opp-level = <3>;
344 opp-level = <4>;
347 opp-level = <5>;
350 opp-level = <6>;
358 smp2p-hexagon {
360 qcom,smem = <435>, <428>;
366 qcom,local-pid = <0>;
367 qcom,remote-pid = <1>;
369 hexagon_smp2p_out: master-kernel {
370 qcom,entry-name = "master-kernel";
372 #qcom,smem-state-cells = <1>;
375 hexagon_smp2p_in: slave-kernel {
376 qcom,entry-name = "slave-kernel";
378 interrupt-controller;
379 #interrupt-cells = <2>;
383 smp2p-wcnss {
385 qcom,smem = <451>, <431>;
391 qcom,local-pid = <0>;
392 qcom,remote-pid = <4>;
394 wcnss_smp2p_out: master-kernel {
395 qcom,entry-name = "master-kernel";
397 #qcom,smem-state-cells = <1>;
400 wcnss_smp2p_in: slave-kernel {
401 qcom,entry-name = "slave-kernel";
403 interrupt-controller;
404 #interrupt-cells = <2>;
411 #address-cells = <1>;
412 #size-cells = <0>;
419 #qcom,smem-state-cells = <1>;
426 interrupt-controller;
427 #interrupt-cells = <2>;
434 interrupt-controller;
435 #interrupt-cells = <2>;
440 #address-cells = <1>;
441 #size-cells = <1>;
443 compatible = "simple-bus";
449 clock-names = "core";
458 compatible = "qcom,msm8916-qfprom", "qcom,qfprom";
460 #address-cells = <1>;
461 #size-cells = <1>;
468 tsens_s0_p1: s0-p1@d0 {
473 tsens_s0_p2: s0-p2@d1 {
478 tsens_s1_p1: s1-p1@d2 {
482 tsens_s1_p2: s1-p2@d2 {
486 tsens_s2_p1: s2-p1@d3 {
491 tsens_s2_p2: s2-p2@d4 {
498 tsens_s4_p1: s4-p1@d4 {
503 tsens_s4_p2: s4-p2@d5 {
508 tsens_s5_p1: s5-p1@d5 {
513 tsens_s5_p2: s5-p2@d6 {
530 compatible = "qcom,rpm-msg-ram";
535 compatible = "qcom,msm8916-rpm-stats";
540 compatible = "qcom,msm8916-bimc";
542 #interconnect-cells = <1>;
545 tsens: thermal-sensor@4a9000 {
546 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
551 nvmem-cells = <&tsens_mode>,
558 nvmem-cell-names = "mode",
567 interrupt-names = "uplow";
568 #thermal-sensor-cells = <1>;
572 compatible = "qcom,msm8916-pcnoc";
574 #interconnect-cells = <1>;
578 compatible = "qcom,msm8916-snoc";
580 #interconnect-cells = <1>;
584 compatible = "arm,coresight-stm", "arm,primecell";
587 reg-names = "stm-base", "stm-stimulus-base";
590 clock-names = "apb_pclk", "atclk";
594 out-ports {
597 remote-endpoint = <&funnel0_in7>;
604 /* CTI 0 - TMC connections */
606 compatible = "arm,coresight-cti", "arm,primecell";
610 clock-names = "apb_pclk";
615 /* CTI 1 - TPIU connections */
617 compatible = "arm,coresight-cti", "arm,primecell";
621 clock-names = "apb_pclk";
626 /* CTIs 2-11 - no information - not instantiated */
629 compatible = "arm,coresight-tpiu", "arm,primecell";
633 clock-names = "apb_pclk", "atclk";
637 in-ports {
640 remote-endpoint = <&replicator_out1>;
647 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
651 clock-names = "apb_pclk", "atclk";
655 in-ports {
656 #address-cells = <1>;
657 #size-cells = <0>;
661 * 0 - connected to Resource and Power Manger CPU ETM
662 * 1 - not-connected
663 * 2 - connected to Modem CPU ETM
664 * 3 - not-connected
665 * 5 - not-connected
666 * 6 - connected trought funnel to Wireless CPU ETM
667 * 7 - connected to STM component
673 remote-endpoint = <&funnel1_out>;
680 remote-endpoint = <&stm_out>;
685 out-ports {
688 remote-endpoint = <&etf_in>;
695 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
699 clock-names = "apb_pclk", "atclk";
703 out-ports {
704 #address-cells = <1>;
705 #size-cells = <0>;
710 remote-endpoint = <&etr_in>;
716 remote-endpoint = <&tpiu_in>;
721 in-ports {
724 remote-endpoint = <&etf_out>;
731 compatible = "arm,coresight-tmc", "arm,primecell";
735 clock-names = "apb_pclk", "atclk";
739 in-ports {
742 remote-endpoint = <&funnel0_out>;
747 out-ports {
750 remote-endpoint = <&replicator_in>;
757 compatible = "arm,coresight-tmc", "arm,primecell";
761 clock-names = "apb_pclk", "atclk";
765 in-ports {
768 remote-endpoint = <&replicator_out0>;
775 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
779 clock-names = "apb_pclk", "atclk";
783 in-ports {
784 #address-cells = <1>;
785 #size-cells = <0>;
790 remote-endpoint = <&etm0_out>;
796 remote-endpoint = <&etm1_out>;
802 remote-endpoint = <&etm2_out>;
808 remote-endpoint = <&etm3_out>;
813 out-ports {
816 remote-endpoint = <&funnel0_in4>;
823 compatible = "arm,coresight-cpu-debug", "arm,primecell";
826 clock-names = "apb_pclk";
832 compatible = "arm,coresight-cpu-debug", "arm,primecell";
835 clock-names = "apb_pclk";
841 compatible = "arm,coresight-cpu-debug", "arm,primecell";
844 clock-names = "apb_pclk";
850 compatible = "arm,coresight-cpu-debug", "arm,primecell";
853 clock-names = "apb_pclk";
858 /* Core CTIs; CTIs 12-15 */
859 /* CTI - CPU-0 */
861 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
866 clock-names = "apb_pclk";
869 arm,cs-dev-assoc = <&etm0>;
874 /* CTI - CPU-1 */
876 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
881 clock-names = "apb_pclk";
884 arm,cs-dev-assoc = <&etm1>;
889 /* CTI - CPU-2 */
891 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
896 clock-names = "apb_pclk";
899 arm,cs-dev-assoc = <&etm2>;
904 /* CTI - CPU-3 */
906 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
911 clock-names = "apb_pclk";
914 arm,cs-dev-assoc = <&etm3>;
920 compatible = "arm,coresight-etm4x", "arm,primecell";
924 clock-names = "apb_pclk", "atclk";
925 arm,coresight-loses-context-with-cpu;
931 out-ports {
934 remote-endpoint = <&funnel1_in0>;
941 compatible = "arm,coresight-etm4x", "arm,primecell";
945 clock-names = "apb_pclk", "atclk";
946 arm,coresight-loses-context-with-cpu;
952 out-ports {
955 remote-endpoint = <&funnel1_in1>;
962 compatible = "arm,coresight-etm4x", "arm,primecell";
966 clock-names = "apb_pclk", "atclk";
967 arm,coresight-loses-context-with-cpu;
973 out-ports {
976 remote-endpoint = <&funnel1_in2>;
983 compatible = "arm,coresight-etm4x", "arm,primecell";
987 clock-names = "apb_pclk", "atclk";
988 arm,coresight-loses-context-with-cpu;
994 out-ports {
997 remote-endpoint = <&funnel1_in3>;
1004 compatible = "qcom,msm8916-pinctrl";
1007 gpio-controller;
1008 gpio-ranges = <&tlmm 0 0 122>;
1009 #gpio-cells = <2>;
1010 interrupt-controller;
1011 #interrupt-cells = <2>;
1013 blsp_i2c1_default: blsp-i2c1-default-state {
1016 drive-strength = <2>;
1017 bias-disable;
1020 blsp_i2c1_sleep: blsp-i2c1-sleep-state {
1023 drive-strength = <2>;
1024 bias-disable;
1027 blsp_i2c2_default: blsp-i2c2-default-state {
1030 drive-strength = <2>;
1031 bias-disable;
1034 blsp_i2c2_sleep: blsp-i2c2-sleep-state {
1037 drive-strength = <2>;
1038 bias-disable;
1041 blsp_i2c3_default: blsp-i2c3-default-state {
1044 drive-strength = <2>;
1045 bias-disable;
1048 blsp_i2c3_sleep: blsp-i2c3-sleep-state {
1051 drive-strength = <2>;
1052 bias-disable;
1055 blsp_i2c4_default: blsp-i2c4-default-state {
1058 drive-strength = <2>;
1059 bias-disable;
1062 blsp_i2c4_sleep: blsp-i2c4-sleep-state {
1065 drive-strength = <2>;
1066 bias-disable;
1069 blsp_i2c5_default: blsp-i2c5-default-state {
1072 drive-strength = <2>;
1073 bias-disable;
1076 blsp_i2c5_sleep: blsp-i2c5-sleep-state {
1079 drive-strength = <2>;
1080 bias-disable;
1083 blsp_i2c6_default: blsp-i2c6-default-state {
1086 drive-strength = <2>;
1087 bias-disable;
1090 blsp_i2c6_sleep: blsp-i2c6-sleep-state {
1093 drive-strength = <2>;
1094 bias-disable;
1097 blsp_spi1_default: blsp-spi1-default-state {
1098 spi-pins {
1101 drive-strength = <12>;
1102 bias-disable;
1104 cs-pins {
1107 drive-strength = <16>;
1108 bias-disable;
1109 output-high;
1113 blsp_spi1_sleep: blsp-spi1-sleep-state {
1116 drive-strength = <2>;
1117 bias-pull-down;
1120 blsp_spi2_default: blsp-spi2-default-state {
1121 spi-pins {
1124 drive-strength = <12>;
1125 bias-disable;
1127 cs-pins {
1130 drive-strength = <16>;
1131 bias-disable;
1132 output-high;
1136 blsp_spi2_sleep: blsp-spi2-sleep-state {
1139 drive-strength = <2>;
1140 bias-pull-down;
1143 blsp_spi3_default: blsp-spi3-default-state {
1144 spi-pins {
1147 drive-strength = <12>;
1148 bias-disable;
1150 cs-pins {
1153 drive-strength = <16>;
1154 bias-disable;
1155 output-high;
1159 blsp_spi3_sleep: blsp-spi3-sleep-state {
1162 drive-strength = <2>;
1163 bias-pull-down;
1166 blsp_spi4_default: blsp-spi4-default-state {
1167 spi-pins {
1170 drive-strength = <12>;
1171 bias-disable;
1173 cs-pins {
1176 drive-strength = <16>;
1177 bias-disable;
1178 output-high;
1182 blsp_spi4_sleep: blsp-spi4-sleep-state {
1185 drive-strength = <2>;
1186 bias-pull-down;
1189 blsp_spi5_default: blsp-spi5-default-state {
1190 spi-pins {
1193 drive-strength = <12>;
1194 bias-disable;
1196 cs-pins {
1199 drive-strength = <16>;
1200 bias-disable;
1201 output-high;
1205 blsp_spi5_sleep: blsp-spi5-sleep-state {
1208 drive-strength = <2>;
1209 bias-pull-down;
1212 blsp_spi6_default: blsp-spi6-default-state {
1213 spi-pins {
1216 drive-strength = <12>;
1217 bias-disable;
1219 cs-pins {
1222 drive-strength = <16>;
1223 bias-disable;
1224 output-high;
1228 blsp_spi6_sleep: blsp-spi6-sleep-state {
1231 drive-strength = <2>;
1232 bias-pull-down;
1235 blsp_uart1_console_default: blsp-uart1-console-default-state {
1236 tx-pins {
1239 drive-strength = <16>;
1240 bias-disable;
1241 bootph-all;
1244 rx-pins {
1247 drive-strength = <16>;
1248 bias-pull-up;
1249 bootph-all;
1253 blsp_uart1_console_sleep: blsp-uart1-console-sleep-state {
1256 drive-strength = <2>;
1257 bias-pull-down;
1260 blsp_uart2_console_default: blsp-uart2-console-default-state {
1261 tx-pins {
1264 drive-strength = <16>;
1265 bias-disable;
1266 bootph-all;
1269 rx-pins {
1272 drive-strength = <16>;
1273 bias-pull-up;
1274 bootph-all;
1278 blsp_uart2_console_sleep: blsp-uart2-console-sleep-state {
1281 drive-strength = <2>;
1282 bias-pull-down;
1285 camera_front_default: camera-front-default-state {
1286 pwdn-pins {
1289 drive-strength = <16>;
1290 bias-disable;
1292 rst-pins {
1295 drive-strength = <16>;
1296 bias-disable;
1298 mclk1-pins {
1301 drive-strength = <16>;
1302 bias-disable;
1306 camera_rear_default: camera-rear-default-state {
1307 pwdn-pins {
1310 drive-strength = <16>;
1311 bias-disable;
1313 rst-pins {
1316 drive-strength = <16>;
1317 bias-disable;
1319 mclk0-pins {
1322 drive-strength = <16>;
1323 bias-disable;
1327 cci0_default: cci0-default-state {
1330 drive-strength = <16>;
1331 bias-disable;
1334 cdc_dmic_default: cdc-dmic-default-state {
1335 clk-pins {
1338 drive-strength = <8>;
1340 data-pins {
1343 drive-strength = <8>;
1347 cdc_dmic_sleep: cdc-dmic-sleep-state {
1348 clk-pins {
1351 drive-strength = <2>;
1352 bias-disable;
1354 data-pins {
1357 drive-strength = <2>;
1358 bias-disable;
1362 cdc_pdm_default: cdc-pdm-default-state {
1366 drive-strength = <8>;
1367 bias-disable;
1370 cdc_pdm_sleep: cdc-pdm-sleep-state {
1374 drive-strength = <2>;
1375 bias-pull-down;
1378 pri_mi2s_default: mi2s-pri-default-state {
1381 drive-strength = <8>;
1382 bias-disable;
1385 pri_mi2s_sleep: mi2s-pri-sleep-state {
1388 drive-strength = <2>;
1389 bias-disable;
1392 pri_mi2s_mclk_default: mi2s-pri-mclk-default-state {
1395 drive-strength = <8>;
1396 bias-disable;
1399 pri_mi2s_mclk_sleep: mi2s-pri-mclk-sleep-state {
1402 drive-strength = <2>;
1403 bias-disable;
1406 pri_mi2s_ws_default: mi2s-pri-ws-default-state {
1409 drive-strength = <8>;
1410 bias-disable;
1413 pri_mi2s_ws_sleep: mi2s-pri-ws-sleep-state {
1416 drive-strength = <2>;
1417 bias-disable;
1420 sec_mi2s_default: mi2s-sec-default-state {
1423 drive-strength = <8>;
1424 bias-disable;
1427 sec_mi2s_sleep: mi2s-sec-sleep-state {
1430 drive-strength = <2>;
1431 bias-disable;
1434 sdc1_default: sdc1-default-state {
1435 clk-pins {
1437 bias-disable;
1438 drive-strength = <16>;
1440 cmd-pins {
1442 bias-pull-up;
1443 drive-strength = <10>;
1445 data-pins {
1447 bias-pull-up;
1448 drive-strength = <10>;
1452 sdc1_sleep: sdc1-sleep-state {
1453 clk-pins {
1455 bias-disable;
1456 drive-strength = <2>;
1458 cmd-pins {
1460 bias-pull-up;
1461 drive-strength = <2>;
1463 data-pins {
1465 bias-pull-up;
1466 drive-strength = <2>;
1470 sdc2_default: sdc2-default-state {
1471 clk-pins {
1473 bias-disable;
1474 drive-strength = <16>;
1476 cmd-pins {
1478 bias-pull-up;
1479 drive-strength = <10>;
1481 data-pins {
1483 bias-pull-up;
1484 drive-strength = <10>;
1488 sdc2_sleep: sdc2-sleep-state {
1489 clk-pins {
1491 bias-disable;
1492 drive-strength = <2>;
1494 cmd-pins {
1496 bias-pull-up;
1497 drive-strength = <2>;
1499 data-pins {
1501 bias-pull-up;
1502 drive-strength = <2>;
1506 wcss_wlan_default: wcss-wlan-default-state {
1509 drive-strength = <6>;
1510 bias-pull-up;
1514 gcc: clock-controller@1800000 {
1515 compatible = "qcom,gcc-msm8916";
1516 #clock-cells = <1>;
1517 #reset-cells = <1>;
1518 #power-domain-cells = <1>;
1527 clock-names = "xo",
1537 compatible = "qcom,tcsr-mutex";
1539 #hwlock-cells = <1>;
1543 compatible = "qcom,tcsr-msm8916", "syscon";
1547 mdss: display-subsystem@1a00000 {
1552 reg-names = "mdss_phys", "vbif_phys";
1554 power-domains = <&gcc MDSS_GDSC>;
1559 clock-names = "iface",
1565 interrupt-controller;
1566 #interrupt-cells = <1>;
1568 #address-cells = <1>;
1569 #size-cells = <1>;
1572 mdss_mdp: display-controller@1a01000 {
1573 compatible = "qcom,msm8916-mdp5", "qcom,mdp5";
1575 reg-names = "mdp_phys";
1577 interrupt-parent = <&mdss>;
1584 clock-names = "iface",
1592 #address-cells = <1>;
1593 #size-cells = <0>;
1598 remote-endpoint = <&mdss_dsi0_in>;
1605 compatible = "qcom,msm8916-dsi-ctrl",
1606 "qcom,mdss-dsi-ctrl";
1608 reg-names = "dsi_ctrl";
1610 interrupt-parent = <&mdss>;
1613 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1615 assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
1624 clock-names = "mdp_core",
1632 #address-cells = <1>;
1633 #size-cells = <0>;
1636 #address-cells = <1>;
1637 #size-cells = <0>;
1642 remote-endpoint = <&mdss_mdp_intf1_out>;
1655 compatible = "qcom,dsi-phy-28nm-lp";
1659 reg-names = "dsi_pll",
1663 #clock-cells = <1>;
1664 #phy-cells = <0>;
1668 clock-names = "iface", "ref";
1673 compatible = "qcom,msm8916-camss";
1683 reg-names = "csiphy0",
1698 interrupt-names = "csiphy0",
1704 power-domains = <&gcc VFE_GDSC>;
1724 clock-names = "top_ahb",
1746 #address-cells = <1>;
1747 #size-cells = <0>;
1760 compatible = "qcom,msm8916-cci", "qcom,msm8226-cci";
1761 #address-cells = <1>;
1762 #size-cells = <0>;
1769 clock-names = "camss_top_ahb", "cci_ahb",
1771 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1773 assigned-clock-rates = <80000000>, <19200000>;
1774 pinctrl-names = "default";
1775 pinctrl-0 = <&cci0_default>;
1778 cci_i2c0: i2c-bus@0 {
1780 clock-frequency = <400000>;
1781 #address-cells = <1>;
1782 #size-cells = <0>;
1787 compatible = "qcom,adreno-306.0", "qcom,adreno";
1789 reg-names = "kgsl_3d0_reg_memory";
1791 interrupt-names = "kgsl_3d0_irq";
1792 clock-names =
1806 power-domains = <&gcc OXILI_GDSC>;
1807 operating-points-v2 = <&gpu_opp_table>;
1809 #cooling-cells = <2>;
1813 gpu_opp_table: opp-table {
1814 compatible = "operating-points-v2";
1816 opp-400000000 {
1817 opp-hz = /bits/ 64 <400000000>;
1819 opp-19200000 {
1820 opp-hz = /bits/ 64 <19200000>;
1825 venus: video-codec@1d00000 {
1826 compatible = "qcom,msm8916-venus";
1829 power-domains = <&gcc VENUS_GDSC>;
1833 clock-names = "core", "iface", "bus";
1835 memory-region = <&venus_mem>;
1838 video-decoder {
1839 compatible = "venus-decoder";
1842 video-encoder {
1843 compatible = "venus-encoder";
1848 #address-cells = <1>;
1849 #size-cells = <1>;
1850 #iommu-cells = <1>;
1851 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1856 clock-names = "iface", "bus";
1857 qcom,iommu-secure-id = <17>;
1860 iommu-ctx@3000 {
1861 compatible = "qcom,msm-iommu-v1-sec";
1867 iommu-ctx@4000 {
1868 compatible = "qcom,msm-iommu-v1-ns";
1874 iommu-ctx@5000 {
1875 compatible = "qcom,msm-iommu-v1-sec";
1882 #address-cells = <1>;
1883 #size-cells = <1>;
1884 #iommu-cells = <1>;
1885 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1889 clock-names = "iface", "bus";
1890 qcom,iommu-secure-id = <18>;
1893 iommu-ctx@1000 {
1894 compatible = "qcom,msm-iommu-v1-ns";
1900 iommu-ctx@2000 {
1901 compatible = "qcom,msm-iommu-v1-ns";
1908 compatible = "qcom,spmi-pmic-arb";
1914 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1915 interrupt-names = "periph_irq";
1919 #address-cells = <2>;
1920 #size-cells = <0>;
1921 interrupt-controller;
1922 #interrupt-cells = <4>;
1925 bam_dmux_dma: dma-controller@4044000 {
1926 compatible = "qcom,bam-v1.7.0";
1929 #dma-cells = <1>;
1932 num-channels = <6>;
1933 qcom,num-ees = <1>;
1934 qcom,powered-remotely;
1940 compatible = "qcom,msm8916-mss-pil";
1944 reg-names = "qdsp6", "rmb";
1946 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1951 interrupt-names = "wdog", "fatal", "ready",
1952 "handover", "stop-ack";
1954 power-domains = <&rpmpd MSM8916_VDDCX>,
1956 power-domain-names = "cx", "mx";
1962 clock-names = "iface", "bus", "mem", "xo";
1964 qcom,smem-states = <&hexagon_smp2p_out 0>;
1965 qcom,smem-state-names = "stop";
1968 reset-names = "mss_restart";
1970 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1975 memory-region = <&mba_mem>;
1979 memory-region = <&mpss_mem>;
1982 bam_dmux: bam-dmux {
1983 compatible = "qcom,bam-dmux";
1985 interrupt-parent = <&hexagon_smsm>;
1987 interrupt-names = "pc", "pc-ack";
1989 qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1990 qcom,smem-state-names = "pc", "pc-ack";
1993 dma-names = "tx", "rx";
1998 smd-edge {
2001 qcom,smd-edge = <0>;
2003 qcom,remote-pid = <1>;
2008 compatible = "qcom,apr-v2";
2009 qcom,smd-channels = "apr_audio_svc";
2011 #address-cells = <1>;
2012 #size-cells = <0>;
2025 compatible = "qcom,q6afe-dais";
2026 #address-cells = <1>;
2027 #size-cells = <0>;
2028 #sound-dai-cells = <1>;
2037 compatible = "qcom,q6asm-dais";
2038 #address-cells = <1>;
2039 #size-cells = <0>;
2040 #sound-dai-cells = <1>;
2049 compatible = "qcom,q6adm-routing";
2050 #sound-dai-cells = <0>;
2057 qcom,smd-channels = "fastrpcsmd-apps-dsp";
2059 qcom,non-secure-domain;
2061 #address-cells = <1>;
2062 #size-cells = <0>;
2065 compatible = "qcom,fastrpc-compute-cb";
2074 compatible = "qcom,apq8016-sbc-sndcard";
2076 reg-names = "mic-iomux", "spkr-iomux";
2079 lpass: audio-controller@7708000 {
2081 compatible = "qcom,apq8016-lpass-cpu";
2096 clock-names = "ahbix-clk",
2097 "mi2s-bit-clk0",
2098 "mi2s-bit-clk1",
2099 "mi2s-bit-clk2",
2100 "mi2s-bit-clk3",
2101 "pcnoc-mport-clk",
2102 "pcnoc-sway-clk";
2103 #sound-dai-cells = <1>;
2106 interrupt-names = "lpass-irq-lpaif";
2108 reg-names = "lpass-lpaif";
2110 #address-cells = <1>;
2111 #size-cells = <0>;
2114 lpass_codec: audio-codec@771c000 {
2115 compatible = "qcom,msm8916-wcd-digital-codec";
2119 clock-names = "ahbix-clk", "mclk";
2120 #sound-dai-cells = <1>;
2125 compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
2127 reg-names = "hc", "core";
2131 interrupt-names = "hc_irq", "pwr_irq";
2135 clock-names = "iface", "core", "xo";
2136 pinctrl-0 = <&sdc1_default>;
2137 pinctrl-1 = <&sdc1_sleep>;
2138 pinctrl-names = "default", "sleep";
2139 mmc-ddr-1_8v;
2140 bus-width = <8>;
2141 non-removable;
2146 compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
2148 reg-names = "hc", "core";
2152 interrupt-names = "hc_irq", "pwr_irq";
2156 clock-names = "iface", "core", "xo";
2157 pinctrl-0 = <&sdc2_default>;
2158 pinctrl-1 = <&sdc2_sleep>;
2159 pinctrl-names = "default", "sleep";
2160 bus-width = <4>;
2164 blsp_dma: dma-controller@7884000 {
2165 compatible = "qcom,bam-v1.7.0";
2169 clock-names = "bam_clk";
2170 #dma-cells = <1>;
2172 qcom,controlled-remotely;
2176 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
2180 clock-names = "core", "iface";
2182 dma-names = "tx", "rx";
2187 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
2191 clock-names = "core", "iface";
2193 dma-names = "tx", "rx";
2198 compatible = "qcom,i2c-qup-v2.2.1";
2203 clock-names = "core", "iface";
2205 dma-names = "tx", "rx";
2206 pinctrl-names = "default", "sleep";
2207 pinctrl-0 = <&blsp_i2c1_default>;
2208 pinctrl-1 = <&blsp_i2c1_sleep>;
2209 #address-cells = <1>;
2210 #size-cells = <0>;
2215 compatible = "qcom,spi-qup-v2.2.1";
2220 clock-names = "core", "iface";
2222 dma-names = "tx", "rx";
2223 pinctrl-names = "default", "sleep";
2224 pinctrl-0 = <&blsp_spi1_default>;
2225 pinctrl-1 = <&blsp_spi1_sleep>;
2226 #address-cells = <1>;
2227 #size-cells = <0>;
2232 compatible = "qcom,i2c-qup-v2.2.1";
2237 clock-names = "core", "iface";
2239 dma-names = "tx", "rx";
2240 pinctrl-names = "default", "sleep";
2241 pinctrl-0 = <&blsp_i2c2_default>;
2242 pinctrl-1 = <&blsp_i2c2_sleep>;
2243 #address-cells = <1>;
2244 #size-cells = <0>;
2249 compatible = "qcom,spi-qup-v2.2.1";
2254 clock-names = "core", "iface";
2256 dma-names = "tx", "rx";
2257 pinctrl-names = "default", "sleep";
2258 pinctrl-0 = <&blsp_spi2_default>;
2259 pinctrl-1 = <&blsp_spi2_sleep>;
2260 #address-cells = <1>;
2261 #size-cells = <0>;
2266 compatible = "qcom,i2c-qup-v2.2.1";
2271 clock-names = "core", "iface";
2273 dma-names = "tx", "rx";
2274 pinctrl-names = "default", "sleep";
2275 pinctrl-0 = <&blsp_i2c3_default>;
2276 pinctrl-1 = <&blsp_i2c3_sleep>;
2277 #address-cells = <1>;
2278 #size-cells = <0>;
2283 compatible = "qcom,spi-qup-v2.2.1";
2288 clock-names = "core", "iface";
2290 dma-names = "tx", "rx";
2291 pinctrl-names = "default", "sleep";
2292 pinctrl-0 = <&blsp_spi3_default>;
2293 pinctrl-1 = <&blsp_spi3_sleep>;
2294 #address-cells = <1>;
2295 #size-cells = <0>;
2300 compatible = "qcom,i2c-qup-v2.2.1";
2305 clock-names = "core", "iface";
2307 dma-names = "tx", "rx";
2308 pinctrl-names = "default", "sleep";
2309 pinctrl-0 = <&blsp_i2c4_default>;
2310 pinctrl-1 = <&blsp_i2c4_sleep>;
2311 #address-cells = <1>;
2312 #size-cells = <0>;
2317 compatible = "qcom,spi-qup-v2.2.1";
2322 clock-names = "core", "iface";
2324 dma-names = "tx", "rx";
2325 pinctrl-names = "default", "sleep";
2326 pinctrl-0 = <&blsp_spi4_default>;
2327 pinctrl-1 = <&blsp_spi4_sleep>;
2328 #address-cells = <1>;
2329 #size-cells = <0>;
2334 compatible = "qcom,i2c-qup-v2.2.1";
2339 clock-names = "core", "iface";
2341 dma-names = "tx", "rx";
2342 pinctrl-names = "default", "sleep";
2343 pinctrl-0 = <&blsp_i2c5_default>;
2344 pinctrl-1 = <&blsp_i2c5_sleep>;
2345 #address-cells = <1>;
2346 #size-cells = <0>;
2351 compatible = "qcom,spi-qup-v2.2.1";
2356 clock-names = "core", "iface";
2358 dma-names = "tx", "rx";
2359 pinctrl-names = "default", "sleep";
2360 pinctrl-0 = <&blsp_spi5_default>;
2361 pinctrl-1 = <&blsp_spi5_sleep>;
2362 #address-cells = <1>;
2363 #size-cells = <0>;
2368 compatible = "qcom,i2c-qup-v2.2.1";
2373 clock-names = "core", "iface";
2375 dma-names = "tx", "rx";
2376 pinctrl-names = "default", "sleep";
2377 pinctrl-0 = <&blsp_i2c6_default>;
2378 pinctrl-1 = <&blsp_i2c6_sleep>;
2379 #address-cells = <1>;
2380 #size-cells = <0>;
2385 compatible = "qcom,spi-qup-v2.2.1";
2390 clock-names = "core", "iface";
2392 dma-names = "tx", "rx";
2393 pinctrl-names = "default", "sleep";
2394 pinctrl-0 = <&blsp_spi6_default>;
2395 pinctrl-1 = <&blsp_spi6_sleep>;
2396 #address-cells = <1>;
2397 #size-cells = <0>;
2402 compatible = "qcom,ci-hdrc";
2409 clock-names = "iface", "core";
2410 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
2411 assigned-clock-rates = <80000000>;
2413 reset-names = "core";
2416 hnp-disable;
2417 srp-disable;
2418 adp-disable;
2419 ahb-burst-config = <0>;
2420 phy-names = "usb-phy";
2423 #reset-cells = <1>;
2427 compatible = "qcom,usb-hs-phy-msm8916",
2428 "qcom,usb-hs-phy";
2429 #phy-cells = <0>;
2431 clock-names = "ref", "sleep";
2433 reset-names = "phy", "por";
2434 qcom,init-seq = /bits/ 8 <0x0 0x44>,
2443 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
2445 reg-names = "ccu", "dxe", "pmu";
2447 memory-region = <&wcnss_mem>;
2449 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
2454 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
2456 power-domains = <&rpmpd MSM8916_VDDCX>,
2458 power-domain-names = "cx", "mx";
2460 qcom,smem-states = <&wcnss_smp2p_out 0>;
2461 qcom,smem-state-names = "stop";
2463 pinctrl-names = "default";
2464 pinctrl-0 = <&wcss_wlan_default>;
2469 /* Separate chip, compatible is board-specific */
2471 clock-names = "xo";
2474 smd-edge {
2478 qcom,smd-edge = <6>;
2479 qcom,remote-pid = <4>;
2485 qcom,smd-channels = "WCNSS_CTRL";
2490 compatible = "qcom,wcnss-bt";
2494 compatible = "qcom,wcnss-wlan";
2498 interrupt-names = "tx", "rx";
2500 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
2501 qcom,smem-state-names = "tx-enable", "tx-rings-empty";
2507 intc: interrupt-controller@b000000 {
2508 compatible = "qcom,msm-qgic2";
2509 interrupt-controller;
2510 #interrupt-cells = <3>;
2517 compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
2519 #mbox-cells = <1>;
2521 clock-names = "pll", "aux";
2522 #clock-cells = <0>;
2526 compatible = "qcom,msm8916-a53pll";
2528 #clock-cells = <0>;
2530 clock-names = "xo";
2534 #address-cells = <1>;
2535 #size-cells = <1>;
2537 compatible = "arm,armv7-timer-mem";
2539 clock-frequency = <19200000>;
2542 frame-number = <0>;
2550 frame-number = <1>;
2557 frame-number = <2>;
2564 frame-number = <3>;
2571 frame-number = <4>;
2578 frame-number = <5>;
2585 frame-number = <6>;
2592 cpu0_acc: power-manager@b088000 {
2593 compatible = "qcom,msm8916-acc";
2598 cpu0_saw: power-manager@b089000 {
2599 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2604 cpu1_acc: power-manager@b098000 {
2605 compatible = "qcom,msm8916-acc";
2610 cpu1_saw: power-manager@b099000 {
2611 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2616 cpu2_acc: power-manager@b0a8000 {
2617 compatible = "qcom,msm8916-acc";
2622 cpu2_saw: power-manager@b0a9000 {
2623 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2628 cpu3_acc: power-manager@b0b8000 {
2629 compatible = "qcom,msm8916-acc";
2634 cpu3_saw: power-manager@b0b9000 {
2635 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2641 thermal-zones {
2642 cpu0-1-thermal {
2643 polling-delay-passive = <250>;
2645 thermal-sensors = <&tsens 5>;
2648 cpu0_1_alert0: trip-point0 {
2653 cpu0_1_crit: cpu-crit {
2660 cooling-maps {
2663 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2671 cpu2-3-thermal {
2672 polling-delay-passive = <250>;
2674 thermal-sensors = <&tsens 4>;
2677 cpu2_3_alert0: trip-point0 {
2682 cpu2_3_crit: cpu-crit {
2689 cooling-maps {
2692 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2700 gpu-thermal {
2701 polling-delay-passive = <250>;
2703 thermal-sensors = <&tsens 2>;
2705 cooling-maps {
2708 cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
2713 gpu_alert0: trip-point0 {
2718 gpu_crit: gpu-crit {
2726 camera-thermal {
2727 polling-delay-passive = <250>;
2729 thermal-sensors = <&tsens 1>;
2732 cam_alert0: trip-point0 {
2740 modem-thermal {
2741 polling-delay-passive = <250>;
2743 thermal-sensors = <&tsens 0>;
2746 modem_alert0: trip-point0 {
2756 compatible = "arm,armv8-timer";