Lines Matching +full:ns +full:- +full:thermal
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
12 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&intc>;
20 sleep_clk: sleep-clk {
21 compatible = "fixed-clock";
22 clock-frequency = <32000>;
23 #clock-cells = <0>;
27 compatible = "fixed-clock";
28 clock-frequency = <24000000>;
29 #clock-cells = <0>;
34 #address-cells = <1>;
35 #size-cells = <0>;
39 compatible = "arm,cortex-a53";
41 enable-method = "psci";
42 next-level-cache = <&l2_0>;
44 clock-names = "cpu";
45 operating-points-v2 = <&cpu_opp_table>;
46 cpu-supply = <&ipq6018_s2>;
47 #cooling-cells = <2>;
52 compatible = "arm,cortex-a53";
53 enable-method = "psci";
55 next-level-cache = <&l2_0>;
57 clock-names = "cpu";
58 operating-points-v2 = <&cpu_opp_table>;
59 cpu-supply = <&ipq6018_s2>;
60 #cooling-cells = <2>;
65 compatible = "arm,cortex-a53";
66 enable-method = "psci";
68 next-level-cache = <&l2_0>;
70 clock-names = "cpu";
71 operating-points-v2 = <&cpu_opp_table>;
72 cpu-supply = <&ipq6018_s2>;
73 #cooling-cells = <2>;
78 compatible = "arm,cortex-a53";
79 enable-method = "psci";
81 next-level-cache = <&l2_0>;
83 clock-names = "cpu";
84 operating-points-v2 = <&cpu_opp_table>;
85 cpu-supply = <&ipq6018_s2>;
86 #cooling-cells = <2>;
89 l2_0: l2-cache {
91 cache-level = <2>;
92 cache-unified;
98 compatible = "qcom,scm-ipq6018", "qcom,scm";
99 qcom,dload-mode = <&tcsr 0x6100>;
103 cpu_opp_table: opp-table-cpu {
104 compatible = "operating-points-v2-kryo-cpu";
105 nvmem-cells = <&cpu_speed_bin>;
106 opp-shared;
108 opp-864000000 {
109 opp-hz = /bits/ 64 <864000000>;
110 opp-microvolt = <725000>;
111 opp-supported-hw = <0xf>;
112 clock-latency-ns = <200000>;
115 opp-1056000000 {
116 opp-hz = /bits/ 64 <1056000000>;
117 opp-microvolt = <787500>;
118 opp-supported-hw = <0xf>;
119 clock-latency-ns = <200000>;
122 opp-1320000000 {
123 opp-hz = /bits/ 64 <1320000000>;
124 opp-microvolt = <862500>;
125 opp-supported-hw = <0x3>;
126 clock-latency-ns = <200000>;
129 opp-1440000000 {
130 opp-hz = /bits/ 64 <1440000000>;
131 opp-microvolt = <925000>;
132 opp-supported-hw = <0x3>;
133 clock-latency-ns = <200000>;
136 opp-1608000000 {
137 opp-hz = /bits/ 64 <1608000000>;
138 opp-microvolt = <987500>;
139 opp-supported-hw = <0x1>;
140 clock-latency-ns = <200000>;
143 opp-1800000000 {
144 opp-hz = /bits/ 64 <1800000000>;
145 opp-microvolt = <1062500>;
146 opp-supported-hw = <0x1>;
147 clock-latency-ns = <200000>;
152 compatible = "arm,cortex-a53-pmu";
157 compatible = "arm,psci-1.0";
162 compatible = "qcom,ipq6018-rpm-proc", "qcom,rpm-proc";
164 glink-edge {
165 compatible = "qcom,glink-rpm";
167 qcom,rpm-msg-ram = <&rpm_msg_ram>;
170 rpm_requests: rpm-requests {
171 compatible = "qcom,rpm-ipq6018", "qcom,glink-smd-rpm";
172 qcom,glink-channels = "rpm_requests";
175 compatible = "qcom,rpm-mp5496-regulators";
178 regulator-min-microvolt = <725000>;
179 regulator-max-microvolt = <1062500>;
180 regulator-always-on;
187 reserved-memory {
188 #address-cells = <2>;
189 #size-cells = <2>;
194 no-map;
199 no-map;
204 no-map;
209 no-map;
214 no-map;
219 no-map;
225 memory-region = <&smem_region>;
230 #address-cells = <2>;
231 #size-cells = <2>;
233 dma-ranges;
234 compatible = "simple-bus";
237 compatible = "qcom,ipq6018-qusb2-phy";
239 #phy-cells = <0>;
243 clock-names = "cfg_ahb", "ref";
250 compatible = "qcom,ipq6018-qmp-usb3-phy";
257 clock-names = "aux",
261 clock-output-names = "gcc_usb0_pipe_clk_src";
262 #clock-cells = <0>;
263 #phy-cells = <0>;
267 reset-names = "phy",
274 compatible = "qcom,ipq6018-qusb2-phy";
276 #phy-cells = <0>;
280 clock-names = "cfg_ahb", "ref";
287 compatible = "qcom,ipq6018-qmp-pcie-phy";
294 clock-names = "aux",
298 clock-output-names = "gcc_pcie0_pipe_clk_src";
299 #clock-cells = <0>;
301 #phy-cells = <0>;
305 reset-names = "phy",
310 #address-cells = <1>;
311 #size-cells = <0>;
312 compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio";
315 clock-names = "gcc_mdio_ahb_clk";
320 compatible = "qcom,ipq6018-qfprom", "qcom,qfprom";
322 #address-cells = <1>;
323 #size-cells = <1>;
325 cpu_speed_bin: cpu-speed-bin@135 {
332 compatible = "qcom,prng-ee";
335 clock-names = "core";
338 tsens: thermal-sensor@4a9000 {
339 compatible = "qcom,ipq6018-tsens", "qcom,ipq8074-tsens";
343 interrupt-names = "combined";
345 #thermal-sensor-cells = <1>;
348 cryptobam: dma-controller@704000 {
349 compatible = "qcom,bam-v1.7.0";
353 clock-names = "bam_clk";
354 #dma-cells = <1>;
356 qcom,controlled-remotely;
360 compatible = "qcom,crypto-v5.1";
365 clock-names = "iface", "bus", "core";
367 dma-names = "rx", "tx";
371 compatible = "qcom,ipq6018-pinctrl";
374 gpio-controller;
375 #gpio-cells = <2>;
376 gpio-ranges = <&tlmm 0 0 80>;
377 interrupt-controller;
378 #interrupt-cells = <2>;
380 serial_3_pins: serial3-state {
383 drive-strength = <8>;
384 bias-pull-down;
387 qpic_pins: qpic-state {
394 drive-strength = <8>;
395 bias-disable;
399 gcc: clock-controller@1800000 {
400 compatible = "qcom,gcc-ipq6018";
403 clock-names = "xo", "sleep_clk";
404 #clock-cells = <1>;
405 #reset-cells = <1>;
409 compatible = "qcom,ipq6018-tcsr-mutex", "qcom,tcsr-mutex";
411 #hwlock-cells = <1>;
415 compatible = "qcom,tcsr-ipq6018", "syscon";
420 compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
422 #address-cells = <2>;
423 #size-cells = <2>;
428 clock-names = "core",
432 assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
434 assigned-clock-rates = <133330000>,
439 interrupt-names = "pwr_event",
450 phy-names = "usb2-phy";
451 tx-fifo-resize;
452 snps,is-utmi-l1-suspend;
453 snps,hird-threshold = /bits/ 8 <0x0>;
461 compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5";
464 reg-names = "hc", "cqhci";
468 interrupt-names = "hc_irq", "pwr_irq";
473 clock-names = "iface", "core", "xo";
475 max-frequency = <192000000>;
479 blsp_dma: dma-controller@7884000 {
480 compatible = "qcom,bam-v1.7.0";
484 clock-names = "bam_clk";
485 #dma-cells = <1>;
490 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
495 clock-names = "core", "iface";
500 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
505 clock-names = "core", "iface";
510 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
515 clock-names = "core", "iface";
520 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
525 clock-names = "core", "iface";
530 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
535 clock-names = "core", "iface";
540 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
545 clock-names = "core", "iface";
550 compatible = "qcom,spi-qup-v2.2.1";
551 #address-cells = <1>;
552 #size-cells = <0>;
557 clock-names = "core", "iface";
559 dma-names = "tx", "rx";
564 compatible = "qcom,spi-qup-v2.2.1";
565 #address-cells = <1>;
566 #size-cells = <0>;
571 clock-names = "core", "iface";
573 dma-names = "tx", "rx";
578 compatible = "qcom,spi-qup-v2.2.1";
579 #address-cells = <1>;
580 #size-cells = <0>;
585 clock-names = "core", "iface";
587 dma-names = "tx", "rx";
592 compatible = "qcom,i2c-qup-v2.2.1";
593 #address-cells = <1>;
594 #size-cells = <0>;
599 clock-names = "core", "iface";
600 clock-frequency = <400000>;
602 dma-names = "tx", "rx";
607 compatible = "qcom,i2c-qup-v2.2.1";
608 #address-cells = <1>;
609 #size-cells = <0>;
614 clock-names = "core", "iface";
615 clock-frequency = <400000>;
617 dma-names = "tx", "rx";
622 compatible = "qcom,i2c-qup-v2.2.1";
623 #address-cells = <1>;
624 #size-cells = <0>;
629 clock-names = "core", "iface";
630 clock-frequency = <400000>;
632 dma-names = "tx", "rx";
636 qpic_bam: dma-controller@7984000 {
637 compatible = "qcom,bam-v1.7.0";
641 clock-names = "bam_clk";
642 #dma-cells = <1>;
647 qpic_nand: nand-controller@79b0000 {
648 compatible = "qcom,ipq6018-nand";
650 #address-cells = <1>;
651 #size-cells = <0>;
654 clock-names = "core", "aon";
659 dma-names = "tx", "rx", "cmd";
660 pinctrl-0 = <&qpic_pins>;
661 pinctrl-names = "default";
666 compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
668 #address-cells = <2>;
669 #size-cells = <2>;
676 clock-names = "cfg_noc",
681 assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
684 assigned-clock-rates = <133330000>,
691 interrupt-names = "pwr_event",
703 phy-names = "usb2-phy", "usb3-phy";
705 clock-names = "ref";
706 tx-fifo-resize;
707 snps,parkmode-disable-ss-quirk;
708 snps,is-utmi-l1-suspend;
709 snps,hird-threshold = /bits/ 8 <0x0>;
716 intc: interrupt-controller@b000000 {
717 compatible = "qcom,msm-qgic2";
718 #address-cells = <2>;
719 #size-cells = <2>;
720 interrupt-controller;
721 #interrupt-cells = <3>;
730 compatible = "arm,gic-v2m-frame";
731 msi-controller;
737 compatible = "qcom,kpss-wdt";
741 timeout-sec = <10>;
745 compatible = "qcom,ipq6018-apcs-apps-global";
747 #clock-cells = <1>;
749 clock-names = "pll", "xo", "gpll0";
750 #mbox-cells = <1>;
754 compatible = "qcom,ipq6018-a53pll";
756 #clock-cells = <0>;
758 clock-names = "xo";
762 #address-cells = <1>;
763 #size-cells = <1>;
765 compatible = "arm,armv7-timer-mem";
769 frame-number = <0>;
777 frame-number = <1>;
784 frame-number = <2>;
791 frame-number = <3>;
798 frame-number = <4>;
805 frame-number = <5>;
812 frame-number = <6>;
820 compatible = "qcom,ipq6018-wcss-pil";
823 reg-names = "qdsp6",
825 interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>,
830 interrupt-names = "wdog",
834 "stop-ack";
840 reset-names = "wcss_aon_reset",
845 clock-names = "prng";
847 qcom,halt-regs = <&tcsr 0x18000 0x1b000 0xe000>;
849 qcom,smem-states = <&wcss_smp2p_out 0>,
851 qcom,smem-state-names = "shutdown",
854 memory-region = <&q6_region>;
856 glink-edge {
859 qcom,remote-pid = <1>;
863 qcom,glink-channels = "IPCRTR";
869 compatible = "qcom,pcie-ipq6018";
875 reg-names = "dbi", "elbi", "atu", "parf", "config";
878 linux,pci-domain = <0>;
879 bus-range = <0x00 0xff>;
880 num-lanes = <1>;
881 max-link-speed = <3>;
882 #address-cells = <3>;
883 #size-cells = <2>;
886 phy-names = "pciephy";
892 interrupt-names = "msi";
894 #interrupt-cells = <1>;
895 interrupt-map-mask = <0 0 0 0x7>;
896 interrupt-map = <0 0 0 1 &intc 0 0 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
906 clock-names = "iface",
920 reset-names = "pipe",
934 bus-range = <0x01 0xff>;
936 #address-cells = <3>;
937 #size-cells = <2>;
943 thermal-zones {
944 nss-top-thermal {
945 polling-delay-passive = <250>;
946 thermal-sensors = <&tsens 4>;
949 nss-top-critical {
957 nss-thermal {
958 polling-delay-passive = <250>;
959 thermal-sensors = <&tsens 5>;
962 nss-critical {
970 wcss-phya0-thermal {
971 polling-delay-passive = <250>;
972 thermal-sensors = <&tsens 7>;
975 wcss-phya0-critical {
983 wcss-phya1-thermal {
984 polling-delay-passive = <250>;
985 polling-delay = <1000>;
986 thermal-sensors = <&tsens 8>;
989 wcss-phya1-critical {
997 cpu-thermal {
998 polling-delay-passive = <250>;
999 thermal-sensors = <&tsens 13>;
1002 cpu-critical {
1008 cpu_alert: cpu-passive {
1015 cooling-maps {
1018 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1026 lpass-thermal {
1027 polling-delay-passive = <250>;
1028 thermal-sensors = <&tsens 14>;
1031 lpass-critical {
1039 ddrss-top-thermal {
1040 polling-delay-passive = <250>;
1041 thermal-sensors = <&tsens 15>;
1044 ddrss-top-critical {
1054 compatible = "arm,armv8-timer";
1061 wcss: wcss-smp2p {
1065 interrupt-parent = <&intc>;
1070 qcom,local-pid = <0>;
1071 qcom,remote-pid = <1>;
1073 wcss_smp2p_out: master-kernel {
1074 qcom,entry-name = "master-kernel";
1075 #qcom,smem-state-cells = <1>;
1078 wcss_smp2p_in: slave-kernel {
1079 qcom,entry-name = "slave-kernel";
1080 interrupt-controller;
1081 #interrupt-cells = <2>;