Lines Matching +full:dload +full:- +full:mode
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
10 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
11 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
12 #include <dt-bindings/clock/qcom,rpmcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/interconnect/qcom,qcm2290.h>
18 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
19 #include <dt-bindings/power/qcom-rpmpd.h>
20 #include <dt-bindings/soc/qcom,apr.h>
21 #include <dt-bindings/sound/qcom,q6asm.h>
22 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
25 interrupt-parent = <&intc>;
27 #address-cells = <2>;
28 #size-cells = <2>;
33 xo_board: xo-board {
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
38 sleep_clk: sleep-clk {
39 compatible = "fixed-clock";
40 clock-frequency = <32764>;
41 #clock-cells = <0>;
46 #address-cells = <2>;
47 #size-cells = <0>;
51 compatible = "arm,cortex-a53";
54 capacity-dmips-mhz = <1024>;
55 dynamic-power-coefficient = <100>;
56 enable-method = "psci";
57 next-level-cache = <&l2_0>;
58 qcom,freq-domain = <&cpufreq_hw 0>;
59 power-domains = <&cpu_pd0>;
60 power-domain-names = "psci";
61 l2_0: l2-cache {
63 cache-level = <2>;
64 cache-unified;
70 compatible = "arm,cortex-a53";
73 capacity-dmips-mhz = <1024>;
74 dynamic-power-coefficient = <100>;
75 enable-method = "psci";
76 next-level-cache = <&l2_0>;
77 qcom,freq-domain = <&cpufreq_hw 0>;
78 power-domains = <&cpu_pd1>;
79 power-domain-names = "psci";
84 compatible = "arm,cortex-a53";
87 capacity-dmips-mhz = <1024>;
88 dynamic-power-coefficient = <100>;
89 enable-method = "psci";
90 next-level-cache = <&l2_0>;
91 qcom,freq-domain = <&cpufreq_hw 0>;
92 power-domains = <&cpu_pd2>;
93 power-domain-names = "psci";
98 compatible = "arm,cortex-a53";
101 capacity-dmips-mhz = <1024>;
102 dynamic-power-coefficient = <100>;
103 enable-method = "psci";
104 next-level-cache = <&l2_0>;
105 qcom,freq-domain = <&cpufreq_hw 0>;
106 power-domains = <&cpu_pd3>;
107 power-domain-names = "psci";
110 cpu-map {
130 domain-idle-states {
131 cluster_sleep: cluster-sleep-0 {
132 compatible = "domain-idle-state";
133 arm,psci-suspend-param = <0x41000043>;
134 entry-latency-us = <800>;
135 exit-latency-us = <2118>;
136 min-residency-us = <7376>;
140 idle-states {
141 entry-method = "psci";
143 cpu_sleep: cpu-sleep-0 {
144 compatible = "arm,idle-state";
145 idle-state-name = "power-collapse";
146 arm,psci-suspend-param = <0x40000003>;
147 entry-latency-us = <290>;
148 exit-latency-us = <376>;
149 min-residency-us = <1182>;
150 local-timer-stop;
157 compatible = "qcom,scm-qcm2290", "qcom,scm";
159 clock-names = "core";
160 qcom,dload-mode = <&tcsr_regs 0x13000>;
161 #reset-cells = <1>;
174 compatible = "arm,cortex-a53-pmu";
179 compatible = "arm,psci-1.0";
182 cpu_pd0: power-domain-cpu0 {
183 #power-domain-cells = <0>;
184 power-domains = <&cluster_pd>;
185 domain-idle-states = <&cpu_sleep>;
188 cpu_pd1: power-domain-cpu1 {
189 #power-domain-cells = <0>;
190 power-domains = <&cluster_pd>;
191 domain-idle-states = <&cpu_sleep>;
194 cpu_pd2: power-domain-cpu2 {
195 #power-domain-cells = <0>;
196 power-domains = <&cluster_pd>;
197 domain-idle-states = <&cpu_sleep>;
200 cpu_pd3: power-domain-cpu3 {
201 #power-domain-cells = <0>;
202 power-domains = <&cluster_pd>;
203 domain-idle-states = <&cpu_sleep>;
206 cluster_pd: power-domain-cpu-cluster {
207 #power-domain-cells = <0>;
208 power-domains = <&mpm>;
209 domain-idle-states = <&cluster_sleep>;
214 compatible = "qcom,qcm2290-rpm-proc", "qcom,rpm-proc";
216 glink-edge {
217 compatible = "qcom,glink-rpm";
219 qcom,rpm-msg-ram = <&rpm_msg_ram>;
222 rpm_requests: rpm-requests {
223 compatible = "qcom,rpm-qcm2290", "qcom,glink-smd-rpm";
224 qcom,glink-channels = "rpm_requests";
226 rpmcc: clock-controller {
227 compatible = "qcom,rpmcc-qcm2290", "qcom,rpmcc";
229 clock-names = "xo";
230 #clock-cells = <1>;
233 rpmpd: power-controller {
234 compatible = "qcom,qcm2290-rpmpd";
235 #power-domain-cells = <1>;
236 operating-points-v2 = <&rpmpd_opp_table>;
238 rpmpd_opp_table: opp-table {
239 compatible = "operating-points-v2";
242 opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
246 opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
250 opp-level = <RPM_SMD_LEVEL_SVS>;
254 opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
258 opp-level = <RPM_SMD_LEVEL_NOM>;
262 opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
266 opp-level = <RPM_SMD_LEVEL_TURBO>;
270 opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
277 mpm: interrupt-controller {
279 qcom,rpm-msg-ram = <&apss_mpm>;
282 interrupt-controller;
283 #interrupt-cells = <2>;
284 #power-domain-cells = <0>;
285 interrupt-parent = <&intc>;
286 qcom,mpm-pin-count = <96>;
287 qcom,mpm-pin-map = <2 275>, /* TSENS0 uplow */
296 reserved_memory: reserved-memory {
297 #address-cells = <2>;
298 #size-cells = <2>;
303 no-map;
306 xbl_aop_mem: xbl-aop@45e00000 {
308 no-map;
311 sec_apps_mem: sec-apps@45fff000 {
313 no-map;
319 no-map;
322 qcom,rpm-msg-ram = <&rpm_msg_ram>;
327 no-map;
332 no-map;
335 wlan_msa_mem: wlan-msa@51900000 {
337 no-map;
342 no-map;
345 pil_ipa_fw_mem: ipa-fw@53600000 {
347 no-map;
350 pil_ipa_gsi_mem: ipa-gsi@53610000 {
352 no-map;
356 compatible = "shared-dma-pool";
358 no-map;
363 no-map;
366 dfps_data_memory: dpfs-data@5cf00000 {
368 no-map;
373 no-map;
377 compatible = "qcom,rmtfs-mem";
379 no-map;
381 qcom,client-id = <1>;
386 smp2p-adsp {
394 qcom,local-pid = <0>;
395 qcom,remote-pid = <2>;
397 adsp_smp2p_out: master-kernel {
398 qcom,entry-name = "master-kernel";
399 #qcom,smem-state-cells = <1>;
402 adsp_smp2p_in: slave-kernel {
403 qcom,entry-name = "slave-kernel";
404 interrupt-controller;
405 #interrupt-cells = <2>;
409 smp2p-mpss {
417 qcom,local-pid = <0>;
418 qcom,remote-pid = <1>;
420 modem_smp2p_out: master-kernel {
421 qcom,entry-name = "master-kernel";
422 #qcom,smem-state-cells = <1>;
425 modem_smp2p_in: slave-kernel {
426 qcom,entry-name = "slave-kernel";
427 interrupt-controller;
428 #interrupt-cells = <2>;
431 wlan_smp2p_in: wlan-wpss-to-ap {
432 qcom,entry-name = "wlan";
433 interrupt-controller;
434 #interrupt-cells = <2>;
439 compatible = "simple-bus";
440 #address-cells = <2>;
441 #size-cells = <2>;
443 dma-ranges = <0 0 0 0 0x10 0>;
446 compatible = "qcom,tcsr-mutex";
448 #hwlock-cells = <1>;
452 compatible = "qcom,qcm2290-tcsr", "syscon";
457 compatible = "qcom,qcm2290-tlmm";
460 gpio-controller;
461 gpio-ranges = <&tlmm 0 0 127>;
462 wakeup-parent = <&mpm>;
463 #gpio-cells = <2>;
464 interrupt-controller;
465 #interrupt-cells = <2>;
467 qup_i2c0_default: qup-i2c0-default-state {
470 drive-strength = <2>;
471 bias-pull-up;
474 qup_i2c1_default: qup-i2c1-default-state {
477 drive-strength = <2>;
478 bias-pull-up;
481 qup_i2c2_default: qup-i2c2-default-state {
484 drive-strength = <2>;
485 bias-pull-up;
488 qup_i2c3_default: qup-i2c3-default-state {
491 drive-strength = <2>;
492 bias-pull-up;
495 qup_i2c4_default: qup-i2c4-default-state {
498 drive-strength = <2>;
499 bias-pull-up;
502 qup_i2c5_default: qup-i2c5-default-state {
505 drive-strength = <2>;
506 bias-pull-up;
509 qup_spi0_default: qup-spi0-default-state {
512 drive-strength = <2>;
513 bias-pull-up;
516 qup_spi1_default: qup-spi1-default-state {
519 drive-strength = <2>;
520 bias-pull-up;
523 qup_spi2_default: qup-spi2-default-state {
526 drive-strength = <2>;
527 bias-pull-up;
530 qup_spi3_default: qup-spi3-default-state {
533 drive-strength = <2>;
534 bias-pull-up;
537 qup_spi4_default: qup-spi4-default-state {
540 drive-strength = <2>;
541 bias-pull-up;
544 qup_spi5_default: qup-spi5-default-state {
547 drive-strength = <2>;
548 bias-pull-up;
551 qup_uart0_default: qup-uart0-default-state {
554 drive-strength = <2>;
555 bias-disable;
558 qup_uart1_default: qup-uart1-default-state {
561 drive-strength = <2>;
562 bias-disable;
565 qup_uart3_default: qup-uart3-default-state {
568 drive-strength = <2>;
569 bias-disable;
572 qup_uart4_default: qup-uart4-default-state {
575 drive-strength = <2>;
576 bias-disable;
579 qup_uart5_default: qup-uart5-default-state {
582 drive-strength = <2>;
583 bias-disable;
586 cci0_default: cci0-default-state {
589 drive-strength = <2>;
590 bias-disable;
593 cci1_default: cci1-default-state {
596 drive-strength = <2>;
597 bias-disable;
600 sdc1_state_on: sdc1-on-state {
601 clk-pins {
603 drive-strength = <16>;
604 bias-disable;
607 cmd-pins {
609 drive-strength = <10>;
610 bias-pull-up;
613 data-pins {
615 drive-strength = <10>;
616 bias-pull-up;
619 rclk-pins {
621 bias-pull-down;
625 sdc1_state_off: sdc1-off-state {
626 clk-pins {
628 drive-strength = <2>;
629 bias-disable;
632 cmd-pins {
634 drive-strength = <2>;
635 bias-pull-up;
638 data-pins {
640 drive-strength = <2>;
641 bias-pull-up;
644 rclk-pins {
646 bias-pull-down;
650 sdc2_state_on: sdc2-on-state {
651 clk-pins {
653 drive-strength = <16>;
654 bias-disable;
657 cmd-pins {
659 drive-strength = <10>;
660 bias-pull-up;
663 data-pins {
665 drive-strength = <10>;
666 bias-pull-up;
670 sdc2_state_off: sdc2-off-state {
671 clk-pins {
673 drive-strength = <2>;
674 bias-disable;
677 cmd-pins {
679 drive-strength = <2>;
680 bias-pull-up;
683 data-pins {
685 drive-strength = <2>;
686 bias-pull-up;
692 compatible = "qcom,qcm2290-lpass-lpi-pinctrl",
693 "qcom,sm6115-lpass-lpi-pinctrl";
698 clock-names = "audio";
700 gpio-controller;
701 #gpio-cells = <2>;
702 gpio-ranges = <&lpass_tlmm 0 0 19>;
704 lpi_i2s2_active: lpi-i2s2-active-state {
705 sck-pins {
708 bias-disable;
709 drive-strength = <8>;
712 ws-pins {
715 bias-disable;
716 drive-strength = <8>;
719 data-pins {
722 bias-disable;
723 drive-strength = <8>;
728 gcc: clock-controller@1400000 {
729 compatible = "qcom,gcc-qcm2290";
732 clock-names = "bi_tcxo", "sleep_clk";
733 #clock-cells = <1>;
734 #reset-cells = <1>;
735 #power-domain-cells = <1>;
739 compatible = "qcom,qcm2290-qusb2-phy";
744 clock-names = "cfg_ahb", "ref";
747 nvmem-cells = <&qusb2_hstx_trim>;
748 #phy-cells = <0>;
754 compatible = "qcom,qcm2290-qmp-usb3-phy";
761 clock-names = "cfg_ahb",
768 reset-names = "phy",
771 #clock-cells = <0>;
772 clock-output-names = "usb3_phy_pipe_clk_src";
774 #phy-cells = <0>;
775 orientation-switch;
777 qcom,tcsr-reg = <&tcsr_regs 0xb244>;
782 #address-cells = <1>;
783 #size-cells = <0>;
796 remote-endpoint = <&usb_dwc3_ss>;
803 compatible = "qcom,qcm2290-snoc";
805 #interconnect-cells = <2>;
807 qup_virt: interconnect-qup {
808 compatible = "qcom,qcm2290-qup-virt";
809 #interconnect-cells = <2>;
812 mmnrt_virt: interconnect-mmnrt {
813 compatible = "qcom,qcm2290-mmnrt-virt";
814 #interconnect-cells = <2>;
817 mmrt_virt: interconnect-mmrt {
818 compatible = "qcom,qcm2290-mmrt-virt";
819 #interconnect-cells = <2>;
824 compatible = "qcom,qcm2290-cnoc";
826 #interconnect-cells = <2>;
829 cryptobam: dma-controller@1b04000 {
830 compatible = "qcom,bam-v1.7.0";
834 clock-names = "bam_clk";
835 #dma-cells = <1>;
837 qcom,controlled-remotely;
843 compatible = "qcom,qcm2290-qce", "qcom,ipq4019-qce", "qcom,qce";
846 clock-names = "core";
848 dma-names = "rx", "tx";
854 compatible = "qcom,qcm2290-qfprom", "qcom,qfprom";
856 #address-cells = <1>;
857 #size-cells = <1>;
859 qusb2_hstx_trim: hstx-trim@25b {
864 gpu_speed_bin: gpu-speed-bin@2006 {
871 compatible = "qcom,qcm2290-cpu-bwmon", "qcom,sdm845-bwmon";
875 operating-points-v2 = <&cpu_bwmon_opp_table>;
879 cpu_bwmon_opp_table: opp-table {
880 compatible = "operating-points-v2";
882 opp-0 {
883 opp-peak-kBps = <(200 * 4 * 1000)>;
886 opp-1 {
887 opp-peak-kBps = <(300 * 4 * 1000)>;
890 opp-2 {
891 opp-peak-kBps = <(451 * 4 * 1000)>;
894 opp-3 {
895 opp-peak-kBps = <(547 * 4 * 1000)>;
898 opp-4 {
899 opp-peak-kBps = <(681 * 4 * 1000)>;
902 opp-5 {
903 opp-peak-kBps = <(768 * 4 * 1000)>;
906 opp-6 {
907 opp-peak-kBps = <(1017 * 4 * 1000)>;
910 opp-7 {
911 opp-peak-kBps = <(1353 * 4 * 1000)>;
914 opp-8 {
915 opp-peak-kBps = <(1555 * 4 * 1000)>;
918 opp-9 {
919 opp-peak-kBps = <(1804 * 4 * 1000)>;
925 compatible = "qcom,spmi-pmic-arb";
931 reg-names = "core",
936 interrupts-extended = <&mpm 86 IRQ_TYPE_LEVEL_HIGH>;
937 interrupt-names = "periph_irq";
940 #address-cells = <2>;
941 #size-cells = <0>;
942 interrupt-controller;
943 #interrupt-cells = <4>;
946 tsens0: thermal-sensor@4411000 {
947 compatible = "qcom,qcm2290-tsens", "qcom,tsens-v2";
951 interrupts-extended = <&mpm 2 IRQ_TYPE_LEVEL_HIGH>,
953 interrupt-names = "uplow", "critical";
954 #thermal-sensor-cells = <1>;
958 compatible = "qcom,prng-ee";
961 clock-names = "core";
965 compatible = "qcom,qcm2290-bimc";
967 #interconnect-cells = <2>;
971 compatible = "qcom,rpm-msg-ram", "mmio-sram";
973 #address-cells = <1>;
974 #size-cells = <1>;
983 compatible = "qcom,rpm-stats";
988 compatible = "qcom,qcm2290-sdhci", "qcom,sdhci-msm-v5";
992 reg-names = "hc",
998 interrupt-names = "hc_irq", "pwr_irq";
1004 clock-names = "iface",
1011 power-domains = <&rpmpd QCM2290_VDDCX>;
1012 operating-points-v2 = <&sdhc1_opp_table>;
1018 interconnect-names = "sdhc-ddr",
1019 "cpu-sdhc";
1021 qcom,dll-config = <0x000f642c>;
1022 qcom,ddr-config = <0x80040868>;
1023 bus-width = <8>;
1025 mmc-ddr-1_8v;
1026 mmc-hs200-1_8v;
1027 mmc-hs400-1_8v;
1028 mmc-hs400-enhanced-strobe;
1032 sdhc1_opp_table: opp-table {
1033 compatible = "operating-points-v2";
1035 opp-100000000 {
1036 opp-hz = /bits/ 64 <100000000>;
1037 required-opps = <&rpmpd_opp_low_svs>;
1038 opp-peak-kBps = <250000 133320>;
1039 opp-avg-kBps = <102400 65000>;
1042 opp-192000000 {
1043 opp-hz = /bits/ 64 <192000000>;
1044 required-opps = <&rpmpd_opp_low_svs>;
1045 opp-peak-kBps = <800000 300000>;
1046 opp-avg-kBps = <204800 200000>;
1049 opp-384000000 {
1050 opp-hz = /bits/ 64 <384000000>;
1051 required-opps = <&rpmpd_opp_svs_plus>;
1052 opp-peak-kBps = <800000 300000>;
1053 opp-avg-kBps = <204800 200000>;
1059 compatible = "qcom,qcm2290-sdhci", "qcom,sdhci-msm-v5";
1061 reg-names = "hc";
1065 interrupt-names = "hc_irq", "pwr_irq";
1070 clock-names = "iface",
1076 power-domains = <&rpmpd QCM2290_VDDCX>;
1077 operating-points-v2 = <&sdhc2_opp_table>;
1083 interconnect-names = "sdhc-ddr",
1084 "cpu-sdhc";
1086 qcom,dll-config = <0x0007642c>;
1087 qcom,ddr-config = <0x80040868>;
1088 bus-width = <4>;
1092 sdhc2_opp_table: opp-table {
1093 compatible = "operating-points-v2";
1095 opp-100000000 {
1096 opp-hz = /bits/ 64 <100000000>;
1097 required-opps = <&rpmpd_opp_low_svs>;
1098 opp-peak-kBps = <250000 133320>;
1099 opp-avg-kBps = <261438 150000>;
1102 opp-202000000 {
1103 opp-hz = /bits/ 64 <202000000>;
1104 required-opps = <&rpmpd_opp_svs_plus>;
1105 opp-peak-kBps = <800000 300000>;
1106 opp-avg-kBps = <261438 300000>;
1111 gpi_dma0: dma-controller@4a00000 {
1112 compatible = "qcom,qcm2290-gpi-dma", "qcom,sm6350-gpi-dma";
1124 dma-channels = <10>;
1125 dma-channel-mask = <0x1f>;
1127 #dma-cells = <3>;
1132 compatible = "qcom,geni-se-qup";
1136 clock-names = "m-ahb", "s-ahb";
1138 #address-cells = <2>;
1139 #size-cells = <2>;
1144 compatible = "qcom,geni-i2c";
1148 clock-names = "se";
1149 pinctrl-0 = <&qup_i2c0_default>;
1150 pinctrl-names = "default";
1153 dma-names = "tx", "rx";
1160 interconnect-names = "qup-core",
1161 "qup-config",
1162 "qup-memory";
1163 #address-cells = <1>;
1164 #size-cells = <0>;
1169 compatible = "qcom,geni-spi";
1173 clock-names = "se";
1174 pinctrl-0 = <&qup_spi0_default>;
1175 pinctrl-names = "default";
1178 dma-names = "tx", "rx";
1183 interconnect-names = "qup-core",
1184 "qup-config";
1185 #address-cells = <1>;
1186 #size-cells = <0>;
1191 compatible = "qcom,geni-uart";
1195 clock-names = "se";
1196 pinctrl-0 = <&qup_uart0_default>;
1197 pinctrl-names = "default";
1202 interconnect-names = "qup-core",
1203 "qup-config";
1208 compatible = "qcom,geni-i2c";
1212 clock-names = "se";
1213 pinctrl-0 = <&qup_i2c1_default>;
1214 pinctrl-names = "default";
1217 dma-names = "tx", "rx";
1224 interconnect-names = "qup-core",
1225 "qup-config",
1226 "qup-memory";
1227 #address-cells = <1>;
1228 #size-cells = <0>;
1233 compatible = "qcom,geni-spi";
1237 clock-names = "se";
1238 pinctrl-0 = <&qup_spi1_default>;
1239 pinctrl-names = "default";
1242 dma-names = "tx", "rx";
1247 interconnect-names = "qup-core",
1248 "qup-config";
1249 #address-cells = <1>;
1250 #size-cells = <0>;
1255 compatible = "qcom,geni-uart";
1259 clock-names = "se";
1260 pinctrl-0 = <&qup_uart1_default>;
1261 pinctrl-names = "default";
1266 interconnect-names = "qup-core",
1267 "qup-config";
1272 compatible = "qcom,geni-i2c";
1276 clock-names = "se";
1277 pinctrl-0 = <&qup_i2c2_default>;
1278 pinctrl-names = "default";
1281 dma-names = "tx", "rx";
1288 interconnect-names = "qup-core",
1289 "qup-config",
1290 "qup-memory";
1291 #address-cells = <1>;
1292 #size-cells = <0>;
1297 compatible = "qcom,geni-spi";
1301 clock-names = "se";
1302 pinctrl-0 = <&qup_spi2_default>;
1303 pinctrl-names = "default";
1306 dma-names = "tx", "rx";
1311 interconnect-names = "qup-core",
1312 "qup-config";
1313 #address-cells = <1>;
1314 #size-cells = <0>;
1319 compatible = "qcom,geni-i2c";
1323 clock-names = "se";
1324 pinctrl-0 = <&qup_i2c3_default>;
1325 pinctrl-names = "default";
1328 dma-names = "tx", "rx";
1335 interconnect-names = "qup-core",
1336 "qup-config",
1337 "qup-memory";
1338 #address-cells = <1>;
1339 #size-cells = <0>;
1344 compatible = "qcom,geni-spi";
1348 clock-names = "se";
1349 pinctrl-0 = <&qup_spi3_default>;
1350 pinctrl-names = "default";
1353 dma-names = "tx", "rx";
1358 interconnect-names = "qup-core",
1359 "qup-config";
1360 #address-cells = <1>;
1361 #size-cells = <0>;
1366 compatible = "qcom,geni-uart";
1370 clock-names = "se";
1371 pinctrl-0 = <&qup_uart3_default>;
1372 pinctrl-names = "default";
1377 interconnect-names = "qup-core",
1378 "qup-config";
1383 compatible = "qcom,geni-i2c";
1387 clock-names = "se";
1388 pinctrl-0 = <&qup_i2c4_default>;
1389 pinctrl-names = "default";
1392 dma-names = "tx", "rx";
1399 interconnect-names = "qup-core",
1400 "qup-config",
1401 "qup-memory";
1402 #address-cells = <1>;
1403 #size-cells = <0>;
1408 compatible = "qcom,geni-spi";
1411 clock-names = "se";
1413 pinctrl-names = "default";
1414 pinctrl-0 = <&qup_spi4_default>;
1417 dma-names = "tx", "rx";
1422 interconnect-names = "qup-core",
1423 "qup-config";
1424 #address-cells = <1>;
1425 #size-cells = <0>;
1430 compatible = "qcom,geni-uart";
1434 clock-names = "se";
1435 pinctrl-0 = <&qup_uart4_default>;
1436 pinctrl-names = "default";
1441 interconnect-names = "qup-core",
1442 "qup-config";
1447 compatible = "qcom,geni-i2c";
1451 clock-names = "se";
1452 pinctrl-0 = <&qup_i2c5_default>;
1453 pinctrl-names = "default";
1456 dma-names = "tx", "rx";
1463 interconnect-names = "qup-core",
1464 "qup-config",
1465 "qup-memory";
1466 #address-cells = <1>;
1467 #size-cells = <0>;
1472 compatible = "qcom,geni-spi";
1476 clock-names = "se";
1477 pinctrl-0 = <&qup_spi5_default>;
1478 pinctrl-names = "default";
1481 dma-names = "tx", "rx";
1486 interconnect-names = "qup-core",
1487 "qup-config";
1488 #address-cells = <1>;
1489 #size-cells = <0>;
1494 compatible = "qcom,geni-uart";
1498 clock-names = "se";
1499 pinctrl-0 = <&qup_uart5_default>;
1500 pinctrl-names = "default";
1505 interconnect-names = "qup-core",
1506 "qup-config";
1512 compatible = "qcom,qcm2290-dwc3", "qcom,dwc3";
1514 interrupts-extended = <&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1516 interrupt-names = "hs_phy_irq",
1525 clock-names = "cfg_noc",
1532 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
1534 assigned-clock-rates = <19200000>, <133333333>;
1537 power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
1538 /* TODO: USB<->IPA path */
1543 interconnect-names = "usb-ddr",
1544 "apps-usb";
1545 wakeup-source;
1547 #address-cells = <2>;
1548 #size-cells = <2>;
1558 phy-names = "usb2-phy", "usb3-phy";
1562 snps,has-lpm-erratum;
1563 snps,hird-threshold = /bits/ 8 <0x10>;
1565 snps,parkmode-disable-ss-quirk;
1566 maximum-speed = "super-speed";
1568 usb-role-switch;
1571 #address-cells = <1>;
1572 #size-cells = <0>;
1585 remote-endpoint = <&usb_qmpphy_usb_ss_in>;
1593 compatible = "qcom,adreno-07000200", "qcom,adreno";
1595 reg-names = "kgsl_3d0_reg_memory";
1605 clock-names = "core",
1614 interconnect-names = "gfx-mem";
1618 operating-points-v2 = <&gpu_opp_table>;
1619 power-domains = <&rpmpd QCM2290_VDDCX>;
1622 nvmem-cells = <&gpu_speed_bin>;
1623 nvmem-cell-names = "speed_bin";
1624 #cooling-cells = <2>;
1628 gpu_zap_shader: zap-shader {
1629 memory-region = <&pil_gpu_mem>;
1632 gpu_opp_table: opp-table {
1633 compatible = "operating-points-v2";
1636 opp-1123200000 {
1637 opp-hz = /bits/ 64 <1123200000>;
1638 required-opps = <&rpmpd_opp_turbo_plus>;
1639 opp-peak-kBps = <6881000>;
1640 opp-supported-hw = <0x3>;
1641 turbo-mode;
1644 opp-1017600000 {
1645 opp-hz = /bits/ 64 <1017600000>;
1646 required-opps = <&rpmpd_opp_turbo>;
1647 opp-peak-kBps = <6881000>;
1648 opp-supported-hw = <0x3>;
1649 turbo-mode;
1652 opp-921600000 {
1653 opp-hz = /bits/ 64 <921600000>;
1654 required-opps = <&rpmpd_opp_nom_plus>;
1655 opp-peak-kBps = <6881000>;
1656 opp-supported-hw = <0x3>;
1659 opp-844800000 {
1660 opp-hz = /bits/ 64 <844800000>;
1661 required-opps = <&rpmpd_opp_nom>;
1662 opp-peak-kBps = <6881000>;
1663 opp-supported-hw = <0x7>;
1666 opp-672000000 {
1667 opp-hz = /bits/ 64 <672000000>;
1668 required-opps = <&rpmpd_opp_svs_plus>;
1669 opp-peak-kBps = <3879000>;
1670 opp-supported-hw = <0xf>;
1673 opp-537600000 {
1674 opp-hz = /bits/ 64 <537600000>;
1675 required-opps = <&rpmpd_opp_svs>;
1676 opp-peak-kBps = <2929000>;
1677 opp-supported-hw = <0xf>;
1680 opp-355200000 {
1681 opp-hz = /bits/ 64 <355200000>;
1682 required-opps = <&rpmpd_opp_low_svs>;
1683 opp-peak-kBps = <1720000>;
1684 opp-supported-hw = <0xf>;
1690 compatible = "qcom,adreno-gmu-wrapper";
1692 reg-names = "gmu";
1693 power-domains = <&gpucc GPU_CX_GDSC>,
1695 power-domain-names = "cx",
1699 gpucc: clock-controller@5990000 {
1700 compatible = "qcom,qcm2290-gpucc";
1706 power-domains = <&rpmpd QCM2290_VDDCX>;
1707 required-opps = <&rpmpd_opp_low_svs>;
1708 #clock-cells = <1>;
1709 #reset-cells = <1>;
1710 #power-domain-cells = <1>;
1714 compatible = "qcom,qcm2290-smmu-500", "qcom,adreno-smmu",
1715 "qcom,smmu-500", "arm,mmu-500";
1730 clock-names = "mem",
1734 power-domains = <&gpucc GPU_CX_GDSC>;
1736 #global-interrupts = <1>;
1737 #iommu-cells = <2>;
1741 compatible = "qcom,qcm2290-cci", "qcom,msm8996-cci";
1747 clock-names = "ahb", "cci";
1748 assigned-clocks = <&gcc GCC_CAMSS_CCI_0_CLK>;
1749 assigned-clock-rates = <37500000>;
1751 power-domains = <&gcc GCC_CAMSS_TOP_GDSC>;
1753 pinctrl-0 = <&cci0_default &cci1_default>;
1754 pinctrl-names = "default";
1756 #address-cells = <1>;
1757 #size-cells = <0>;
1761 cci_i2c0: i2c-bus@0 {
1763 clock-frequency = <400000>;
1764 #address-cells = <1>;
1765 #size-cells = <0>;
1768 cci_i2c1: i2c-bus@1 {
1770 clock-frequency = <400000>;
1771 #address-cells = <1>;
1772 #size-cells = <0>;
1777 compatible = "qcom,qcm2290-camss";
1788 reg-names = "top",
1813 clock-names = "ahb",
1837 interrupt-names = "csid0",
1852 interconnect-names = "ahb",
1861 power-domains = <&gcc GCC_CAMSS_TOP_GDSC>;
1866 #address-cells = <1>;
1867 #size-cells = <0>;
1879 mdss: display-subsystem@5e00000 {
1880 compatible = "qcom,qcm2290-mdss";
1882 reg-names = "mdss";
1884 interrupt-controller;
1885 #interrupt-cells = <1>;
1890 clock-names = "iface",
1896 power-domains = <&dispcc MDSS_GDSC>;
1904 interconnect-names = "mdp0-mem",
1905 "cpu-cfg";
1907 #address-cells = <2>;
1908 #size-cells = <2>;
1913 mdp: display-controller@5e01000 {
1914 compatible = "qcom,qcm2290-dpu";
1917 reg-names = "mdp",
1920 interrupt-parent = <&mdss>;
1928 clock-names = "bus",
1934 operating-points-v2 = <&mdp_opp_table>;
1935 power-domains = <&rpmpd QCM2290_VDDCX>;
1938 #address-cells = <1>;
1939 #size-cells = <0>;
1944 remote-endpoint = <&mdss_dsi0_in>;
1949 mdp_opp_table: opp-table {
1950 compatible = "operating-points-v2";
1952 opp-19200000 {
1953 opp-hz = /bits/ 64 <19200000>;
1954 required-opps = <&rpmpd_opp_min_svs>;
1957 opp-192000000 {
1958 opp-hz = /bits/ 64 <192000000>;
1959 required-opps = <&rpmpd_opp_low_svs>;
1962 opp-256000000 {
1963 opp-hz = /bits/ 64 <256000000>;
1964 required-opps = <&rpmpd_opp_svs>;
1967 opp-307200000 {
1968 opp-hz = /bits/ 64 <307200000>;
1969 required-opps = <&rpmpd_opp_svs_plus>;
1972 opp-384000000 {
1973 opp-hz = /bits/ 64 <384000000>;
1974 required-opps = <&rpmpd_opp_nom>;
1980 compatible = "qcom,qcm2290-dsi-ctrl", "qcom,mdss-dsi-ctrl";
1982 reg-names = "dsi_ctrl";
1984 interrupt-parent = <&mdss>;
1993 clock-names = "byte",
2000 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
2002 assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
2005 operating-points-v2 = <&dsi_opp_table>;
2006 power-domains = <&rpmpd QCM2290_VDDCX>;
2009 #address-cells = <1>;
2010 #size-cells = <0>;
2014 dsi_opp_table: opp-table {
2015 compatible = "operating-points-v2";
2017 opp-19200000 {
2018 opp-hz = /bits/ 64 <19200000>;
2019 required-opps = <&rpmpd_opp_min_svs>;
2022 opp-164000000 {
2023 opp-hz = /bits/ 64 <164000000>;
2024 required-opps = <&rpmpd_opp_low_svs>;
2027 opp-187500000 {
2028 opp-hz = /bits/ 64 <187500000>;
2029 required-opps = <&rpmpd_opp_svs>;
2034 #address-cells = <1>;
2035 #size-cells = <0>;
2041 remote-endpoint = <&dpu_intf1_out>;
2055 compatible = "qcom,dsi-phy-14nm-2290";
2059 reg-names = "dsi_phy",
2065 clock-names = "iface",
2068 power-domains = <&rpmpd QCM2290_VDDMX>;
2069 required-opps = <&rpmpd_opp_nom>;
2071 #clock-cells = <1>;
2072 #phy-cells = <0>;
2078 dispcc: clock-controller@5f00000 {
2079 compatible = "qcom,qcm2290-dispcc";
2087 clock-names = "bi_tcxo",
2093 #power-domain-cells = <1>;
2094 #clock-cells = <1>;
2095 #reset-cells = <1>;
2099 compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas";
2102 interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING>,
2108 interrupt-names = "wdog",
2112 "stop-ack",
2113 "shutdown-ack";
2116 clock-names = "xo";
2118 power-domains = <&rpmpd QCM2290_VDDCX>;
2120 memory-region = <&pil_modem_mem>;
2122 qcom,smem-states = <&modem_smp2p_out 0>;
2123 qcom,smem-state-names = "stop";
2127 glink-edge {
2130 qcom,remote-pid = <1>;
2136 compatible = "qcom,qcm2290-adsp-pas", "qcom,sm6115-adsp-pas";
2139 interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
2144 interrupt-names = "wdog",
2148 "stop-ack";
2151 clock-names = "xo";
2153 power-domains = <&rpmpd QCM2290_VDD_LPI_CX>,
2156 memory-region = <&pil_adsp_mem>;
2158 qcom,smem-states = <&adsp_smp2p_out 0>;
2159 qcom,smem-state-names = "stop";
2163 glink-edge {
2166 qcom,remote-pid = <2>;
2170 compatible = "qcom,apr-v2";
2171 qcom,glink-channels = "apr_audio_svc";
2173 #address-cells = <1>;
2174 #size-cells = <0>;
2179 qcom,protection-domain = "avs/audio",
2186 qcom,protection-domain = "avs/audio",
2189 compatible = "qcom,q6afe-dais";
2190 #address-cells = <1>;
2191 #size-cells = <0>;
2192 #sound-dai-cells = <1>;
2195 q6afecc: clock-controller {
2196 compatible = "qcom,q6afe-clocks";
2197 #clock-cells = <2>;
2204 qcom,protection-domain = "avs/audio",
2207 compatible = "qcom,q6asm-dais";
2208 #address-cells = <1>;
2209 #size-cells = <0>;
2210 #sound-dai-cells = <1>;
2230 qcom,protection-domain = "avs/audio",
2233 compatible = "qcom,q6adm-routing";
2234 #sound-dai-cells = <0>;
2242 compatible = "qcom,qcm2290-smmu-500", "qcom,smmu-500", "arm,mmu-500";
2244 #iommu-cells = <2>;
2245 #global-interrupts = <1>;
2314 venus: video-codec@5a00000 {
2315 compatible = "qcom,qcm2290-venus";
2319 power-domains = <&gcc GCC_VENUS_GDSC>,
2322 power-domain-names = "venus",
2325 operating-points-v2 = <&venus_opp_table>;
2333 clock-names = "core",
2340 memory-region = <&pil_video_mem>;
2351 interconnect-names = "video-mem",
2352 "cpu-cfg";
2354 venus_opp_table: opp-table {
2355 compatible = "operating-points-v2";
2357 opp-133333333 {
2358 opp-hz = /bits/ 64 <133333333>;
2359 required-opps = <&rpmpd_opp_low_svs>;
2362 opp-240000000 {
2363 opp-hz = /bits/ 64 <240000000>;
2364 required-opps = <&rpmpd_opp_svs>;
2370 compatible = "qcom,wcn3990-wifi";
2372 reg-names = "membase";
2373 memory-region = <&wlan_msa_mem>;
2387 qcom,msa-fixed-perm;
2392 compatible = "qcom,apss-wdt-qcm2290", "qcom,kpss-wdt";
2400 compatible = "qcom,qcm2290-apcs-hmss-global";
2402 #mbox-cells = <1>;
2406 compatible = "arm,armv7-timer-mem";
2408 #address-cells = <1>;
2409 #size-cells = <1>;
2417 frame-number = <0>;
2423 frame-number = <1>;
2430 frame-number = <2>;
2437 frame-number = <3>;
2444 frame-number = <4>;
2451 frame-number = <5>;
2458 frame-number = <6>;
2463 intc: interrupt-controller@f200000 {
2464 compatible = "arm,gic-v3";
2468 #interrupt-cells = <3>;
2469 interrupt-controller;
2470 interrupt-parent = <&intc>;
2471 #redistributor-regions = <1>;
2472 redistributor-stride = <0x0 0x20000>;
2476 compatible = "qcom,qcm2290-cpufreq-hw", "qcom,cpufreq-hw";
2478 reg-names = "freq-domain0";
2479 interrupts-extended = <&lmh_cluster 0>;
2480 interrupt-names = "dcvsh-irq-0";
2482 clock-names = "xo", "alternate";
2484 #freq-domain-cells = <1>;
2485 #clock-cells = <1>;
2489 compatible = "qcom,qcm2290-lmh", "qcom,sm8150-lmh";
2493 qcom,lmh-temp-arm-millicelsius = <65000>;
2494 qcom,lmh-temp-low-millicelsius = <94500>;
2495 qcom,lmh-temp-high-millicelsius = <95000>;
2496 interrupt-controller;
2497 #interrupt-cells = <1>;
2501 thermal-zones {
2502 mapss-thermal {
2503 thermal-sensors = <&tsens0 0>;
2506 mapss_alert0: trip-point0 {
2512 mapss_alert1: trip-point1 {
2518 mapss_crit: mapss-crit {
2526 video-thermal {
2527 thermal-sensors = <&tsens0 1>;
2530 video_alert0: trip-point0 {
2536 video_alert1: trip-point1 {
2542 video_crit: video-crit {
2550 wlan-thermal {
2551 thermal-sensors = <&tsens0 2>;
2554 wlan_alert0: trip-point0 {
2560 wlan_alert1: trip-point1 {
2566 wlan_crit: wlan-crit {
2574 cpuss0-thermal {
2575 thermal-sensors = <&tsens0 3>;
2578 cpuss0_alert0: trip-point0 {
2584 cpuss0_alert1: trip-point1 {
2590 cpuss0_crit: cpuss0-crit {
2598 cpuss1-thermal {
2599 thermal-sensors = <&tsens0 4>;
2602 cpuss1_alert0: trip-point0 {
2608 cpuss1_alert1: trip-point1 {
2614 cpuss1_crit: cpuss1-crit {
2622 mdm0-thermal {
2623 thermal-sensors = <&tsens0 5>;
2626 mdm0_alert0: trip-point0 {
2632 mdm0_alert1: trip-point1 {
2638 mdm0_crit: mdm0-crit {
2646 mdm1-thermal {
2647 thermal-sensors = <&tsens0 6>;
2650 mdm1_alert0: trip-point0 {
2656 mdm1_alert1: trip-point1 {
2662 mdm1_crit: mdm1-crit {
2670 gpu-thermal {
2671 thermal-sensors = <&tsens0 7>;
2674 gpu_alert0: trip-point0 {
2680 gpu_alert1: trip-point1 {
2686 gpu_crit: gpu-crit {
2694 hm-center-thermal {
2695 thermal-sensors = <&tsens0 8>;
2698 hm_center_alert0: trip-point0 {
2704 hm_center_alert1: trip-point1 {
2710 hm_center_crit: hm-center-crit {
2718 camera-thermal {
2719 thermal-sensors = <&tsens0 9>;
2722 camera_alert0: trip-point0 {
2728 camera_alert1: trip-point1 {
2734 camera_crit: camera-crit {
2744 compatible = "arm,armv8-timer";