Lines Matching +full:tegra264 +full:- +full:utc
1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 #include <dt-bindings/clock/nvidia,tegra264.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/nvidia,tegra264.h>
7 #include <dt-bindings/power/nvidia,tegra264-bpmp.h>
8 #include <dt-bindings/reset/nvidia,tegra264.h>
11 compatible = "nvidia,tegra264";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
22 compatible = "nvidia,tegra264-bpmp-shmem";
24 no-map;
30 compatible = "simple-bus";
32 #address-cells = <2>;
33 #size-cells = <2>;
38 compatible = "nvidia,tegra234-misc";
44 compatible = "nvidia,tegra234-timer";
54 compatible = "nvidia,tegra264-aconnect",
55 "nvidia,tegra210-aconnect";
58 clock-names = "ape", "apb2ape";
59 power-domains = <&bpmp TEGRA264_POWER_DOMAIN_AUD>;
62 #address-cells = <2>;
63 #size-cells = <2>;
66 adma: dma-controller@9440000 {
67 compatible = "nvidia,tegra264-adma";
69 interrupt-parent = <&agic_page0>;
134 #dma-cells = <1>;
136 clock-names = "d_audio";
141 compatible = "nvidia,tegra264-ahub";
144 clock-names = "ahub";
145 assigned-clocks = <&bpmp TEGRA264_CLK_AHUB>;
146 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLAON_APE>;
149 #address-cells = <2>;
150 #size-cells = <2>;
156 compatible = "nvidia,tegra264-i2s";
160 clock-names = "i2s", "sync_input";
161 assigned-clocks = <&bpmp TEGRA264_CLK_I2S1>;
162 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
163 assigned-clock-rates = <1536000>;
164 sound-name-prefix = "I2S1";
168 #address-cells = <1>;
169 #size-cells = <0>;
175 remote-endpoint = <&xbar_i2s1>;
183 dai-format = "i2s";
191 compatible = "nvidia,tegra264-i2s";
195 clock-names = "i2s", "sync_input";
196 assigned-clocks = <&bpmp TEGRA264_CLK_I2S2>;
197 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
198 assigned-clock-rates = <1536000>;
199 sound-name-prefix = "I2S2";
203 #address-cells = <1>;
204 #size-cells = <0>;
210 remote-endpoint = <&xbar_i2s2>;
218 dai-format = "i2s";
226 compatible = "nvidia,tegra264-i2s";
230 clock-names = "i2s", "sync_input";
231 assigned-clocks = <&bpmp TEGRA264_CLK_I2S3>;
232 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
233 assigned-clock-rates = <1536000>;
234 sound-name-prefix = "I2S3";
238 #address-cells = <1>;
239 #size-cells = <0>;
245 remote-endpoint = <&xbar_i2s3>;
253 dai-format = "i2s";
261 compatible = "nvidia,tegra264-i2s";
265 clock-names = "i2s", "sync_input";
266 assigned-clocks = <&bpmp TEGRA264_CLK_I2S4>;
267 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
268 assigned-clock-rates = <1536000>;
269 sound-name-prefix = "I2S4";
273 #address-cells = <1>;
274 #size-cells = <0>;
280 remote-endpoint = <&xbar_i2s4>;
288 dai-format = "i2s";
296 compatible = "nvidia,tegra264-i2s";
300 clock-names = "i2s", "sync_input";
301 assigned-clocks = <&bpmp TEGRA264_CLK_I2S5>;
302 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
303 assigned-clock-rates = <1536000>;
304 sound-name-prefix = "I2S5";
308 #address-cells = <1>;
309 #size-cells = <0>;
315 remote-endpoint = <&xbar_i2s5>;
323 dai-format = "i2s";
331 compatible = "nvidia,tegra264-i2s";
335 clock-names = "i2s", "sync_input";
336 assigned-clocks = <&bpmp TEGRA264_CLK_I2S6>;
337 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
338 assigned-clock-rates = <1536000>;
339 sound-name-prefix = "I2S6";
343 #address-cells = <1>;
344 #size-cells = <0>;
350 remote-endpoint = <&xbar_i2s6>;
358 dai-format = "i2s";
366 compatible = "nvidia,tegra264-i2s";
370 clock-names = "i2s", "sync_input";
371 assigned-clocks = <&bpmp TEGRA264_CLK_I2S7>;
372 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
373 assigned-clock-rates = <1536000>;
374 sound-name-prefix = "I2S7";
378 #address-cells = <1>;
379 #size-cells = <0>;
385 remote-endpoint = <&xbar_i2s7>;
393 dai-format = "i2s";
401 compatible = "nvidia,tegra264-i2s";
405 clock-names = "i2s", "sync_input";
406 assigned-clocks = <&bpmp TEGRA264_CLK_I2S8>;
407 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
408 assigned-clock-rates = <1536000>;
409 sound-name-prefix = "I2S8";
413 #address-cells = <1>;
414 #size-cells = <0>;
420 remote-endpoint = <&xbar_i2s8>;
428 dai-format = "i2s";
436 compatible = "nvidia,tegra264-dmic",
437 "nvidia,tegra210-dmic";
440 clock-names = "dmic";
441 assigned-clocks = <&bpmp TEGRA264_CLK_DMIC1>;
442 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
443 assigned-clock-rates = <3072000>;
444 sound-name-prefix = "DMIC1";
448 #address-cells = <1>;
449 #size-cells = <0>;
455 remote-endpoint = <&xbar_dmic1>;
470 compatible = "nvidia,tegra264-dmic",
471 "nvidia,tegra210-dmic";
474 clock-names = "dmic";
475 assigned-clocks = <&bpmp TEGRA264_CLK_DMIC1>;
476 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
477 assigned-clock-rates = <3072000>;
478 sound-name-prefix = "DMIC2";
482 #address-cells = <1>;
483 #size-cells = <0>;
489 remote-endpoint = <&xbar_dmic2>;
504 compatible = "nvidia,tegra264-dspk",
505 "nvidia,tegra186-dspk";
508 clock-names = "dspk";
509 assigned-clocks = <&bpmp TEGRA264_CLK_DSPK1>;
510 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
511 assigned-clock-rates = <12288000>;
512 sound-name-prefix = "DSPK1";
516 #address-cells = <1>;
517 #size-cells = <0>;
523 remote-endpoint = <&xbar_dspk1>;
538 compatible = "nvidia,tegra264-amx";
540 sound-name-prefix = "AMX1";
543 #address-cells = <1>;
544 #size-cells = <0>;
550 remote-endpoint = <&xbar_amx1_in1>;
558 remote-endpoint = <&xbar_amx1_in2>;
566 remote-endpoint = <&xbar_amx1_in3>;
574 remote-endpoint = <&xbar_amx1_in4>;
582 remote-endpoint = <&xbar_amx1_out>;
589 compatible = "nvidia,tegra264-amx";
591 sound-name-prefix = "AMX2";
594 #address-cells = <1>;
595 #size-cells = <0>;
601 remote-endpoint = <&xbar_amx2_in1>;
609 remote-endpoint = <&xbar_amx2_in2>;
617 remote-endpoint = <&xbar_amx2_in3>;
625 remote-endpoint = <&xbar_amx2_in4>;
633 remote-endpoint = <&xbar_amx2_out>;
640 compatible = "nvidia,tegra264-amx";
642 sound-name-prefix = "AMX3";
645 #address-cells = <1>;
646 #size-cells = <0>;
652 remote-endpoint = <&xbar_amx3_in1>;
660 remote-endpoint = <&xbar_amx3_in2>;
668 remote-endpoint = <&xbar_amx3_in3>;
676 remote-endpoint = <&xbar_amx3_in4>;
684 remote-endpoint = <&xbar_amx3_out>;
691 compatible = "nvidia,tegra264-amx";
693 sound-name-prefix = "AMX4";
696 #address-cells = <1>;
697 #size-cells = <0>;
703 remote-endpoint = <&xbar_amx4_in1>;
711 remote-endpoint = <&xbar_amx4_in2>;
719 remote-endpoint = <&xbar_amx4_in3>;
727 remote-endpoint = <&xbar_amx4_in4>;
735 remote-endpoint = <&xbar_amx4_out>;
742 compatible = "nvidia,tegra264-amx";
744 sound-name-prefix = "AMX5";
747 #address-cells = <1>;
748 #size-cells = <0>;
754 remote-endpoint = <&xbar_amx5_in1>;
762 remote-endpoint = <&xbar_amx5_in2>;
770 remote-endpoint = <&xbar_amx5_in3>;
778 remote-endpoint = <&xbar_amx5_in4>;
786 remote-endpoint = <&xbar_amx5_out>;
793 compatible = "nvidia,tegra264-amx";
795 sound-name-prefix = "AMX6";
798 #address-cells = <1>;
799 #size-cells = <0>;
805 remote-endpoint = <&xbar_amx6_in1>;
813 remote-endpoint = <&xbar_amx6_in2>;
821 remote-endpoint = <&xbar_amx6_in3>;
829 remote-endpoint = <&xbar_amx6_in4>;
837 remote-endpoint = <&xbar_amx6_out>;
844 compatible = "nvidia,tegra264-adx";
846 sound-name-prefix = "ADX1";
849 #address-cells = <1>;
850 #size-cells = <0>;
856 remote-endpoint = <&xbar_adx1_in>;
864 remote-endpoint = <&xbar_adx1_out1>;
872 remote-endpoint = <&xbar_adx1_out2>;
880 remote-endpoint = <&xbar_adx1_out3>;
888 remote-endpoint = <&xbar_adx1_out4>;
895 compatible = "nvidia,tegra264-adx";
897 sound-name-prefix = "ADX2";
900 #address-cells = <1>;
901 #size-cells = <0>;
907 remote-endpoint = <&xbar_adx2_in>;
915 remote-endpoint = <&xbar_adx2_out1>;
923 remote-endpoint = <&xbar_adx2_out2>;
931 remote-endpoint = <&xbar_adx2_out3>;
939 remote-endpoint = <&xbar_adx2_out4>;
946 compatible = "nvidia,tegra264-adx";
948 sound-name-prefix = "ADX3";
951 #address-cells = <1>;
952 #size-cells = <0>;
958 remote-endpoint = <&xbar_adx3_in>;
966 remote-endpoint = <&xbar_adx3_out1>;
974 remote-endpoint = <&xbar_adx3_out2>;
982 remote-endpoint = <&xbar_adx3_out3>;
990 remote-endpoint = <&xbar_adx3_out4>;
997 compatible = "nvidia,tegra264-adx";
999 sound-name-prefix = "ADX4";
1002 #address-cells = <1>;
1003 #size-cells = <0>;
1009 remote-endpoint = <&xbar_adx4_in>;
1017 remote-endpoint = <&xbar_adx4_out1>;
1025 remote-endpoint = <&xbar_adx4_out2>;
1033 remote-endpoint = <&xbar_adx4_out3>;
1041 remote-endpoint = <&xbar_adx4_out4>;
1048 compatible = "nvidia,tegra264-adx";
1050 sound-name-prefix = "ADX5";
1053 #address-cells = <1>;
1054 #size-cells = <0>;
1060 remote-endpoint = <&xbar_adx5_in>;
1068 remote-endpoint = <&xbar_adx5_out1>;
1076 remote-endpoint = <&xbar_adx5_out2>;
1084 remote-endpoint = <&xbar_adx5_out3>;
1092 remote-endpoint = <&xbar_adx5_out4>;
1099 compatible = "nvidia,tegra264-adx";
1101 sound-name-prefix = "ADX6";
1104 #address-cells = <1>;
1105 #size-cells = <0>;
1111 remote-endpoint = <&xbar_adx6_in>;
1119 remote-endpoint = <&xbar_adx6_out1>;
1127 remote-endpoint = <&xbar_adx6_out2>;
1135 remote-endpoint = <&xbar_adx6_out3>;
1143 remote-endpoint = <&xbar_adx6_out4>;
1150 compatible = "nvidia,tegra264-admaif";
1184 dma-names = "rx1", "tx1",
1220 interconnect-names = "dma-mem", "write";
1225 #address-cells = <1>;
1226 #size-cells = <0>;
1232 remote-endpoint = <&xbar_admaif0>;
1240 remote-endpoint = <&xbar_admaif1>;
1248 remote-endpoint = <&xbar_admaif2>;
1256 remote-endpoint = <&xbar_admaif3>;
1264 remote-endpoint = <&xbar_admaif4>;
1272 remote-endpoint = <&xbar_admaif5>;
1280 remote-endpoint = <&xbar_admaif6>;
1288 remote-endpoint = <&xbar_admaif7>;
1296 remote-endpoint = <&xbar_admaif8>;
1304 remote-endpoint = <&xbar_admaif9>;
1312 remote-endpoint = <&xbar_admaif10>;
1320 remote-endpoint = <&xbar_admaif11>;
1328 remote-endpoint = <&xbar_admaif12>;
1336 remote-endpoint = <&xbar_admaif13>;
1344 remote-endpoint = <&xbar_admaif14>;
1352 remote-endpoint = <&xbar_admaif15>;
1360 remote-endpoint = <&xbar_admaif16>;
1368 remote-endpoint = <&xbar_admaif17>;
1376 remote-endpoint = <&xbar_admaif18>;
1384 remote-endpoint = <&xbar_admaif19>;
1392 remote-endpoint = <&xbar_admaif20>;
1400 remote-endpoint = <&xbar_admaif21>;
1408 remote-endpoint = <&xbar_admaif22>;
1416 remote-endpoint = <&xbar_admaif23>;
1424 remote-endpoint = <&xbar_admaif24>;
1432 remote-endpoint = <&xbar_admaif25>;
1440 remote-endpoint = <&xbar_admaif26>;
1448 remote-endpoint = <&xbar_admaif27>;
1456 remote-endpoint = <&xbar_admaif28>;
1464 remote-endpoint = <&xbar_admaif29>;
1472 remote-endpoint = <&xbar_admaif30>;
1480 remote-endpoint = <&xbar_admaif31>;
1487 compatible = "nvidia,tegra264-sfc",
1488 "nvidia,tegra210-sfc";
1490 sound-name-prefix = "SFC1";
1493 #address-cells = <1>;
1494 #size-cells = <0>;
1500 remote-endpoint = <&xbar_sfc1_in>;
1508 remote-endpoint = <&xbar_sfc1_out>;
1515 compatible = "nvidia,tegra264-sfc",
1516 "nvidia,tegra210-sfc";
1518 sound-name-prefix = "SFC2";
1521 #address-cells = <1>;
1522 #size-cells = <0>;
1528 remote-endpoint = <&xbar_sfc2_in>;
1536 remote-endpoint = <&xbar_sfc2_out>;
1543 compatible = "nvidia,tegra264-sfc",
1544 "nvidia,tegra210-sfc";
1546 sound-name-prefix = "SFC3";
1549 #address-cells = <1>;
1550 #size-cells = <0>;
1556 remote-endpoint = <&xbar_sfc3_in>;
1564 remote-endpoint = <&xbar_sfc3_out>;
1571 compatible = "nvidia,tegra264-sfc",
1572 "nvidia,tegra210-sfc";
1574 sound-name-prefix = "SFC4";
1577 #address-cells = <1>;
1578 #size-cells = <0>;
1584 remote-endpoint = <&xbar_sfc4_in>;
1592 remote-endpoint = <&xbar_sfc4_out>;
1598 tegra_ope1: processing-engine@9780000 {
1599 compatible = "nvidia,tegra264-ope",
1600 "nvidia,tegra210-ope";
1602 #address-cells = <2>;
1603 #size-cells = <2>;
1605 sound-name-prefix = "OPE1";
1608 compatible = "nvidia,tegra264-peq",
1609 "nvidia,tegra210-peq";
1613 dynamic-range-compressor@97a0000 {
1614 compatible = "nvidia,tegra264-mbdrc",
1615 "nvidia,tegra210-mbdrc";
1620 #address-cells = <1>;
1621 #size-cells = <0>;
1627 remote-endpoint =
1636 remote-endpoint =
1644 compatible = "nvidia,tegra264-mvc",
1645 "nvidia,tegra210-mvc";
1647 sound-name-prefix = "MVC1";
1650 #address-cells = <1>;
1651 #size-cells = <0>;
1657 remote-endpoint = <&xbar_mvc1_in>;
1665 remote-endpoint = <&xbar_mvc1_out>;
1672 compatible = "nvidia,tegra264-mvc",
1673 "nvidia,tegra210-mvc";
1675 sound-name-prefix = "MVC2";
1678 #address-cells = <1>;
1679 #size-cells = <0>;
1685 remote-endpoint = <&xbar_mvc2_in>;
1693 remote-endpoint = <&xbar_mvc2_out>;
1700 compatible = "nvidia,tegra264-amixer",
1701 "nvidia,tegra210-amixer";
1703 sound-name-prefix = "MIXER1";
1706 #address-cells = <1>;
1707 #size-cells = <0>;
1713 remote-endpoint = <&xbar_mix_in1>;
1721 remote-endpoint = <&xbar_mix_in2>;
1729 remote-endpoint = <&xbar_mix_in3>;
1737 remote-endpoint = <&xbar_mix_in4>;
1745 remote-endpoint = <&xbar_mix_in5>;
1753 remote-endpoint = <&xbar_mix_in6>;
1761 remote-endpoint = <&xbar_mix_in7>;
1769 remote-endpoint = <&xbar_mix_in8>;
1777 remote-endpoint = <&xbar_mix_in9>;
1785 remote-endpoint = <&xbar_mix_in10>;
1793 remote-endpoint = <&xbar_mix_out1>;
1801 remote-endpoint = <&xbar_mix_out2>;
1809 remote-endpoint = <&xbar_mix_out3>;
1817 remote-endpoint = <&xbar_mix_out4>;
1825 remote-endpoint = <&xbar_mix_out5>;
1832 compatible = "nvidia,tegra264-asrc";
1834 sound-name-prefix = "ASRC1";
1837 #address-cells = <1>;
1838 #size-cells = <0>;
1844 remote-endpoint =
1853 remote-endpoint =
1862 remote-endpoint =
1871 remote-endpoint =
1880 remote-endpoint =
1889 remote-endpoint =
1898 remote-endpoint =
1907 remote-endpoint =
1916 remote-endpoint =
1925 remote-endpoint =
1934 remote-endpoint =
1943 remote-endpoint =
1952 remote-endpoint =
1960 #address-cells = <1>;
1961 #size-cells = <0>;
1967 remote-endpoint = <&admaif0>;
1975 remote-endpoint = <&admaif1>;
1983 remote-endpoint = <&admaif2>;
1991 remote-endpoint = <&admaif3>;
1999 remote-endpoint = <&admaif4>;
2007 remote-endpoint = <&admaif5>;
2015 remote-endpoint = <&admaif6>;
2023 remote-endpoint = <&admaif7>;
2031 remote-endpoint = <&admaif8>;
2039 remote-endpoint = <&admaif9>;
2047 remote-endpoint = <&admaif10>;
2055 remote-endpoint = <&admaif11>;
2063 remote-endpoint = <&admaif12>;
2071 remote-endpoint = <&admaif13>;
2079 remote-endpoint = <&admaif14>;
2087 remote-endpoint = <&admaif15>;
2095 remote-endpoint = <&admaif16>;
2103 remote-endpoint = <&admaif17>;
2111 remote-endpoint = <&admaif18>;
2119 remote-endpoint = <&admaif19>;
2127 remote-endpoint = <&admaif20>;
2135 remote-endpoint = <&admaif21>;
2143 remote-endpoint = <&admaif22>;
2151 remote-endpoint = <&admaif23>;
2159 remote-endpoint = <&admaif24>;
2167 remote-endpoint = <&admaif25>;
2175 remote-endpoint = <&admaif26>;
2183 remote-endpoint = <&admaif27>;
2191 remote-endpoint = <&admaif28>;
2199 remote-endpoint = <&admaif29>;
2207 remote-endpoint = <&admaif30>;
2215 remote-endpoint = <&admaif31>;
2223 remote-endpoint = <&i2s1_cif>;
2231 remote-endpoint = <&i2s2_cif>;
2239 remote-endpoint = <&i2s3_cif>;
2247 remote-endpoint = <&i2s4_cif>;
2255 remote-endpoint = <&i2s5_cif>;
2263 remote-endpoint = <&i2s6_cif>;
2271 remote-endpoint = <&i2s7_cif>;
2279 remote-endpoint = <&i2s8_cif>;
2287 remote-endpoint = <&dmic1_cif>;
2295 remote-endpoint = <&dmic2_cif>;
2303 remote-endpoint = <&dspk1_cif>;
2311 remote-endpoint = <&sfc1_cif_in>;
2319 remote-endpoint = <&sfc1_cif_out>;
2327 remote-endpoint = <&sfc2_cif_in>;
2335 remote-endpoint = <&sfc2_cif_out>;
2343 remote-endpoint = <&sfc3_cif_in>;
2351 remote-endpoint = <&sfc3_cif_out>;
2359 remote-endpoint = <&sfc4_cif_in>;
2367 remote-endpoint = <&sfc4_cif_out>;
2375 remote-endpoint = <&mvc1_cif_in>;
2383 remote-endpoint = <&mvc1_cif_out>;
2391 remote-endpoint = <&mvc2_cif_in>;
2399 remote-endpoint = <&mvc2_cif_out>;
2407 remote-endpoint = <&amx1_in1>;
2415 remote-endpoint = <&amx1_in2>;
2423 remote-endpoint = <&amx1_in3>;
2431 remote-endpoint = <&amx1_in4>;
2439 remote-endpoint = <&amx1_out>;
2447 remote-endpoint = <&amx2_in1>;
2455 remote-endpoint = <&amx2_in2>;
2463 remote-endpoint = <&amx2_in3>;
2471 remote-endpoint = <&amx2_in4>;
2479 remote-endpoint = <&amx2_out>;
2487 remote-endpoint = <&amx3_in1>;
2495 remote-endpoint = <&amx3_in2>;
2503 remote-endpoint = <&amx3_in3>;
2511 remote-endpoint = <&amx3_in4>;
2519 remote-endpoint = <&amx3_out>;
2527 remote-endpoint = <&amx4_in1>;
2535 remote-endpoint = <&amx4_in2>;
2543 remote-endpoint = <&amx4_in3>;
2551 remote-endpoint = <&amx4_in4>;
2559 remote-endpoint = <&amx4_out>;
2567 remote-endpoint = <&amx5_in1>;
2575 remote-endpoint = <&amx5_in2>;
2583 remote-endpoint = <&amx5_in3>;
2591 remote-endpoint = <&amx5_in4>;
2599 remote-endpoint = <&amx5_out>;
2607 remote-endpoint = <&amx6_in1>;
2615 remote-endpoint = <&amx6_in2>;
2623 remote-endpoint = <&amx6_in3>;
2631 remote-endpoint = <&amx6_in4>;
2639 remote-endpoint = <&amx6_out>;
2647 remote-endpoint = <&adx1_in>;
2655 remote-endpoint = <&adx1_out1>;
2663 remote-endpoint = <&adx1_out2>;
2671 remote-endpoint = <&adx1_out3>;
2679 remote-endpoint = <&adx1_out4>;
2687 remote-endpoint = <&adx2_in>;
2695 remote-endpoint = <&adx2_out1>;
2703 remote-endpoint = <&adx2_out2>;
2711 remote-endpoint = <&adx2_out3>;
2719 remote-endpoint = <&adx2_out4>;
2727 remote-endpoint = <&adx3_in>;
2735 remote-endpoint = <&adx3_out1>;
2743 remote-endpoint = <&adx3_out2>;
2751 remote-endpoint = <&adx3_out3>;
2759 remote-endpoint = <&adx3_out4>;
2767 remote-endpoint = <&adx4_in>;
2775 remote-endpoint = <&adx4_out1>;
2783 remote-endpoint = <&adx4_out2>;
2791 remote-endpoint = <&adx4_out3>;
2799 remote-endpoint = <&adx4_out4>;
2807 remote-endpoint = <&adx5_in>;
2815 remote-endpoint = <&adx5_out1>;
2823 remote-endpoint = <&adx5_out2>;
2831 remote-endpoint = <&adx5_out3>;
2839 remote-endpoint = <&adx5_out4>;
2847 remote-endpoint = <&adx6_in>;
2855 remote-endpoint = <&adx6_out1>;
2863 remote-endpoint = <&adx6_out2>;
2871 remote-endpoint = <&adx6_out3>;
2879 remote-endpoint = <&adx6_out4>;
2887 remote-endpoint = <&mix_in1>;
2895 remote-endpoint = <&mix_in2>;
2903 remote-endpoint = <&mix_in3>;
2911 remote-endpoint = <&mix_in4>;
2919 remote-endpoint = <&mix_in5>;
2927 remote-endpoint = <&mix_in6>;
2935 remote-endpoint = <&mix_in7>;
2943 remote-endpoint = <&mix_in8>;
2951 remote-endpoint = <&mix_in9>;
2959 remote-endpoint = <&mix_in10>;
2967 remote-endpoint = <&mix_out1>;
2975 remote-endpoint = <&mix_out2>;
2983 remote-endpoint = <&mix_out3>;
2991 remote-endpoint = <&mix_out4>;
2999 remote-endpoint = <&mix_out5>;
3007 remote-endpoint = <&asrc_in1_ep>;
3015 remote-endpoint = <&asrc_out1_ep>;
3023 remote-endpoint = <&asrc_in2_ep>;
3031 remote-endpoint = <&asrc_out2_ep>;
3039 remote-endpoint = <&asrc_in3_ep>;
3047 remote-endpoint = <&asrc_out3_ep>;
3055 remote-endpoint = <&asrc_in4_ep>;
3063 remote-endpoint = <&asrc_out4_ep>;
3071 remote-endpoint = <&asrc_in5_ep>;
3079 remote-endpoint = <&asrc_out5_ep>;
3087 remote-endpoint = <&asrc_in6_ep>;
3095 remote-endpoint = <&asrc_out6_ep>;
3103 remote-endpoint = <&asrc_in7_ep>;
3111 remote-endpoint = <&ope1_cif_in_ep>;
3119 remote-endpoint = <&ope1_cif_out_ep>;
3125 agic_page0: interrupt-controller@9960000 {
3126 compatible = "nvidia,tegra264-agic",
3127 "nvidia,tegra210-agic";
3128 #interrupt-cells = <3>;
3129 interrupt-controller;
3135 clock-names = "clk";
3139 agic_page1: interrupt-controller@9970000 {
3140 compatible = "nvidia,tegra264-agic",
3141 "nvidia,tegra210-agic";
3142 #interrupt-cells = <3>;
3143 interrupt-controller;
3149 clock-names = "clk";
3153 agic_page2: interrupt-controller@9980000 {
3154 compatible = "nvidia,tegra264-agic",
3155 "nvidia,tegra210-agic";
3156 #interrupt-cells = <3>;
3157 interrupt-controller;
3163 clock-names = "clk";
3167 agic_page3: interrupt-controller@9990000 {
3168 compatible = "nvidia,tegra264-agic",
3169 "nvidia,tegra210-agic";
3170 #interrupt-cells = <3>;
3171 interrupt-controller;
3177 clock-names = "clk";
3181 agic_page4: interrupt-controller@99a0000 {
3182 compatible = "nvidia,tegra264-agic",
3183 "nvidia,tegra210-agic";
3184 #interrupt-cells = <3>;
3185 interrupt-controller;
3191 clock-names = "clk";
3195 agic_page5: interrupt-controller@99b0000 {
3196 compatible = "nvidia,tegra264-agic",
3197 "nvidia,tegra210-agic";
3198 #interrupt-cells = <3>;
3199 interrupt-controller;
3205 clock-names = "clk";
3210 gpcdma: dma-controller@8400000 {
3211 compatible = "nvidia,tegra264-gpcdma", "nvidia,tegra186-gpcdma";
3245 #dma-cells = <1>;
3247 dma-coherent;
3248 dma-channel-mask = <0xfffffffe>;
3253 compatible = "nvidia,tegra264-hsp";
3264 interrupt-names = "doorbell", "shared0", "shared1", "shared2",
3267 #mbox-cells = <2>;
3271 compatible = "nvidia,tegra264-rtc", "nvidia,tegra20-rtc";
3273 interrupt-parent = <&pmc>;
3276 clock-names = "rtc";
3281 compatible = "nvidia,tegra264-utc";
3284 reg-names = "tx", "rx";
3286 rx-threshold = <4>;
3287 tx-threshold = <4>;
3292 compatible = "nvidia,tegra264-utc";
3295 reg-names = "tx", "rx";
3297 rx-threshold = <4>;
3298 tx-threshold = <4>;
3303 compatible = "arm,sbsa-uart";
3310 compatible = "nvidia,tegra264-i2c";
3313 clock-frequency = <400000>;
3316 clock-names = "div-clk", "parent";
3317 assigned-clocks = <&bpmp TEGRA264_CLK_AON_I2C>;
3318 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLAON>;
3320 reset-names = "i2c";
3325 compatible = "nvidia,tegra264-i2c";
3328 clock-frequency = <400000>;
3331 clock-names = "div-clk", "parent";
3332 assigned-clocks = <&bpmp TEGRA264_CLK_AON_I2C>;
3333 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLAON>;
3335 reset-names = "i2c";
3340 compatible = "nvidia,tegra264-pmc";
3346 reg-names = "pmc", "wake", "aotag", "scratch", "misc";
3347 #interrupt-cells = <2>;
3348 interrupt-controller;
3354 compatible = "simple-bus";
3356 #address-cells = <2>;
3357 #size-cells = <2>;
3360 <0x01 0x00000000 0x00 0x20000000 0x00 0x40000000>, /* non-prefetchable memory (32-bit) */
3364 compatible = "arm,smmu-v3";
3368 interrupt-names = "eventq", "gerror";
3371 #iommu-cells = <1>;
3372 dma-coherent;
3376 compatible = "arm,smmu-v3";
3380 interrupt-names = "eventq", "gerror";
3383 #iommu-cells = <1>;
3384 dma-coherent;
3387 mc: memory-controller@8020000 {
3388 compatible = "nvidia,tegra264-mc";
3406 reg-names = "broadcast", "ch0", "ch1", "ch2", "ch3",
3418 #interconnect-cells = <1>;
3420 #address-cells = <2>;
3421 #size-cells = <2>;
3424 dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
3426 emc: external-memory-controller@8800000 {
3427 compatible = "nvidia,tegra264-emc";
3432 clock-names = "emc";
3434 #interconnect-cells = <0>;
3440 compatible = "arm,smmu-v3";
3444 interrupt-names = "eventq", "gerror";
3447 #iommu-cells = <1>;
3448 dma-coherent;
3452 compatible = "arm,smmu-v3";
3456 interrupt-names = "eventq", "gerror";
3459 #iommu-cells = <1>;
3460 dma-coherent;
3464 compatible = "nvidia,tegra264-i2c";
3467 clock-frequency = <400000>;
3470 clock-names = "div-clk", "parent";
3471 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3472 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3474 reset-names = "i2c";
3479 compatible = "nvidia,tegra264-i2c";
3482 clock-frequency = <400000>;
3485 clock-names = "div-clk", "parent";
3486 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3487 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3489 reset-names = "i2c";
3494 compatible = "nvidia,tegra264-i2c";
3497 clock-frequency = <400000>;
3500 clock-names = "div-clk", "parent";
3501 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3502 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3504 reset-names = "i2c";
3509 compatible = "nvidia,tegra264-i2c";
3512 clock-frequency = <400000>;
3515 clock-names = "div-clk", "parent";
3516 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3517 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3519 reset-names = "i2c";
3524 compatible = "nvidia,tegra264-i2c";
3527 clock-frequency = <400000>;
3530 clock-names = "div-clk", "parent";
3531 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3532 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3534 reset-names = "i2c";
3539 compatible = "nvidia,tegra264-i2c";
3542 clock-frequency = <400000>;
3545 clock-names = "div-clk", "parent";
3546 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3547 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3549 reset-names = "i2c";
3554 compatible = "nvidia,tegra264-i2c";
3557 clock-frequency = <400000>;
3560 clock-names = "div-clk", "parent";
3561 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3562 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3564 reset-names = "i2c";
3569 compatible = "nvidia,tegra264-i2c";
3572 clock-frequency = <400000>;
3575 clock-names = "div-clk", "parent";
3576 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3577 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3579 reset-names = "i2c";
3584 compatible = "nvidia,tegra264-i2c";
3587 clock-frequency = <400000>;
3590 clock-names = "div-clk", "parent";
3591 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3592 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3594 reset-names = "i2c";
3599 compatible = "nvidia,tegra264-i2c";
3602 clock-frequency = <400000>;
3605 clock-names = "div-clk", "parent";
3606 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3607 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3609 reset-names = "i2c";
3614 compatible = "nvidia,tegra264-i2c";
3617 clock-frequency = <400000>;
3620 clock-names = "div-clk", "parent";
3621 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3622 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3624 reset-names = "i2c";
3629 compatible = "nvidia,tegra264-i2c";
3632 clock-frequency = <400000>;
3635 clock-names = "div-clk", "parent";
3636 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3637 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3639 reset-names = "i2c";
3644 compatible = "nvidia,tegra264-i2c";
3647 clock-frequency = <400000>;
3650 clock-names = "div-clk", "parent";
3651 assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
3652 assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
3654 reset-names = "i2c";
3658 gic: interrupt-controller@46000000 {
3659 compatible = "arm,gic-v3";
3662 interrupt-parent = <&gic>;
3665 redistributor-stride = <0x0 0x40000>;
3666 #redistributor-regions = <1>;
3667 #interrupt-cells = <3>;
3668 interrupt-controller;
3670 #address-cells = <2>;
3671 #size-cells = <2>;
3675 its: msi-controller@40000 {
3676 compatible = "arm,gic-v3-its";
3678 #msi-cells = <1>;
3679 msi-controller;
3686 compatible = "simple-bus";
3687 #address-cells = <2>;
3688 #size-cells = <2>;
3693 compatible = "arm,smmu-v3";
3697 interrupt-names = "eventq", "gerror";
3700 #iommu-cells = <1>;
3701 dma-coherent;
3705 compatible = "nvidia,tegra264-hda";
3709 clock-names = "hda";
3712 reset-names = "hda", "hda2codec_2x";
3715 interconnect-names = "dma-mem", "write";
3723 compatible = "simple-bus";
3724 #address-cells = <2>;
3725 #size-cells = <2>;
3728 <0x80 0x00000000 0x00 0x20000000 0x00 0x40000000>; /* non-prefetchable memory (32-bit) */
3732 #address-cells = <1>;
3733 #size-cells = <0>;
3741 enable-method = "psci";
3743 i-cache-size = <65536>;
3744 i-cache-line-size = <64>;
3745 i-cache-sets = <256>;
3746 d-cache-size = <65536>;
3747 d-cache-line-size = <64>;
3748 d-cache-sets = <256>;
3757 enable-method = "psci";
3759 i-cache-size = <65536>;
3760 i-cache-line-size = <64>;
3761 i-cache-sets = <256>;
3762 d-cache-size = <65536>;
3763 d-cache-line-size = <64>;
3764 d-cache-sets = <256>;
3769 compatible = "nvidia,tegra264-bpmp", "nvidia,tegra186-bpmp";
3772 memory-region = <&shmem_bpmp>;
3773 #clock-cells = <1>;
3774 #reset-cells = <1>;
3775 #power-domain-cells = <1>;
3778 compatible = "nvidia,tegra186-bpmp-i2c";
3779 nvidia,bpmp-bus-id = <5>;
3780 #address-cells = <1>;
3781 #size-cells = <0>;
3785 compatible = "nvidia,tegra186-bpmp-thermal";
3786 #thermal-sensor-cells = <1>;
3791 compatible = "arm,armv8-pmuv3";
3797 compatible = "arm,psci-1.0";
3803 compatible = "nvidia,tegra264-audio-graph-card";
3807 clock-names = "pll_a", "plla_out0";
3808 assigned-clocks = <&bpmp TEGRA264_CLK_PLLA1>,
3811 assigned-clock-parents = <0>,
3819 compatible = "arm,armv8-timer";