Lines Matching +full:tegra210 +full:- +full:xusb
1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 compatible = "simple-bus";
22 #address-cells = <2>;
23 #size-cells = <2>;
27 compatible = "nvidia,tegra234-misc";
34 compatible = "nvidia,tegra234-timer";
56 compatible = "nvidia,tegra234-gpio";
57 reg-names = "security", "gpio";
108 #interrupt-cells = <2>;
109 interrupt-controller;
110 #gpio-cells = <2>;
111 gpio-controller;
112 gpio-ranges = <&pinmux 0 0 164>;
116 compatible = "nvidia,tegra234-pinmux";
120 gpcdma: dma-controller@2600000 {
121 compatible = "nvidia,tegra234-gpcdma",
122 "nvidia,tegra186-gpcdma";
125 reset-names = "gpcdma";
158 #dma-cells = <1>;
160 dma-channel-mask = <0xfffffffe>;
161 dma-coherent;
165 compatible = "nvidia,tegra234-aconnect",
166 "nvidia,tegra210-aconnect";
169 clock-names = "ape", "apb2ape";
170 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_AUD>;
173 #address-cells = <2>;
174 #size-cells = <2>;
178 compatible = "nvidia,tegra234-ahub";
181 clock-names = "ahub";
182 assigned-clocks = <&bpmp TEGRA234_CLK_AHUB>;
183 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
184 assigned-clock-rates = <81600000>;
187 #address-cells = <2>;
188 #size-cells = <2>;
192 compatible = "nvidia,tegra234-i2s",
193 "nvidia,tegra210-i2s";
197 clock-names = "i2s", "sync_input";
198 assigned-clocks = <&bpmp TEGRA234_CLK_I2S1>;
199 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
200 assigned-clock-rates = <1536000>;
201 sound-name-prefix = "I2S1";
205 #address-cells = <1>;
206 #size-cells = <0>;
212 remote-endpoint = <&xbar_i2s1>;
220 dai-format = "i2s";
228 compatible = "nvidia,tegra234-i2s",
229 "nvidia,tegra210-i2s";
233 clock-names = "i2s", "sync_input";
234 assigned-clocks = <&bpmp TEGRA234_CLK_I2S2>;
235 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
236 assigned-clock-rates = <1536000>;
237 sound-name-prefix = "I2S2";
241 #address-cells = <1>;
242 #size-cells = <0>;
248 remote-endpoint = <&xbar_i2s2>;
256 dai-format = "i2s";
264 compatible = "nvidia,tegra234-i2s",
265 "nvidia,tegra210-i2s";
269 clock-names = "i2s", "sync_input";
270 assigned-clocks = <&bpmp TEGRA234_CLK_I2S3>;
271 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
272 assigned-clock-rates = <1536000>;
273 sound-name-prefix = "I2S3";
277 #address-cells = <1>;
278 #size-cells = <0>;
284 remote-endpoint = <&xbar_i2s3>;
292 dai-format = "i2s";
300 compatible = "nvidia,tegra234-i2s",
301 "nvidia,tegra210-i2s";
305 clock-names = "i2s", "sync_input";
306 assigned-clocks = <&bpmp TEGRA234_CLK_I2S4>;
307 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
308 assigned-clock-rates = <1536000>;
309 sound-name-prefix = "I2S4";
313 #address-cells = <1>;
314 #size-cells = <0>;
320 remote-endpoint = <&xbar_i2s4>;
328 dai-format = "i2s";
336 compatible = "nvidia,tegra234-i2s",
337 "nvidia,tegra210-i2s";
341 clock-names = "i2s", "sync_input";
342 assigned-clocks = <&bpmp TEGRA234_CLK_I2S5>;
343 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
344 assigned-clock-rates = <1536000>;
345 sound-name-prefix = "I2S5";
349 #address-cells = <1>;
350 #size-cells = <0>;
356 remote-endpoint = <&xbar_i2s5>;
364 dai-format = "i2s";
372 compatible = "nvidia,tegra234-i2s",
373 "nvidia,tegra210-i2s";
377 clock-names = "i2s", "sync_input";
378 assigned-clocks = <&bpmp TEGRA234_CLK_I2S6>;
379 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
380 assigned-clock-rates = <1536000>;
381 sound-name-prefix = "I2S6";
385 #address-cells = <1>;
386 #size-cells = <0>;
392 remote-endpoint = <&xbar_i2s6>;
400 dai-format = "i2s";
408 compatible = "nvidia,tegra234-sfc",
409 "nvidia,tegra210-sfc";
411 sound-name-prefix = "SFC1";
414 #address-cells = <1>;
415 #size-cells = <0>;
421 remote-endpoint = <&xbar_sfc1_in>;
429 remote-endpoint = <&xbar_sfc1_out>;
436 compatible = "nvidia,tegra234-sfc",
437 "nvidia,tegra210-sfc";
439 sound-name-prefix = "SFC2";
442 #address-cells = <1>;
443 #size-cells = <0>;
449 remote-endpoint = <&xbar_sfc2_in>;
457 remote-endpoint = <&xbar_sfc2_out>;
464 compatible = "nvidia,tegra234-sfc",
465 "nvidia,tegra210-sfc";
467 sound-name-prefix = "SFC3";
470 #address-cells = <1>;
471 #size-cells = <0>;
477 remote-endpoint = <&xbar_sfc3_in>;
485 remote-endpoint = <&xbar_sfc3_out>;
492 compatible = "nvidia,tegra234-sfc",
493 "nvidia,tegra210-sfc";
495 sound-name-prefix = "SFC4";
498 #address-cells = <1>;
499 #size-cells = <0>;
505 remote-endpoint = <&xbar_sfc4_in>;
513 remote-endpoint = <&xbar_sfc4_out>;
520 compatible = "nvidia,tegra234-amx",
521 "nvidia,tegra194-amx";
523 sound-name-prefix = "AMX1";
526 #address-cells = <1>;
527 #size-cells = <0>;
533 remote-endpoint = <&xbar_amx1_in1>;
541 remote-endpoint = <&xbar_amx1_in2>;
549 remote-endpoint = <&xbar_amx1_in3>;
557 remote-endpoint = <&xbar_amx1_in4>;
565 remote-endpoint = <&xbar_amx1_out>;
572 compatible = "nvidia,tegra234-amx",
573 "nvidia,tegra194-amx";
575 sound-name-prefix = "AMX2";
578 #address-cells = <1>;
579 #size-cells = <0>;
585 remote-endpoint = <&xbar_amx2_in1>;
593 remote-endpoint = <&xbar_amx2_in2>;
601 remote-endpoint = <&xbar_amx2_in3>;
609 remote-endpoint = <&xbar_amx2_in4>;
617 remote-endpoint = <&xbar_amx2_out>;
624 compatible = "nvidia,tegra234-amx",
625 "nvidia,tegra194-amx";
627 sound-name-prefix = "AMX3";
630 #address-cells = <1>;
631 #size-cells = <0>;
637 remote-endpoint = <&xbar_amx3_in1>;
645 remote-endpoint = <&xbar_amx3_in2>;
653 remote-endpoint = <&xbar_amx3_in3>;
661 remote-endpoint = <&xbar_amx3_in4>;
669 remote-endpoint = <&xbar_amx3_out>;
676 compatible = "nvidia,tegra234-amx",
677 "nvidia,tegra194-amx";
679 sound-name-prefix = "AMX4";
682 #address-cells = <1>;
683 #size-cells = <0>;
689 remote-endpoint = <&xbar_amx4_in1>;
697 remote-endpoint = <&xbar_amx4_in2>;
705 remote-endpoint = <&xbar_amx4_in3>;
713 remote-endpoint = <&xbar_amx4_in4>;
721 remote-endpoint = <&xbar_amx4_out>;
728 compatible = "nvidia,tegra234-adx",
729 "nvidia,tegra210-adx";
731 sound-name-prefix = "ADX1";
734 #address-cells = <1>;
735 #size-cells = <0>;
741 remote-endpoint = <&xbar_adx1_in>;
749 remote-endpoint = <&xbar_adx1_out1>;
757 remote-endpoint = <&xbar_adx1_out2>;
765 remote-endpoint = <&xbar_adx1_out3>;
773 remote-endpoint = <&xbar_adx1_out4>;
780 compatible = "nvidia,tegra234-adx",
781 "nvidia,tegra210-adx";
783 sound-name-prefix = "ADX2";
786 #address-cells = <1>;
787 #size-cells = <0>;
793 remote-endpoint = <&xbar_adx2_in>;
801 remote-endpoint = <&xbar_adx2_out1>;
809 remote-endpoint = <&xbar_adx2_out2>;
817 remote-endpoint = <&xbar_adx2_out3>;
825 remote-endpoint = <&xbar_adx2_out4>;
832 compatible = "nvidia,tegra234-adx",
833 "nvidia,tegra210-adx";
835 sound-name-prefix = "ADX3";
838 #address-cells = <1>;
839 #size-cells = <0>;
845 remote-endpoint = <&xbar_adx3_in>;
853 remote-endpoint = <&xbar_adx3_out1>;
861 remote-endpoint = <&xbar_adx3_out2>;
869 remote-endpoint = <&xbar_adx3_out3>;
877 remote-endpoint = <&xbar_adx3_out4>;
884 compatible = "nvidia,tegra234-adx",
885 "nvidia,tegra210-adx";
887 sound-name-prefix = "ADX4";
890 #address-cells = <1>;
891 #size-cells = <0>;
897 remote-endpoint = <&xbar_adx4_in>;
905 remote-endpoint = <&xbar_adx4_out1>;
913 remote-endpoint = <&xbar_adx4_out2>;
921 remote-endpoint = <&xbar_adx4_out3>;
929 remote-endpoint = <&xbar_adx4_out4>;
937 compatible = "nvidia,tegra234-dmic",
938 "nvidia,tegra210-dmic";
941 clock-names = "dmic";
942 assigned-clocks = <&bpmp TEGRA234_CLK_DMIC1>;
943 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
944 assigned-clock-rates = <3072000>;
945 sound-name-prefix = "DMIC1";
949 #address-cells = <1>;
950 #size-cells = <0>;
956 remote-endpoint = <&xbar_dmic1>;
971 compatible = "nvidia,tegra234-dmic",
972 "nvidia,tegra210-dmic";
975 clock-names = "dmic";
976 assigned-clocks = <&bpmp TEGRA234_CLK_DMIC2>;
977 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
978 assigned-clock-rates = <3072000>;
979 sound-name-prefix = "DMIC2";
983 #address-cells = <1>;
984 #size-cells = <0>;
990 remote-endpoint = <&xbar_dmic2>;
1005 compatible = "nvidia,tegra234-dmic",
1006 "nvidia,tegra210-dmic";
1009 clock-names = "dmic";
1010 assigned-clocks = <&bpmp TEGRA234_CLK_DMIC3>;
1011 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
1012 assigned-clock-rates = <3072000>;
1013 sound-name-prefix = "DMIC3";
1017 #address-cells = <1>;
1018 #size-cells = <0>;
1024 remote-endpoint = <&xbar_dmic3>;
1039 compatible = "nvidia,tegra234-dmic",
1040 "nvidia,tegra210-dmic";
1043 clock-names = "dmic";
1044 assigned-clocks = <&bpmp TEGRA234_CLK_DMIC4>;
1045 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
1046 assigned-clock-rates = <3072000>;
1047 sound-name-prefix = "DMIC4";
1051 #address-cells = <1>;
1052 #size-cells = <0>;
1058 remote-endpoint = <&xbar_dmic4>;
1073 compatible = "nvidia,tegra234-dspk",
1074 "nvidia,tegra186-dspk";
1077 clock-names = "dspk";
1078 assigned-clocks = <&bpmp TEGRA234_CLK_DSPK1>;
1079 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
1080 assigned-clock-rates = <12288000>;
1081 sound-name-prefix = "DSPK1";
1085 #address-cells = <1>;
1086 #size-cells = <0>;
1092 remote-endpoint = <&xbar_dspk1>;
1107 compatible = "nvidia,tegra234-dspk",
1108 "nvidia,tegra186-dspk";
1111 clock-names = "dspk";
1112 assigned-clocks = <&bpmp TEGRA234_CLK_DSPK2>;
1113 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
1114 assigned-clock-rates = <12288000>;
1115 sound-name-prefix = "DSPK2";
1119 #address-cells = <1>;
1120 #size-cells = <0>;
1126 remote-endpoint = <&xbar_dspk2>;
1140 tegra_ope1: processing-engine@2908000 {
1141 compatible = "nvidia,tegra234-ope",
1142 "nvidia,tegra210-ope";
1144 sound-name-prefix = "OPE1";
1146 #address-cells = <2>;
1147 #size-cells = <2>;
1151 compatible = "nvidia,tegra234-peq",
1152 "nvidia,tegra210-peq";
1156 dynamic-range-compressor@2908200 {
1157 compatible = "nvidia,tegra234-mbdrc",
1158 "nvidia,tegra210-mbdrc";
1163 #address-cells = <1>;
1164 #size-cells = <0>;
1170 remote-endpoint =
1179 remote-endpoint =
1187 compatible = "nvidia,tegra234-mvc",
1188 "nvidia,tegra210-mvc";
1190 sound-name-prefix = "MVC1";
1193 #address-cells = <1>;
1194 #size-cells = <0>;
1200 remote-endpoint = <&xbar_mvc1_in>;
1208 remote-endpoint = <&xbar_mvc1_out>;
1215 compatible = "nvidia,tegra234-mvc",
1216 "nvidia,tegra210-mvc";
1218 sound-name-prefix = "MVC2";
1221 #address-cells = <1>;
1222 #size-cells = <0>;
1228 remote-endpoint = <&xbar_mvc2_in>;
1236 remote-endpoint = <&xbar_mvc2_out>;
1243 compatible = "nvidia,tegra234-amixer",
1244 "nvidia,tegra210-amixer";
1246 sound-name-prefix = "MIXER1";
1249 #address-cells = <1>;
1250 #size-cells = <0>;
1256 remote-endpoint = <&xbar_mix_in1>;
1264 remote-endpoint = <&xbar_mix_in2>;
1272 remote-endpoint = <&xbar_mix_in3>;
1280 remote-endpoint = <&xbar_mix_in4>;
1288 remote-endpoint = <&xbar_mix_in5>;
1296 remote-endpoint = <&xbar_mix_in6>;
1304 remote-endpoint = <&xbar_mix_in7>;
1312 remote-endpoint = <&xbar_mix_in8>;
1320 remote-endpoint = <&xbar_mix_in9>;
1328 remote-endpoint = <&xbar_mix_in10>;
1336 remote-endpoint = <&xbar_mix_out1>;
1344 remote-endpoint = <&xbar_mix_out2>;
1352 remote-endpoint = <&xbar_mix_out3>;
1360 remote-endpoint = <&xbar_mix_out4>;
1368 remote-endpoint = <&xbar_mix_out5>;
1375 compatible = "nvidia,tegra234-admaif",
1376 "nvidia,tegra186-admaif";
1398 dma-names = "rx1", "tx1",
1420 interconnect-names = "dma-mem", "write";
1424 #address-cells = <1>;
1425 #size-cells = <0>;
1431 remote-endpoint = <&xbar_admaif0>;
1439 remote-endpoint = <&xbar_admaif1>;
1447 remote-endpoint = <&xbar_admaif2>;
1455 remote-endpoint = <&xbar_admaif3>;
1463 remote-endpoint = <&xbar_admaif4>;
1471 remote-endpoint = <&xbar_admaif5>;
1479 remote-endpoint = <&xbar_admaif6>;
1487 remote-endpoint = <&xbar_admaif7>;
1495 remote-endpoint = <&xbar_admaif8>;
1503 remote-endpoint = <&xbar_admaif9>;
1511 remote-endpoint = <&xbar_admaif10>;
1519 remote-endpoint = <&xbar_admaif11>;
1527 remote-endpoint = <&xbar_admaif12>;
1535 remote-endpoint = <&xbar_admaif13>;
1543 remote-endpoint = <&xbar_admaif14>;
1551 remote-endpoint = <&xbar_admaif15>;
1559 remote-endpoint = <&xbar_admaif16>;
1567 remote-endpoint = <&xbar_admaif17>;
1575 remote-endpoint = <&xbar_admaif18>;
1583 remote-endpoint = <&xbar_admaif19>;
1590 compatible = "nvidia,tegra234-asrc",
1591 "nvidia,tegra186-asrc";
1593 sound-name-prefix = "ASRC1";
1596 #address-cells = <1>;
1597 #size-cells = <0>;
1603 remote-endpoint =
1612 remote-endpoint =
1621 remote-endpoint =
1630 remote-endpoint =
1639 remote-endpoint =
1648 remote-endpoint =
1657 remote-endpoint =
1666 remote-endpoint =
1675 remote-endpoint =
1684 remote-endpoint =
1693 remote-endpoint =
1702 remote-endpoint =
1711 remote-endpoint =
1719 #address-cells = <1>;
1720 #size-cells = <0>;
1726 remote-endpoint = <&admaif0>;
1734 remote-endpoint = <&admaif1>;
1742 remote-endpoint = <&admaif2>;
1750 remote-endpoint = <&admaif3>;
1758 remote-endpoint = <&admaif4>;
1766 remote-endpoint = <&admaif5>;
1774 remote-endpoint = <&admaif6>;
1782 remote-endpoint = <&admaif7>;
1790 remote-endpoint = <&admaif8>;
1798 remote-endpoint = <&admaif9>;
1806 remote-endpoint = <&admaif10>;
1814 remote-endpoint = <&admaif11>;
1822 remote-endpoint = <&admaif12>;
1830 remote-endpoint = <&admaif13>;
1838 remote-endpoint = <&admaif14>;
1846 remote-endpoint = <&admaif15>;
1854 remote-endpoint = <&admaif16>;
1862 remote-endpoint = <&admaif17>;
1870 remote-endpoint = <&admaif18>;
1878 remote-endpoint = <&admaif19>;
1886 remote-endpoint = <&i2s1_cif>;
1894 remote-endpoint = <&i2s2_cif>;
1902 remote-endpoint = <&i2s3_cif>;
1910 remote-endpoint = <&i2s4_cif>;
1918 remote-endpoint = <&i2s5_cif>;
1926 remote-endpoint = <&i2s6_cif>;
1934 remote-endpoint = <&dmic1_cif>;
1942 remote-endpoint = <&dmic2_cif>;
1950 remote-endpoint = <&dmic3_cif>;
1958 remote-endpoint = <&dmic4_cif>;
1966 remote-endpoint = <&dspk1_cif>;
1974 remote-endpoint = <&dspk2_cif>;
1982 remote-endpoint = <&sfc1_cif_in>;
1990 remote-endpoint = <&sfc1_cif_out>;
1998 remote-endpoint = <&sfc2_cif_in>;
2006 remote-endpoint = <&sfc2_cif_out>;
2014 remote-endpoint = <&sfc3_cif_in>;
2022 remote-endpoint = <&sfc3_cif_out>;
2030 remote-endpoint = <&sfc4_cif_in>;
2038 remote-endpoint = <&sfc4_cif_out>;
2046 remote-endpoint = <&mvc1_cif_in>;
2054 remote-endpoint = <&mvc1_cif_out>;
2062 remote-endpoint = <&mvc2_cif_in>;
2070 remote-endpoint = <&mvc2_cif_out>;
2078 remote-endpoint = <&amx1_in1>;
2086 remote-endpoint = <&amx1_in2>;
2094 remote-endpoint = <&amx1_in3>;
2102 remote-endpoint = <&amx1_in4>;
2110 remote-endpoint = <&amx1_out>;
2118 remote-endpoint = <&amx2_in1>;
2126 remote-endpoint = <&amx2_in2>;
2134 remote-endpoint = <&amx2_in3>;
2142 remote-endpoint = <&amx2_in4>;
2150 remote-endpoint = <&amx2_out>;
2158 remote-endpoint = <&amx3_in1>;
2166 remote-endpoint = <&amx3_in2>;
2174 remote-endpoint = <&amx3_in3>;
2182 remote-endpoint = <&amx3_in4>;
2190 remote-endpoint = <&amx3_out>;
2198 remote-endpoint = <&amx4_in1>;
2206 remote-endpoint = <&amx4_in2>;
2214 remote-endpoint = <&amx4_in3>;
2222 remote-endpoint = <&amx4_in4>;
2230 remote-endpoint = <&amx4_out>;
2238 remote-endpoint = <&adx1_in>;
2246 remote-endpoint = <&adx1_out1>;
2254 remote-endpoint = <&adx1_out2>;
2262 remote-endpoint = <&adx1_out3>;
2270 remote-endpoint = <&adx1_out4>;
2278 remote-endpoint = <&adx2_in>;
2286 remote-endpoint = <&adx2_out1>;
2294 remote-endpoint = <&adx2_out2>;
2302 remote-endpoint = <&adx2_out3>;
2310 remote-endpoint = <&adx2_out4>;
2318 remote-endpoint = <&adx3_in>;
2326 remote-endpoint = <&adx3_out1>;
2334 remote-endpoint = <&adx3_out2>;
2342 remote-endpoint = <&adx3_out3>;
2350 remote-endpoint = <&adx3_out4>;
2358 remote-endpoint = <&adx4_in>;
2366 remote-endpoint = <&adx4_out1>;
2374 remote-endpoint = <&adx4_out2>;
2382 remote-endpoint = <&adx4_out3>;
2390 remote-endpoint = <&adx4_out4>;
2398 remote-endpoint = <&mix_in1>;
2406 remote-endpoint = <&mix_in2>;
2414 remote-endpoint = <&mix_in3>;
2422 remote-endpoint = <&mix_in4>;
2430 remote-endpoint = <&mix_in5>;
2438 remote-endpoint = <&mix_in6>;
2446 remote-endpoint = <&mix_in7>;
2454 remote-endpoint = <&mix_in8>;
2462 remote-endpoint = <&mix_in9>;
2470 remote-endpoint = <&mix_in10>;
2478 remote-endpoint = <&mix_out1>;
2486 remote-endpoint = <&mix_out2>;
2494 remote-endpoint = <&mix_out3>;
2502 remote-endpoint = <&mix_out4>;
2510 remote-endpoint = <&mix_out5>;
2518 remote-endpoint = <&asrc_in1_ep>;
2526 remote-endpoint = <&asrc_out1_ep>;
2534 remote-endpoint = <&asrc_in2_ep>;
2542 remote-endpoint = <&asrc_out2_ep>;
2550 remote-endpoint = <&asrc_in3_ep>;
2558 remote-endpoint = <&asrc_out3_ep>;
2566 remote-endpoint = <&asrc_in4_ep>;
2574 remote-endpoint = <&asrc_out4_ep>;
2582 remote-endpoint = <&asrc_in5_ep>;
2590 remote-endpoint = <&asrc_out5_ep>;
2598 remote-endpoint = <&asrc_in6_ep>;
2606 remote-endpoint = <&asrc_out6_ep>;
2614 remote-endpoint = <&asrc_in7_ep>;
2622 remote-endpoint = <&ope1_cif_in_ep>;
2630 remote-endpoint = <&ope1_cif_out_ep>;
2636 adma: dma-controller@2930000 {
2637 compatible = "nvidia,tegra234-adma",
2638 "nvidia,tegra186-adma";
2640 interrupt-parent = <&agic>;
2673 #dma-cells = <1>;
2675 clock-names = "d_audio";
2679 agic: interrupt-controller@2a40000 {
2680 compatible = "nvidia,tegra234-agic",
2681 "nvidia,tegra210-agic";
2682 #interrupt-cells = <3>;
2683 interrupt-controller;
2690 clock-names = "clk";
2695 mc: memory-controller@2c00000 {
2696 compatible = "nvidia,tegra234-mc";
2697 reg = <0x0 0x02c00000 0x0 0x10000>, /* MC-SID */
2715 reg-names = "sid", "broadcast", "ch0", "ch1", "ch2", "ch3",
2719 #interconnect-cells = <1>;
2722 #address-cells = <2>;
2723 #size-cells = <2>;
2743 dma-ranges = <0x0 0x0 0x0 0x0 0x80 0x0>;
2745 emc: external-memory-controller@2c60000 {
2746 compatible = "nvidia,tegra234-emc";
2751 clock-names = "emc";
2754 #interconnect-cells = <0>;
2761 compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
2767 dma-names = "rx", "tx";
2772 compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
2778 dma-names = "rx", "tx";
2783 compatible = "nvidia,tegra194-i2c";
2787 #address-cells = <1>;
2788 #size-cells = <0>;
2789 clock-frequency = <400000>;
2792 assigned-clocks = <&bpmp TEGRA234_CLK_I2C1>;
2793 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2794 clock-names = "div-clk", "parent";
2796 reset-names = "i2c";
2798 dma-names = "rx", "tx";
2802 compatible = "nvidia,tegra194-i2c";
2805 #address-cells = <1>;
2806 #size-cells = <0>;
2808 clock-frequency = <400000>;
2811 assigned-clocks = <&bpmp TEGRA234_CLK_I2C3>;
2812 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2813 clock-names = "div-clk", "parent";
2815 reset-names = "i2c";
2817 dma-names = "rx", "tx";
2821 compatible = "nvidia,tegra194-i2c";
2824 #address-cells = <1>;
2825 #size-cells = <0>;
2827 clock-frequency = <100000>;
2830 assigned-clocks = <&bpmp TEGRA234_CLK_I2C4>;
2831 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2832 clock-names = "div-clk", "parent";
2834 reset-names = "i2c";
2836 dma-names = "rx", "tx";
2840 compatible = "nvidia,tegra194-i2c";
2843 #address-cells = <1>;
2844 #size-cells = <0>;
2846 clock-frequency = <100000>;
2849 assigned-clocks = <&bpmp TEGRA234_CLK_I2C6>;
2850 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2851 clock-names = "div-clk", "parent";
2853 reset-names = "i2c";
2855 dma-names = "rx", "tx";
2859 compatible = "nvidia,tegra194-i2c";
2862 #address-cells = <1>;
2863 #size-cells = <0>;
2865 clock-frequency = <100000>;
2868 assigned-clocks = <&bpmp TEGRA234_CLK_I2C7>;
2869 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2870 clock-names = "div-clk", "parent";
2872 reset-names = "i2c";
2874 dma-names = "rx", "tx";
2878 compatible = "arm,sbsa-uart";
2885 compatible = "nvidia,tegra194-i2c";
2888 #address-cells = <1>;
2889 #size-cells = <0>;
2891 clock-frequency = <100000>;
2894 assigned-clocks = <&bpmp TEGRA234_CLK_I2C9>;
2895 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2896 clock-names = "div-clk", "parent";
2898 reset-names = "i2c";
2900 dma-names = "rx", "tx";
2904 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
2907 #address-cells = <1>;
2908 #size-cells = <0>;
2910 assigned-clocks = <&bpmp TEGRA234_CLK_SPI1>;
2911 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2912 clock-names = "spi";
2915 reset-names = "spi";
2917 dma-names = "rx", "tx";
2918 dma-coherent;
2923 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
2926 #address-cells = <1>;
2927 #size-cells = <0>;
2929 clock-names = "spi";
2931 assigned-clocks = <&bpmp TEGRA234_CLK_SPI3>;
2932 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2934 reset-names = "spi";
2936 dma-names = "rx", "tx";
2937 dma-coherent;
2942 compatible = "nvidia,tegra234-qspi";
2945 #address-cells = <1>;
2946 #size-cells = <0>;
2949 clock-names = "qspi", "qspi_out";
2955 compatible = "nvidia,tegra234-pwm", "nvidia,tegra194-pwm";
2959 reset-names = "pwm";
2961 #pwm-cells = <2>;
2965 compatible = "nvidia,tegra234-pwm", "nvidia,tegra194-pwm";
2969 reset-names = "pwm";
2971 #pwm-cells = <2>;
2975 compatible = "nvidia,tegra234-pwm", "nvidia,tegra194-pwm";
2979 reset-names = "pwm";
2981 #pwm-cells = <2>;
2985 compatible = "nvidia,tegra234-pwm", "nvidia,tegra194-pwm";
2989 reset-names = "pwm";
2991 #pwm-cells = <2>;
2995 compatible = "nvidia,tegra234-pwm", "nvidia,tegra194-pwm";
2999 reset-names = "pwm";
3001 #pwm-cells = <2>;
3005 compatible = "nvidia,tegra234-pwm", "nvidia,tegra194-pwm";
3009 reset-names = "pwm";
3011 #pwm-cells = <2>;
3015 compatible = "nvidia,tegra234-pwm", "nvidia,tegra194-pwm";
3019 reset-names = "pwm";
3021 #pwm-cells = <2>;
3025 compatible = "nvidia,tegra234-qspi";
3028 #address-cells = <1>;
3029 #size-cells = <0>;
3032 clock-names = "qspi", "qspi_out";
3038 compatible = "nvidia,tegra234-sdhci", "nvidia,tegra186-sdhci";
3043 clock-names = "sdhci", "tmclk";
3044 assigned-clocks = <&bpmp TEGRA234_CLK_SDMMC1>,
3046 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC4_MUXED>,
3049 reset-names = "sdhci";
3052 interconnect-names = "dma-mem", "write";
3054 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
3055 pinctrl-0 = <&sdmmc1_3v3>;
3056 pinctrl-1 = <&sdmmc1_1v8>;
3057 nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
3058 nvidia,pad-autocal-pull-down-offset-3v3-timeout = <0x07>;
3059 nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
3060 nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x07>;
3061 nvidia,pad-autocal-pull-up-offset-sdr104 = <0x00>;
3062 nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>;
3063 nvidia,default-tap = <14>;
3064 nvidia,default-trim = <0x8>;
3065 sd-uhs-sdr25;
3066 sd-uhs-sdr50;
3067 sd-uhs-ddr50;
3068 sd-uhs-sdr104;
3073 compatible = "nvidia,tegra234-sdhci", "nvidia,tegra186-sdhci";
3078 clock-names = "sdhci", "tmclk";
3079 assigned-clocks = <&bpmp TEGRA234_CLK_SDMMC4>,
3081 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC4>;
3083 reset-names = "sdhci";
3086 interconnect-names = "dma-mem", "write";
3088 nvidia,pad-autocal-pull-up-offset-hs400 = <0x00>;
3089 nvidia,pad-autocal-pull-down-offset-hs400 = <0x00>;
3090 nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;
3091 nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x0a>;
3092 nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x0a>;
3093 nvidia,pad-autocal-pull-down-offset-3v3-timeout = <0x0a>;
3094 nvidia,default-tap = <0x8>;
3095 nvidia,default-trim = <0x14>;
3096 nvidia,dqs-trim = <40>;
3097 supports-cqe;
3102 compatible = "nvidia,tegra234-hda";
3107 clock-names = "hda", "hda2codec_2x";
3110 reset-names = "hda", "hda2codec_2x";
3111 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DISP>;
3114 interconnect-names = "dma-mem", "write";
3120 compatible = "nvidia,tegra234-xusb-padctl";
3123 reg-names = "padctl", "ao";
3127 reset-names = "padctl";
3134 clock-names = "trk";
3137 usb2-0 {
3138 nvidia,function = "xusb";
3140 #phy-cells = <0>;
3143 usb2-1 {
3144 nvidia,function = "xusb";
3146 #phy-cells = <0>;
3149 usb2-2 {
3150 nvidia,function = "xusb";
3152 #phy-cells = <0>;
3155 usb2-3 {
3156 nvidia,function = "xusb";
3158 #phy-cells = <0>;
3165 usb3-0 {
3166 nvidia,function = "xusb";
3168 #phy-cells = <0>;
3171 usb3-1 {
3172 nvidia,function = "xusb";
3174 #phy-cells = <0>;
3177 usb3-2 {
3178 nvidia,function = "xusb";
3180 #phy-cells = <0>;
3183 usb3-3 {
3184 nvidia,function = "xusb";
3186 #phy-cells = <0>;
3193 usb2-0 {
3197 usb2-1 {
3201 usb2-2 {
3205 usb2-3 {
3209 usb3-0 {
3213 usb3-1 {
3217 usb3-2 {
3221 usb3-3 {
3228 compatible = "nvidia,tegra234-xudc";
3231 reg-names = "base", "fpci";
3237 clock-names = "dev", "ss", "ss_src", "fs_src";
3240 interconnect-names = "dma-mem", "write";
3242 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBB>,
3244 power-domain-names = "dev", "ss";
3245 nvidia,xusb-padctl = <&xusb_padctl>;
3246 dma-coherent;
3251 compatible = "nvidia,tegra234-xusb";
3255 reg-names = "hcd", "fpci", "bar2";
3269 clock-names = "xusb_host", "xusb_falcon_src",
3275 interconnect-names = "dma-mem", "write";
3278 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
3280 power-domain-names = "xusb_host", "xusb_ss";
3282 nvidia,xusb-padctl = <&xusb_padctl>;
3283 dma-coherent;
3288 compatible = "nvidia,tegra234-efuse";
3291 clock-names = "fuse";
3294 hte_lic: hardware-timestamp@3aa0000 {
3295 compatible = "nvidia,tegra234-gte-lic";
3298 nvidia,int-threshold = <1>;
3299 #timestamp-cells = <1>;
3303 compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
3314 interrupt-names = "doorbell", "shared0", "shared1", "shared2",
3317 #mbox-cells = <2>;
3321 compatible = "nvidia,tegra234-p2u";
3323 reg-names = "ctl";
3325 #phy-cells = <0>;
3329 compatible = "nvidia,tegra234-p2u";
3331 reg-names = "ctl";
3333 #phy-cells = <0>;
3337 compatible = "nvidia,tegra234-p2u";
3339 reg-names = "ctl";
3341 #phy-cells = <0>;
3345 compatible = "nvidia,tegra234-p2u";
3347 reg-names = "ctl";
3349 #phy-cells = <0>;
3353 compatible = "nvidia,tegra234-p2u";
3355 reg-names = "ctl";
3357 #phy-cells = <0>;
3361 compatible = "nvidia,tegra234-p2u";
3363 reg-names = "ctl";
3365 #phy-cells = <0>;
3369 compatible = "nvidia,tegra234-p2u";
3371 reg-names = "ctl";
3373 #phy-cells = <0>;
3377 compatible = "nvidia,tegra234-p2u";
3379 reg-names = "ctl";
3381 #phy-cells = <0>;
3385 compatible = "nvidia,tegra234-p2u";
3387 reg-names = "ctl";
3389 #phy-cells = <0>;
3393 compatible = "nvidia,tegra234-p2u";
3395 reg-names = "ctl";
3397 #phy-cells = <0>;
3401 compatible = "nvidia,tegra234-p2u";
3403 reg-names = "ctl";
3405 #phy-cells = <0>;
3409 compatible = "nvidia,tegra234-p2u";
3411 reg-names = "ctl";
3413 #phy-cells = <0>;
3417 compatible = "nvidia,tegra234-p2u";
3419 reg-names = "ctl";
3421 #phy-cells = <0>;
3425 compatible = "nvidia,tegra234-p2u";
3427 reg-names = "ctl";
3429 #phy-cells = <0>;
3433 compatible = "nvidia,tegra234-p2u";
3435 reg-names = "ctl";
3437 #phy-cells = <0>;
3441 compatible = "nvidia,tegra234-p2u";
3443 reg-names = "ctl";
3445 #phy-cells = <0>;
3449 compatible = "nvidia,tegra234-p2u";
3451 reg-names = "ctl";
3453 #phy-cells = <0>;
3457 compatible = "nvidia,tegra234-p2u";
3459 reg-names = "ctl";
3461 #phy-cells = <0>;
3465 compatible = "nvidia,tegra234-p2u";
3467 reg-names = "ctl";
3469 #phy-cells = <0>;
3473 compatible = "nvidia,tegra234-p2u";
3475 reg-names = "ctl";
3477 #phy-cells = <0>;
3481 compatible = "nvidia,tegra234-p2u";
3483 reg-names = "ctl";
3485 #phy-cells = <0>;
3489 compatible = "nvidia,tegra234-p2u";
3491 reg-names = "ctl";
3493 #phy-cells = <0>;
3497 compatible = "nvidia,tegra234-p2u";
3499 reg-names = "ctl";
3501 #phy-cells = <0>;
3505 compatible = "nvidia,tegra234-p2u";
3507 reg-names = "ctl";
3509 #phy-cells = <0>;
3513 compatible = "nvidia,tegra234-mgbe";
3517 reg-names = "hypervisor", "mac", "xpcs";
3519 interrupt-names = "common";
3532 clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
3533 "rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
3534 "rx-pcs", "tx-pcs";
3537 reset-names = "mac", "pcs";
3540 interconnect-names = "dma-mem", "write";
3542 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEB>;
3545 snps,axi-config = <&mgbe0_axi_setup>;
3547 mgbe0_axi_setup: stmmac-axi-config {
3555 compatible = "nvidia,tegra234-mgbe";
3559 reg-names = "hypervisor", "mac", "xpcs";
3561 interrupt-names = "common";
3574 clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
3575 "rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
3576 "rx-pcs", "tx-pcs";
3579 reset-names = "mac", "pcs";
3582 interconnect-names = "dma-mem", "write";
3584 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEC>;
3587 snps,axi-config = <&mgbe1_axi_setup>;
3589 mgbe1_axi_setup: stmmac-axi-config {
3597 compatible = "nvidia,tegra234-mgbe";
3601 reg-names = "hypervisor", "mac", "xpcs";
3603 interrupt-names = "common";
3616 clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
3617 "rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
3618 "rx-pcs", "tx-pcs";
3621 reset-names = "mac", "pcs";
3624 interconnect-names = "dma-mem", "write";
3626 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBED>;
3629 snps,axi-config = <&mgbe2_axi_setup>;
3631 mgbe2_axi_setup: stmmac-axi-config {
3639 compatible = "nvidia,tegra234-mgbe";
3643 reg-names = "hypervisor", "mac", "xpcs";
3645 interrupt-names = "common";
3658 clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
3659 "rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
3660 "rx-pcs", "tx-pcs";
3663 reset-names = "mac", "pcs";
3666 interconnect-names = "dma-mem", "write";
3668 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBED>;
3673 compatible = "nvidia,tegra234-smmu", "nvidia,smmu-500";
3806 stream-match-mask = <0x7f80>;
3807 #global-interrupts = <2>;
3808 #iommu-cells = <1>;
3810 nvidia,memory-controller = <&mc>;
3814 sce-fabric@b600000 {
3815 compatible = "nvidia,tegra234-sce-fabric";
3821 rce-fabric@be00000 {
3822 compatible = "nvidia,tegra234-rce-fabric";
3829 compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
3839 interrupt-names = "shared1", "shared2", "shared3", "shared4";
3840 #mbox-cells = <2>;
3843 hte_aon: hardware-timestamp@c1e0000 {
3844 compatible = "nvidia,tegra234-gte-aon";
3847 nvidia,int-threshold = <1>;
3848 nvidia,gpio-controller = <&gpio_aon>;
3849 #timestamp-cells = <1>;
3853 compatible = "nvidia,tegra194-i2c";
3856 #address-cells = <1>;
3857 #size-cells = <0>;
3859 clock-frequency = <100000>;
3862 clock-names = "div-clk", "parent";
3863 assigned-clocks = <&bpmp TEGRA234_CLK_I2C2>;
3864 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
3866 reset-names = "i2c";
3868 dma-names = "rx", "tx";
3872 compatible = "nvidia,tegra194-i2c";
3875 #address-cells = <1>;
3876 #size-cells = <0>;
3878 clock-frequency = <400000>;
3881 clock-names = "div-clk", "parent";
3882 assigned-clocks = <&bpmp TEGRA234_CLK_I2C8>;
3883 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
3885 reset-names = "i2c";
3887 dma-names = "rx", "tx";
3891 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
3894 #address-cells = <1>;
3895 #size-cells = <0>;
3897 clock-names = "spi";
3899 assigned-clocks = <&bpmp TEGRA234_CLK_SPI2>;
3900 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
3902 reset-names = "spi";
3904 dma-names = "rx", "tx";
3905 dma-coherent;
3910 compatible = "nvidia,tegra234-rtc", "nvidia,tegra20-rtc";
3912 interrupt-parent = <&pmc>;
3915 clock-names = "rtc";
3920 compatible = "nvidia,tegra234-gpio-aon";
3921 reg-names = "security", "gpio";
3928 #interrupt-cells = <2>;
3929 interrupt-controller;
3930 #gpio-cells = <2>;
3931 gpio-controller;
3932 gpio-ranges = <&pinmux_aon 0 0 32>;
3936 compatible = "nvidia,tegra234-pinmux-aon";
3941 compatible = "nvidia,tegra234-pwm", "nvidia,tegra194-pwm";
3945 reset-names = "pwm";
3947 #pwm-cells = <2>;
3951 compatible = "nvidia,tegra234-pmc";
3957 reg-names = "pmc", "wake", "aotag", "scratch", "misc";
3959 #interrupt-cells = <2>;
3960 interrupt-controller;
3962 sdmmc1_1v8: sdmmc1-1v8 {
3963 pins = "sdmmc1-hv";
3964 power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
3967 sdmmc1_3v3: sdmmc1-3v3 {
3968 pins = "sdmmc1-hv";
3969 power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
3972 sdmmc3_1v8: sdmmc3-1v8 {
3973 pins = "sdmmc3-hv";
3974 power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
3977 sdmmc3_3v3: sdmmc3-3v3 {
3978 pins = "sdmmc3-hv";
3979 power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
3983 aon-fabric@c600000 {
3984 compatible = "nvidia,tegra234-aon-fabric";
3990 bpmp-fabric@d600000 {
3991 compatible = "nvidia,tegra234-bpmp-fabric";
3997 dce-fabric@de00000 {
3998 compatible = "nvidia,tegra234-sce-fabric";
4005 compatible = "nvidia,tegra234-ccplex-cluster";
4011 gic: interrupt-controller@f400000 {
4012 compatible = "arm,gic-v3";
4015 interrupt-parent = <&gic>;
4018 #redistributor-regions = <1>;
4019 #interrupt-cells = <3>;
4020 interrupt-controller;
4024 compatible = "nvidia,tegra234-smmu", "nvidia,smmu-500";
4155 stream-match-mask = <0x7f80>;
4156 #global-interrupts = <1>;
4157 #iommu-cells = <1>;
4159 nvidia,memory-controller = <&mc>;
4164 compatible = "nvidia,tegra234-smmu", "nvidia,smmu-500";
4297 stream-match-mask = <0x7f80>;
4298 #global-interrupts = <2>;
4299 #iommu-cells = <1>;
4301 nvidia,memory-controller = <&mc>;
4305 cbb-fabric@13a00000 {
4306 compatible = "nvidia,tegra234-cbb-fabric";
4313 compatible = "nvidia,tegra234-host1x";
4317 reg-names = "common", "hypervisor", "vm";
4327 interrupt-names = "syncpt0", "syncpt1", "syncpt2", "syncpt3", "syncpt4",
4330 clock-names = "host1x";
4332 #address-cells = <2>;
4333 #size-cells = <2>;
4337 interconnect-names = "dma-mem";
4339 dma-coherent;
4342 iommu-map = <0 &smmu_niso0 TEGRA234_SID_HOST1X_CTX0 1>,
4360 compatible = "nvidia,tegra234-vic";
4364 clock-names = "vic";
4366 reset-names = "vic";
4368 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_VIC>;
4371 interconnect-names = "dma-mem", "write";
4373 dma-coherent;
4377 compatible = "nvidia,tegra234-nvdec";
4382 clock-names = "nvdec", "fuse", "tsec_pka";
4384 reset-names = "nvdec";
4385 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>;
4388 interconnect-names = "dma-mem", "write";
4390 dma-coherent;
4392 nvidia,memory-controller = <&mc>;
4398 nvidia,bl-manifest-offset = <0>;
4399 nvidia,bl-data-offset = <0>;
4400 nvidia,bl-code-offset = <0>;
4401 nvidia,os-manifest-offset = <0>;
4402 nvidia,os-data-offset = <0>;
4403 nvidia,os-code-offset = <0>;
4413 compatible = "nvidia,tegra234-se-aes";
4417 dma-coherent;
4421 compatible = "nvidia,tegra234-se-hash";
4425 dma-coherent;
4430 compatible = "nvidia,tegra234-pcie";
4431 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4CA>;
4437 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4439 #address-cells = <3>;
4440 #size-cells = <2>;
4442 num-lanes = <4>;
4443 num-viewport = <8>;
4444 linux,pci-domain = <8>;
4447 clock-names = "core";
4451 reset-names = "apb", "core";
4455 interrupt-names = "intr", "msi";
4457 #interrupt-cells = <1>;
4458 interrupt-map-mask = <0 0 0 0>;
4459 interrupt-map = <0 0 0 0 &gic GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
4463 nvidia,aspm-cmrt-us = <60>;
4464 nvidia,aspm-pwr-on-t-us = <20>;
4465 nvidia,aspm-l0s-entrance-latency-us = <3>;
4467 bus-range = <0x0 0xff>;
4470 …<0x02000000 0x0 0x40000000 0x35 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4475 interconnect-names = "dma-mem", "write";
4476 iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE8 0x1000>;
4477 iommu-map-mask = <0x0>;
4478 dma-coherent;
4484 compatible = "nvidia,tegra234-pcie";
4485 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4CB>;
4491 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4493 #address-cells = <3>;
4494 #size-cells = <2>;
4496 num-lanes = <4>;
4497 num-viewport = <8>;
4498 linux,pci-domain = <9>;
4501 clock-names = "core";
4505 reset-names = "apb", "core";
4509 interrupt-names = "intr", "msi";
4511 #interrupt-cells = <1>;
4512 interrupt-map-mask = <0 0 0 0>;
4513 interrupt-map = <0 0 0 0 &gic GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
4517 nvidia,aspm-cmrt-us = <60>;
4518 nvidia,aspm-pwr-on-t-us = <20>;
4519 nvidia,aspm-l0s-entrance-latency-us = <3>;
4521 bus-range = <0x0 0xff>;
4524 …<0x02000000 0x0 0x40000000 0x38 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4529 interconnect-names = "dma-mem", "write";
4530 iommu-map = <0x0 &smmu_niso0 TEGRA234_SID_PCIE9 0x1000>;
4531 iommu-map-mask = <0x0>;
4532 dma-coherent;
4538 compatible = "nvidia,tegra234-pcie";
4539 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4CC>;
4545 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4547 #address-cells = <3>;
4548 #size-cells = <2>;
4550 num-lanes = <4>;
4551 num-viewport = <8>;
4552 linux,pci-domain = <10>;
4555 clock-names = "core";
4559 reset-names = "apb", "core";
4563 interrupt-names = "intr", "msi";
4565 #interrupt-cells = <1>;
4566 interrupt-map-mask = <0 0 0 0>;
4567 interrupt-map = <0 0 0 0 &gic GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
4571 nvidia,aspm-cmrt-us = <60>;
4572 nvidia,aspm-pwr-on-t-us = <20>;
4573 nvidia,aspm-l0s-entrance-latency-us = <3>;
4575 bus-range = <0x0 0xff>;
4578 …<0x02000000 0x0 0x40000000 0x3b 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4583 interconnect-names = "dma-mem", "write";
4584 iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE10 0x1000>;
4585 iommu-map-mask = <0x0>;
4586 dma-coherent;
4591 pcie-ep@140e0000 {
4592 compatible = "nvidia,tegra234-pcie-ep";
4593 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4CC>;
4598 reg-names = "appl", "atu_dma", "dbi", "addr_space";
4600 num-lanes = <4>;
4603 clock-names = "core";
4607 reset-names = "apb", "core";
4610 interrupt-names = "intr";
4614 nvidia,enable-ext-refclk;
4615 nvidia,aspm-cmrt-us = <60>;
4616 nvidia,aspm-pwr-on-t-us = <20>;
4617 nvidia,aspm-l0s-entrance-latency-us = <3>;
4621 interconnect-names = "dma-mem", "write";
4622 iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE10 0x1000>;
4623 iommu-map-mask = <0x0>;
4624 dma-coherent;
4630 compatible = "nvidia,tegra234-pcie";
4631 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX1A>;
4637 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4639 #address-cells = <3>;
4640 #size-cells = <2>;
4642 num-lanes = <1>;
4643 num-viewport = <8>;
4644 linux,pci-domain = <1>;
4647 clock-names = "core";
4651 reset-names = "apb", "core";
4655 interrupt-names = "intr", "msi";
4657 #interrupt-cells = <1>;
4658 interrupt-map-mask = <0 0 0 0>;
4659 interrupt-map = <0 0 0 0 &gic GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
4663 nvidia,aspm-cmrt-us = <60>;
4664 nvidia,aspm-pwr-on-t-us = <20>;
4665 nvidia,aspm-l0s-entrance-latency-us = <3>;
4667 bus-range = <0x0 0xff>;
4670 …<0x02000000 0x0 0x40000000 0x20 0xa8000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4675 interconnect-names = "dma-mem", "write";
4676 iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE1 0x1000>;
4677 iommu-map-mask = <0x0>;
4678 dma-coherent;
4684 compatible = "nvidia,tegra234-pcie";
4685 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX1A>;
4691 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4693 #address-cells = <3>;
4694 #size-cells = <2>;
4696 num-lanes = <1>;
4697 num-viewport = <8>;
4698 linux,pci-domain = <2>;
4701 clock-names = "core";
4705 reset-names = "apb", "core";
4709 interrupt-names = "intr", "msi";
4711 #interrupt-cells = <1>;
4712 interrupt-map-mask = <0 0 0 0>;
4713 interrupt-map = <0 0 0 0 &gic GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
4717 nvidia,aspm-cmrt-us = <60>;
4718 nvidia,aspm-pwr-on-t-us = <20>;
4719 nvidia,aspm-l0s-entrance-latency-us = <3>;
4721 bus-range = <0x0 0xff>;
4724 …<0x02000000 0x0 0x40000000 0x20 0xe8000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4729 interconnect-names = "dma-mem", "write";
4730 iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE2 0x1000>;
4731 iommu-map-mask = <0x0>;
4732 dma-coherent;
4738 compatible = "nvidia,tegra234-pcie";
4739 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX1A>;
4745 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4747 #address-cells = <3>;
4748 #size-cells = <2>;
4750 num-lanes = <1>;
4751 num-viewport = <8>;
4752 linux,pci-domain = <3>;
4755 clock-names = "core";
4759 reset-names = "apb", "core";
4763 interrupt-names = "intr", "msi";
4765 #interrupt-cells = <1>;
4766 interrupt-map-mask = <0 0 0 0>;
4767 interrupt-map = <0 0 0 0 &gic GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
4771 nvidia,aspm-cmrt-us = <60>;
4772 nvidia,aspm-pwr-on-t-us = <20>;
4773 nvidia,aspm-l0s-entrance-latency-us = <3>;
4775 bus-range = <0x0 0xff>;
4778 …<0x02000000 0x0 0x40000000 0x21 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4783 interconnect-names = "dma-mem", "write";
4784 iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE3 0x1000>;
4785 iommu-map-mask = <0x0>;
4786 dma-coherent;
4792 compatible = "nvidia,tegra234-pcie";
4793 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4BB>;
4799 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4801 #address-cells = <3>;
4802 #size-cells = <2>;
4804 num-lanes = <4>;
4805 num-viewport = <8>;
4806 linux,pci-domain = <4>;
4809 clock-names = "core";
4813 reset-names = "apb", "core";
4817 interrupt-names = "intr", "msi";
4819 #interrupt-cells = <1>;
4820 interrupt-map-mask = <0 0 0 0>;
4821 interrupt-map = <0 0 0 0 &gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
4825 nvidia,aspm-cmrt-us = <60>;
4826 nvidia,aspm-pwr-on-t-us = <20>;
4827 nvidia,aspm-l0s-entrance-latency-us = <3>;
4829 bus-range = <0x0 0xff>;
4832 …<0x02000000 0x0 0x40000000 0x24 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4837 interconnect-names = "dma-mem", "write";
4838 iommu-map = <0x0 &smmu_niso0 TEGRA234_SID_PCIE4 0x1000>;
4839 iommu-map-mask = <0x0>;
4840 dma-coherent;
4845 pcie-ep@14160000 {
4846 compatible = "nvidia,tegra234-pcie-ep";
4847 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4BB>;
4852 reg-names = "appl", "atu_dma", "dbi", "addr_space";
4853 num-lanes = <4>;
4855 clock-names = "core";
4858 reset-names = "apb", "core";
4861 interrupt-names = "intr";
4863 nvidia,enable-ext-refclk;
4864 nvidia,aspm-cmrt-us = <60>;
4865 nvidia,aspm-pwr-on-t-us = <20>;
4866 nvidia,aspm-l0s-entrance-latency-us = <3>;
4870 interconnect-names = "dma-mem", "write";
4872 dma-coherent;
4877 compatible = "nvidia,tegra234-pcie";
4878 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4BA>;
4884 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4886 #address-cells = <3>;
4887 #size-cells = <2>;
4889 num-lanes = <4>;
4890 num-viewport = <8>;
4891 linux,pci-domain = <0>;
4894 clock-names = "core";
4898 reset-names = "apb", "core";
4902 interrupt-names = "intr", "msi";
4904 #interrupt-cells = <1>;
4905 interrupt-map-mask = <0 0 0 0>;
4906 interrupt-map = <0 0 0 0 &gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
4910 nvidia,aspm-cmrt-us = <60>;
4911 nvidia,aspm-pwr-on-t-us = <20>;
4912 nvidia,aspm-l0s-entrance-latency-us = <3>;
4914 bus-range = <0x0 0xff>;
4917 …<0x02000000 0x0 0x40000000 0x27 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4922 interconnect-names = "dma-mem", "write";
4923 iommu-map = <0x0 &smmu_niso0 TEGRA234_SID_PCIE0 0x1000>;
4924 iommu-map-mask = <0x0>;
4925 dma-coherent;
4931 compatible = "nvidia,tegra234-pcie";
4932 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX8A>;
4938 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
4940 #address-cells = <3>;
4941 #size-cells = <2>;
4943 num-lanes = <8>;
4944 num-viewport = <8>;
4945 linux,pci-domain = <5>;
4948 clock-names = "core";
4952 reset-names = "apb", "core";
4956 interrupt-names = "intr", "msi";
4958 #interrupt-cells = <1>;
4959 interrupt-map-mask = <0 0 0 0>;
4960 interrupt-map = <0 0 0 0 &gic GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
4964 nvidia,aspm-cmrt-us = <60>;
4965 nvidia,aspm-pwr-on-t-us = <20>;
4966 nvidia,aspm-l0s-entrance-latency-us = <3>;
4968 bus-range = <0x0 0xff>;
4971 …<0x02000000 0x0 0x40000000 0x2b 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4976 interconnect-names = "dma-mem", "write";
4977 iommu-map = <0x0 &smmu_niso0 TEGRA234_SID_PCIE5 0x1000>;
4978 iommu-map-mask = <0x0>;
4979 dma-coherent;
4984 pcie-ep@141a0000 {
4985 compatible = "nvidia,tegra234-pcie-ep";
4986 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX8A>;
4991 reg-names = "appl", "atu_dma", "dbi", "addr_space";
4993 num-lanes = <8>;
4996 clock-names = "core";
5000 reset-names = "apb", "core";
5003 interrupt-names = "intr";
5007 nvidia,enable-ext-refclk;
5008 nvidia,aspm-cmrt-us = <60>;
5009 nvidia,aspm-pwr-on-t-us = <20>;
5010 nvidia,aspm-l0s-entrance-latency-us = <3>;
5014 interconnect-names = "dma-mem", "write";
5015 iommu-map = <0x0 &smmu_niso0 TEGRA234_SID_PCIE5 0x1000>;
5016 iommu-map-mask = <0x0>;
5017 dma-coherent;
5023 compatible = "nvidia,tegra234-pcie";
5024 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4A>;
5030 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
5032 #address-cells = <3>;
5033 #size-cells = <2>;
5035 num-lanes = <4>;
5036 num-viewport = <8>;
5037 linux,pci-domain = <6>;
5040 clock-names = "core";
5044 reset-names = "apb", "core";
5048 interrupt-names = "intr", "msi";
5050 #interrupt-cells = <1>;
5051 interrupt-map-mask = <0 0 0 0>;
5052 interrupt-map = <0 0 0 0 &gic GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
5056 nvidia,aspm-cmrt-us = <60>;
5057 nvidia,aspm-pwr-on-t-us = <20>;
5058 nvidia,aspm-l0s-entrance-latency-us = <3>;
5060 bus-range = <0x0 0xff>;
5063 …<0x02000000 0x0 0x40000000 0x2e 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
5068 interconnect-names = "dma-mem", "write";
5069 iommu-map = <0x0 &smmu_niso0 TEGRA234_SID_PCIE6 0x1000>;
5070 iommu-map-mask = <0x0>;
5071 dma-coherent;
5076 pcie-ep@141c0000 {
5077 compatible = "nvidia,tegra234-pcie-ep";
5078 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX4A>;
5083 reg-names = "appl", "atu_dma", "dbi", "addr_space";
5085 num-lanes = <4>;
5088 clock-names = "core";
5092 reset-names = "apb", "core";
5095 interrupt-names = "intr";
5099 nvidia,enable-ext-refclk;
5100 nvidia,aspm-cmrt-us = <60>;
5101 nvidia,aspm-pwr-on-t-us = <20>;
5102 nvidia,aspm-l0s-entrance-latency-us = <3>;
5106 interconnect-names = "dma-mem", "write";
5107 iommu-map = <0x0 &smmu_niso0 TEGRA234_SID_PCIE6 0x1000>;
5108 iommu-map-mask = <0x0>;
5109 dma-coherent;
5115 compatible = "nvidia,tegra234-pcie";
5116 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX8B>;
5122 reg-names = "appl", "config", "atu_dma", "dbi", "ecam";
5124 #address-cells = <3>;
5125 #size-cells = <2>;
5127 num-lanes = <8>;
5128 num-viewport = <8>;
5129 linux,pci-domain = <7>;
5132 clock-names = "core";
5136 reset-names = "apb", "core";
5140 interrupt-names = "intr", "msi";
5142 #interrupt-cells = <1>;
5143 interrupt-map-mask = <0 0 0 0>;
5144 interrupt-map = <0 0 0 0 &gic GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
5148 nvidia,aspm-cmrt-us = <60>;
5149 nvidia,aspm-pwr-on-t-us = <20>;
5150 nvidia,aspm-l0s-entrance-latency-us = <3>;
5152 bus-range = <0x0 0xff>;
5155 …<0x02000000 0x0 0x40000000 0x32 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
5160 interconnect-names = "dma-mem", "write";
5161 iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE7 0x1000>;
5162 iommu-map-mask = <0x0>;
5163 dma-coherent;
5168 pcie-ep@141e0000 {
5169 compatible = "nvidia,tegra234-pcie-ep";
5170 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX8B>;
5175 reg-names = "appl", "atu_dma", "dbi", "addr_space";
5177 num-lanes = <8>;
5180 clock-names = "core";
5184 reset-names = "apb", "core";
5187 interrupt-names = "intr";
5191 nvidia,enable-ext-refclk;
5192 nvidia,aspm-cmrt-us = <60>;
5193 nvidia,aspm-pwr-on-t-us = <20>;
5194 nvidia,aspm-l0s-entrance-latency-us = <3>;
5198 interconnect-names = "dma-mem", "write";
5199 iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE7 0x1000>;
5200 iommu-map-mask = <0x0>;
5201 dma-coherent;
5208 compatible = "nvidia,tegra234-sysram", "mmio-sram";
5211 #address-cells = <1>;
5212 #size-cells = <1>;
5215 no-memory-wc;
5219 label = "cpu-bpmp-tx";
5225 label = "cpu-bpmp-rx";
5231 compatible = "nvidia,tegra234-bpmp", "nvidia,tegra186-bpmp";
5235 #clock-cells = <1>;
5236 #reset-cells = <1>;
5237 #power-domain-cells = <1>;
5242 interconnect-names = "read", "write", "dma-mem", "dma-write";
5246 compatible = "nvidia,tegra186-bpmp-i2c";
5247 nvidia,bpmp-bus-id = <5>;
5248 #address-cells = <1>;
5249 #size-cells = <0>;
5253 compatible = "nvidia,tegra186-bpmp-thermal";
5254 #thermal-sensor-cells = <1>;
5259 #address-cells = <1>;
5260 #size-cells = <0>;
5263 compatible = "arm,cortex-a78";
5267 enable-method = "psci";
5269 operating-points-v2 = <&cl0_opp_tbl>;
5272 i-cache-size = <65536>;
5273 i-cache-line-size = <64>;
5274 i-cache-sets = <256>;
5275 d-cache-size = <65536>;
5276 d-cache-line-size = <64>;
5277 d-cache-sets = <256>;
5278 next-level-cache = <&l2c0_0>;
5282 compatible = "arm,cortex-a78";
5286 enable-method = "psci";
5288 operating-points-v2 = <&cl0_opp_tbl>;
5291 i-cache-size = <65536>;
5292 i-cache-line-size = <64>;
5293 i-cache-sets = <256>;
5294 d-cache-size = <65536>;
5295 d-cache-line-size = <64>;
5296 d-cache-sets = <256>;
5297 next-level-cache = <&l2c0_1>;
5301 compatible = "arm,cortex-a78";
5305 enable-method = "psci";
5307 operating-points-v2 = <&cl0_opp_tbl>;
5310 i-cache-size = <65536>;
5311 i-cache-line-size = <64>;
5312 i-cache-sets = <256>;
5313 d-cache-size = <65536>;
5314 d-cache-line-size = <64>;
5315 d-cache-sets = <256>;
5316 next-level-cache = <&l2c0_2>;
5320 compatible = "arm,cortex-a78";
5324 enable-method = "psci";
5326 operating-points-v2 = <&cl0_opp_tbl>;
5329 i-cache-size = <65536>;
5330 i-cache-line-size = <64>;
5331 i-cache-sets = <256>;
5332 d-cache-size = <65536>;
5333 d-cache-line-size = <64>;
5334 d-cache-sets = <256>;
5335 next-level-cache = <&l2c0_3>;
5339 compatible = "arm,cortex-a78";
5343 enable-method = "psci";
5345 operating-points-v2 = <&cl1_opp_tbl>;
5348 i-cache-size = <65536>;
5349 i-cache-line-size = <64>;
5350 i-cache-sets = <256>;
5351 d-cache-size = <65536>;
5352 d-cache-line-size = <64>;
5353 d-cache-sets = <256>;
5354 next-level-cache = <&l2c1_0>;
5358 compatible = "arm,cortex-a78";
5362 enable-method = "psci";
5364 operating-points-v2 = <&cl1_opp_tbl>;
5367 i-cache-size = <65536>;
5368 i-cache-line-size = <64>;
5369 i-cache-sets = <256>;
5370 d-cache-size = <65536>;
5371 d-cache-line-size = <64>;
5372 d-cache-sets = <256>;
5373 next-level-cache = <&l2c1_1>;
5377 compatible = "arm,cortex-a78";
5381 enable-method = "psci";
5383 operating-points-v2 = <&cl1_opp_tbl>;
5386 i-cache-size = <65536>;
5387 i-cache-line-size = <64>;
5388 i-cache-sets = <256>;
5389 d-cache-size = <65536>;
5390 d-cache-line-size = <64>;
5391 d-cache-sets = <256>;
5392 next-level-cache = <&l2c1_2>;
5396 compatible = "arm,cortex-a78";
5400 enable-method = "psci";
5402 operating-points-v2 = <&cl1_opp_tbl>;
5405 i-cache-size = <65536>;
5406 i-cache-line-size = <64>;
5407 i-cache-sets = <256>;
5408 d-cache-size = <65536>;
5409 d-cache-line-size = <64>;
5410 d-cache-sets = <256>;
5411 next-level-cache = <&l2c1_3>;
5415 compatible = "arm,cortex-a78";
5419 enable-method = "psci";
5421 operating-points-v2 = <&cl2_opp_tbl>;
5424 i-cache-size = <65536>;
5425 i-cache-line-size = <64>;
5426 i-cache-sets = <256>;
5427 d-cache-size = <65536>;
5428 d-cache-line-size = <64>;
5429 d-cache-sets = <256>;
5430 next-level-cache = <&l2c2_0>;
5434 compatible = "arm,cortex-a78";
5438 enable-method = "psci";
5440 operating-points-v2 = <&cl2_opp_tbl>;
5443 i-cache-size = <65536>;
5444 i-cache-line-size = <64>;
5445 i-cache-sets = <256>;
5446 d-cache-size = <65536>;
5447 d-cache-line-size = <64>;
5448 d-cache-sets = <256>;
5449 next-level-cache = <&l2c2_1>;
5453 compatible = "arm,cortex-a78";
5457 enable-method = "psci";
5459 operating-points-v2 = <&cl2_opp_tbl>;
5462 i-cache-size = <65536>;
5463 i-cache-line-size = <64>;
5464 i-cache-sets = <256>;
5465 d-cache-size = <65536>;
5466 d-cache-line-size = <64>;
5467 d-cache-sets = <256>;
5468 next-level-cache = <&l2c2_2>;
5472 compatible = "arm,cortex-a78";
5476 enable-method = "psci";
5478 operating-points-v2 = <&cl2_opp_tbl>;
5481 i-cache-size = <65536>;
5482 i-cache-line-size = <64>;
5483 i-cache-sets = <256>;
5484 d-cache-size = <65536>;
5485 d-cache-line-size = <64>;
5486 d-cache-sets = <256>;
5487 next-level-cache = <&l2c2_3>;
5490 cpu-map {
5546 l2c0_0: l2-cache00 {
5548 cache-size = <262144>;
5549 cache-line-size = <64>;
5550 cache-sets = <512>;
5551 cache-unified;
5552 cache-level = <2>;
5553 next-level-cache = <&l3c0>;
5556 l2c0_1: l2-cache01 {
5558 cache-size = <262144>;
5559 cache-line-size = <64>;
5560 cache-sets = <512>;
5561 cache-unified;
5562 cache-level = <2>;
5563 next-level-cache = <&l3c0>;
5566 l2c0_2: l2-cache02 {
5568 cache-size = <262144>;
5569 cache-line-size = <64>;
5570 cache-sets = <512>;
5571 cache-unified;
5572 cache-level = <2>;
5573 next-level-cache = <&l3c0>;
5576 l2c0_3: l2-cache03 {
5578 cache-size = <262144>;
5579 cache-line-size = <64>;
5580 cache-sets = <512>;
5581 cache-unified;
5582 cache-level = <2>;
5583 next-level-cache = <&l3c0>;
5586 l2c1_0: l2-cache10 {
5588 cache-size = <262144>;
5589 cache-line-size = <64>;
5590 cache-sets = <512>;
5591 cache-unified;
5592 cache-level = <2>;
5593 next-level-cache = <&l3c1>;
5596 l2c1_1: l2-cache11 {
5598 cache-size = <262144>;
5599 cache-line-size = <64>;
5600 cache-sets = <512>;
5601 cache-unified;
5602 cache-level = <2>;
5603 next-level-cache = <&l3c1>;
5606 l2c1_2: l2-cache12 {
5608 cache-size = <262144>;
5609 cache-line-size = <64>;
5610 cache-sets = <512>;
5611 cache-unified;
5612 cache-level = <2>;
5613 next-level-cache = <&l3c1>;
5616 l2c1_3: l2-cache13 {
5618 cache-size = <262144>;
5619 cache-line-size = <64>;
5620 cache-sets = <512>;
5621 cache-unified;
5622 cache-level = <2>;
5623 next-level-cache = <&l3c1>;
5626 l2c2_0: l2-cache20 {
5628 cache-size = <262144>;
5629 cache-line-size = <64>;
5630 cache-sets = <512>;
5631 cache-unified;
5632 cache-level = <2>;
5633 next-level-cache = <&l3c2>;
5636 l2c2_1: l2-cache21 {
5638 cache-size = <262144>;
5639 cache-line-size = <64>;
5640 cache-sets = <512>;
5641 cache-unified;
5642 cache-level = <2>;
5643 next-level-cache = <&l3c2>;
5646 l2c2_2: l2-cache22 {
5648 cache-size = <262144>;
5649 cache-line-size = <64>;
5650 cache-sets = <512>;
5651 cache-unified;
5652 cache-level = <2>;
5653 next-level-cache = <&l3c2>;
5656 l2c2_3: l2-cache23 {
5658 cache-size = <262144>;
5659 cache-line-size = <64>;
5660 cache-sets = <512>;
5661 cache-unified;
5662 cache-level = <2>;
5663 next-level-cache = <&l3c2>;
5666 l3c0: l3-cache0 {
5668 cache-unified;
5669 cache-size = <2097152>;
5670 cache-line-size = <64>;
5671 cache-sets = <2048>;
5672 cache-level = <3>;
5675 l3c1: l3-cache1 {
5677 cache-unified;
5678 cache-size = <2097152>;
5679 cache-line-size = <64>;
5680 cache-sets = <2048>;
5681 cache-level = <3>;
5684 l3c2: l3-cache2 {
5686 cache-unified;
5687 cache-size = <2097152>;
5688 cache-line-size = <64>;
5689 cache-sets = <2048>;
5690 cache-level = <3>;
5694 dsu-pmu0 {
5695 compatible = "arm,dsu-pmu";
5700 dsu-pmu1 {
5701 compatible = "arm,dsu-pmu";
5706 dsu-pmu2 {
5707 compatible = "arm,dsu-pmu";
5713 compatible = "arm,cortex-a78-pmu";
5719 compatible = "arm,psci-1.0";
5725 compatible = "nvidia,tegra234-tcu", "nvidia,tegra194-tcu";
5728 mbox-names = "rx", "tx";
5737 clock-names = "pll_a", "plla_out0";
5738 assigned-clocks = <&bpmp TEGRA234_CLK_PLLA>,
5741 assigned-clock-parents = <0>,
5746 thermal-zones {
5747 cpu-thermal {
5748 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CPU>;
5752 gpu-thermal {
5753 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_GPU>;
5757 cv0-thermal {
5758 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV0>;
5762 cv1-thermal {
5763 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV1>;
5767 cv2-thermal {
5768 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV2>;
5772 soc0-thermal {
5773 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC0>;
5777 soc1-thermal {
5778 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC1>;
5782 soc2-thermal {
5783 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC2>;
5787 tj-thermal {
5788 thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX>;
5794 compatible = "arm,armv8-timer";
5799 interrupt-parent = <&gic>;
5800 always-on;
5803 cl0_opp_tbl: opp-table-cluster0 {
5804 compatible = "operating-points-v2";
5805 opp-shared;
5807 cl0_ch1_opp1: opp-115200000 {
5808 opp-hz = /bits/ 64 <115200000>;
5809 opp-peak-kBps = <816000>;
5812 cl0_ch1_opp2: opp-192000000 {
5813 opp-hz = /bits/ 64 <192000000>;
5814 opp-peak-kBps = <816000>;
5817 cl0_ch1_opp3: opp-268800000 {
5818 opp-hz = /bits/ 64 <268800000>;
5819 opp-peak-kBps = <816000>;
5822 cl0_ch1_opp4: opp-345600000 {
5823 opp-hz = /bits/ 64 <345600000>;
5824 opp-peak-kBps = <816000>;
5827 cl0_ch1_opp5: opp-422400000 {
5828 opp-hz = /bits/ 64 <422400000>;
5829 opp-peak-kBps = <816000>;
5832 cl0_ch1_opp6: opp-499200000 {
5833 opp-hz = /bits/ 64 <499200000>;
5834 opp-peak-kBps = <816000>;
5837 cl0_ch1_opp7: opp-576000000 {
5838 opp-hz = /bits/ 64 <576000000>;
5839 opp-peak-kBps = <816000>;
5842 cl0_ch1_opp8: opp-652800000 {
5843 opp-hz = /bits/ 64 <652800000>;
5844 opp-peak-kBps = <816000>;
5847 cl0_ch1_opp9: opp-729600000 {
5848 opp-hz = /bits/ 64 <729600000>;
5849 opp-peak-kBps = <816000>;
5852 cl0_ch1_opp10: opp-806400000 {
5853 opp-hz = /bits/ 64 <806400000>;
5854 opp-peak-kBps = <816000>;
5857 cl0_ch1_opp11: opp-883200000 {
5858 opp-hz = /bits/ 64 <883200000>;
5859 opp-peak-kBps = <816000>;
5862 cl0_ch1_opp12: opp-960000000 {
5863 opp-hz = /bits/ 64 <960000000>;
5864 opp-peak-kBps = <816000>;
5867 cl0_ch1_opp13: opp-1036800000 {
5868 opp-hz = /bits/ 64 <1036800000>;
5869 opp-peak-kBps = <816000>;
5872 cl0_ch1_opp14: opp-1113600000 {
5873 opp-hz = /bits/ 64 <1113600000>;
5874 opp-peak-kBps = <1632000>;
5877 cl0_ch1_opp15: opp-1190400000 {
5878 opp-hz = /bits/ 64 <1190400000>;
5879 opp-peak-kBps = <1632000>;
5882 cl0_ch1_opp16: opp-1267200000 {
5883 opp-hz = /bits/ 64 <1267200000>;
5884 opp-peak-kBps = <1632000>;
5887 cl0_ch1_opp17: opp-1344000000 {
5888 opp-hz = /bits/ 64 <1344000000>;
5889 opp-peak-kBps = <1632000>;
5892 cl0_ch1_opp18: opp-1420800000 {
5893 opp-hz = /bits/ 64 <1420800000>;
5894 opp-peak-kBps = <1632000>;
5897 cl0_ch1_opp19: opp-1497600000 {
5898 opp-hz = /bits/ 64 <1497600000>;
5899 opp-peak-kBps = <3200000>;
5902 cl0_ch1_opp20: opp-1574400000 {
5903 opp-hz = /bits/ 64 <1574400000>;
5904 opp-peak-kBps = <3200000>;
5907 cl0_ch1_opp21: opp-1651200000 {
5908 opp-hz = /bits/ 64 <1651200000>;
5909 opp-peak-kBps = <3200000>;
5912 cl0_ch1_opp22: opp-1728000000 {
5913 opp-hz = /bits/ 64 <1728000000>;
5914 opp-peak-kBps = <3200000>;
5917 cl0_ch1_opp23: opp-1804800000 {
5918 opp-hz = /bits/ 64 <1804800000>;
5919 opp-peak-kBps = <3200000>;
5922 cl0_ch1_opp24: opp-1881600000 {
5923 opp-hz = /bits/ 64 <1881600000>;
5924 opp-peak-kBps = <3200000>;
5927 cl0_ch1_opp25: opp-1958400000 {
5928 opp-hz = /bits/ 64 <1958400000>;
5929 opp-peak-kBps = <3200000>;
5932 cl0_ch1_opp26: opp-2035200000 {
5933 opp-hz = /bits/ 64 <2035200000>;
5934 opp-peak-kBps = <3200000>;
5937 cl0_ch1_opp27: opp-2112000000 {
5938 opp-hz = /bits/ 64 <2112000000>;
5939 opp-peak-kBps = <6400000>;
5942 cl0_ch1_opp28: opp-2188800000 {
5943 opp-hz = /bits/ 64 <2188800000>;
5944 opp-peak-kBps = <6400000>;
5947 cl0_ch1_opp29: opp-2201600000 {
5948 opp-hz = /bits/ 64 <2201600000>;
5949 opp-peak-kBps = <6400000>;
5953 cl1_opp_tbl: opp-table-cluster1 {
5954 compatible = "operating-points-v2";
5955 opp-shared;
5957 cl1_ch1_opp1: opp-115200000 {
5958 opp-hz = /bits/ 64 <115200000>;
5959 opp-peak-kBps = <816000>;
5962 cl1_ch1_opp2: opp-192000000 {
5963 opp-hz = /bits/ 64 <192000000>;
5964 opp-peak-kBps = <816000>;
5967 cl1_ch1_opp3: opp-268800000 {
5968 opp-hz = /bits/ 64 <268800000>;
5969 opp-peak-kBps = <816000>;
5972 cl1_ch1_opp4: opp-345600000 {
5973 opp-hz = /bits/ 64 <345600000>;
5974 opp-peak-kBps = <816000>;
5977 cl1_ch1_opp5: opp-422400000 {
5978 opp-hz = /bits/ 64 <422400000>;
5979 opp-peak-kBps = <816000>;
5982 cl1_ch1_opp6: opp-499200000 {
5983 opp-hz = /bits/ 64 <499200000>;
5984 opp-peak-kBps = <816000>;
5987 cl1_ch1_opp7: opp-576000000 {
5988 opp-hz = /bits/ 64 <576000000>;
5989 opp-peak-kBps = <816000>;
5992 cl1_ch1_opp8: opp-652800000 {
5993 opp-hz = /bits/ 64 <652800000>;
5994 opp-peak-kBps = <816000>;
5997 cl1_ch1_opp9: opp-729600000 {
5998 opp-hz = /bits/ 64 <729600000>;
5999 opp-peak-kBps = <816000>;
6002 cl1_ch1_opp10: opp-806400000 {
6003 opp-hz = /bits/ 64 <806400000>;
6004 opp-peak-kBps = <816000>;
6007 cl1_ch1_opp11: opp-883200000 {
6008 opp-hz = /bits/ 64 <883200000>;
6009 opp-peak-kBps = <816000>;
6012 cl1_ch1_opp12: opp-960000000 {
6013 opp-hz = /bits/ 64 <960000000>;
6014 opp-peak-kBps = <816000>;
6017 cl1_ch1_opp13: opp-1036800000 {
6018 opp-hz = /bits/ 64 <1036800000>;
6019 opp-peak-kBps = <816000>;
6022 cl1_ch1_opp14: opp-1113600000 {
6023 opp-hz = /bits/ 64 <1113600000>;
6024 opp-peak-kBps = <1632000>;
6027 cl1_ch1_opp15: opp-1190400000 {
6028 opp-hz = /bits/ 64 <1190400000>;
6029 opp-peak-kBps = <1632000>;
6032 cl1_ch1_opp16: opp-1267200000 {
6033 opp-hz = /bits/ 64 <1267200000>;
6034 opp-peak-kBps = <1632000>;
6037 cl1_ch1_opp17: opp-1344000000 {
6038 opp-hz = /bits/ 64 <1344000000>;
6039 opp-peak-kBps = <1632000>;
6042 cl1_ch1_opp18: opp-1420800000 {
6043 opp-hz = /bits/ 64 <1420800000>;
6044 opp-peak-kBps = <1632000>;
6047 cl1_ch1_opp19: opp-1497600000 {
6048 opp-hz = /bits/ 64 <1497600000>;
6049 opp-peak-kBps = <3200000>;
6052 cl1_ch1_opp20: opp-1574400000 {
6053 opp-hz = /bits/ 64 <1574400000>;
6054 opp-peak-kBps = <3200000>;
6057 cl1_ch1_opp21: opp-1651200000 {
6058 opp-hz = /bits/ 64 <1651200000>;
6059 opp-peak-kBps = <3200000>;
6062 cl1_ch1_opp22: opp-1728000000 {
6063 opp-hz = /bits/ 64 <1728000000>;
6064 opp-peak-kBps = <3200000>;
6067 cl1_ch1_opp23: opp-1804800000 {
6068 opp-hz = /bits/ 64 <1804800000>;
6069 opp-peak-kBps = <3200000>;
6072 cl1_ch1_opp24: opp-1881600000 {
6073 opp-hz = /bits/ 64 <1881600000>;
6074 opp-peak-kBps = <3200000>;
6077 cl1_ch1_opp25: opp-1958400000 {
6078 opp-hz = /bits/ 64 <1958400000>;
6079 opp-peak-kBps = <3200000>;
6082 cl1_ch1_opp26: opp-2035200000 {
6083 opp-hz = /bits/ 64 <2035200000>;
6084 opp-peak-kBps = <3200000>;
6087 cl1_ch1_opp27: opp-2112000000 {
6088 opp-hz = /bits/ 64 <2112000000>;
6089 opp-peak-kBps = <6400000>;
6092 cl1_ch1_opp28: opp-2188800000 {
6093 opp-hz = /bits/ 64 <2188800000>;
6094 opp-peak-kBps = <6400000>;
6097 cl1_ch1_opp29: opp-2201600000 {
6098 opp-hz = /bits/ 64 <2201600000>;
6099 opp-peak-kBps = <6400000>;
6103 cl2_opp_tbl: opp-table-cluster2 {
6104 compatible = "operating-points-v2";
6105 opp-shared;
6107 cl2_ch1_opp1: opp-115200000 {
6108 opp-hz = /bits/ 64 <115200000>;
6109 opp-peak-kBps = <816000>;
6112 cl2_ch1_opp2: opp-192000000 {
6113 opp-hz = /bits/ 64 <192000000>;
6114 opp-peak-kBps = <816000>;
6117 cl2_ch1_opp3: opp-268800000 {
6118 opp-hz = /bits/ 64 <268800000>;
6119 opp-peak-kBps = <816000>;
6122 cl2_ch1_opp4: opp-345600000 {
6123 opp-hz = /bits/ 64 <345600000>;
6124 opp-peak-kBps = <816000>;
6127 cl2_ch1_opp5: opp-422400000 {
6128 opp-hz = /bits/ 64 <422400000>;
6129 opp-peak-kBps = <816000>;
6132 cl2_ch1_opp6: opp-499200000 {
6133 opp-hz = /bits/ 64 <499200000>;
6134 opp-peak-kBps = <816000>;
6137 cl2_ch1_opp7: opp-576000000 {
6138 opp-hz = /bits/ 64 <576000000>;
6139 opp-peak-kBps = <816000>;
6142 cl2_ch1_opp8: opp-652800000 {
6143 opp-hz = /bits/ 64 <652800000>;
6144 opp-peak-kBps = <816000>;
6147 cl2_ch1_opp9: opp-729600000 {
6148 opp-hz = /bits/ 64 <729600000>;
6149 opp-peak-kBps = <816000>;
6152 cl2_ch1_opp10: opp-806400000 {
6153 opp-hz = /bits/ 64 <806400000>;
6154 opp-peak-kBps = <816000>;
6157 cl2_ch1_opp11: opp-883200000 {
6158 opp-hz = /bits/ 64 <883200000>;
6159 opp-peak-kBps = <816000>;
6162 cl2_ch1_opp12: opp-960000000 {
6163 opp-hz = /bits/ 64 <960000000>;
6164 opp-peak-kBps = <816000>;
6167 cl2_ch1_opp13: opp-1036800000 {
6168 opp-hz = /bits/ 64 <1036800000>;
6169 opp-peak-kBps = <816000>;
6172 cl2_ch1_opp14: opp-1113600000 {
6173 opp-hz = /bits/ 64 <1113600000>;
6174 opp-peak-kBps = <1632000>;
6177 cl2_ch1_opp15: opp-1190400000 {
6178 opp-hz = /bits/ 64 <1190400000>;
6179 opp-peak-kBps = <1632000>;
6182 cl2_ch1_opp16: opp-1267200000 {
6183 opp-hz = /bits/ 64 <1267200000>;
6184 opp-peak-kBps = <1632000>;
6187 cl2_ch1_opp17: opp-1344000000 {
6188 opp-hz = /bits/ 64 <1344000000>;
6189 opp-peak-kBps = <1632000>;
6192 cl2_ch1_opp18: opp-1420800000 {
6193 opp-hz = /bits/ 64 <1420800000>;
6194 opp-peak-kBps = <1632000>;
6197 cl2_ch1_opp19: opp-1497600000 {
6198 opp-hz = /bits/ 64 <1497600000>;
6199 opp-peak-kBps = <3200000>;
6202 cl2_ch1_opp20: opp-1574400000 {
6203 opp-hz = /bits/ 64 <1574400000>;
6204 opp-peak-kBps = <3200000>;
6207 cl2_ch1_opp21: opp-1651200000 {
6208 opp-hz = /bits/ 64 <1651200000>;
6209 opp-peak-kBps = <3200000>;
6212 cl2_ch1_opp22: opp-1728000000 {
6213 opp-hz = /bits/ 64 <1728000000>;
6214 opp-peak-kBps = <3200000>;
6217 cl2_ch1_opp23: opp-1804800000 {
6218 opp-hz = /bits/ 64 <1804800000>;
6219 opp-peak-kBps = <3200000>;
6222 cl2_ch1_opp24: opp-1881600000 {
6223 opp-hz = /bits/ 64 <1881600000>;
6224 opp-peak-kBps = <3200000>;
6227 cl2_ch1_opp25: opp-1958400000 {
6228 opp-hz = /bits/ 64 <1958400000>;
6229 opp-peak-kBps = <3200000>;
6232 cl2_ch1_opp26: opp-2035200000 {
6233 opp-hz = /bits/ 64 <2035200000>;
6234 opp-peak-kBps = <3200000>;
6237 cl2_ch1_opp27: opp-2112000000 {
6238 opp-hz = /bits/ 64 <2112000000>;
6239 opp-peak-kBps = <6400000>;
6242 cl2_ch1_opp28: opp-2188800000 {
6243 opp-hz = /bits/ 64 <2188800000>;
6244 opp-peak-kBps = <6400000>;
6247 cl2_ch1_opp29: opp-2201600000 {
6248 opp-hz = /bits/ 64 <2201600000>;
6249 opp-peak-kBps = <6400000>;