Lines Matching +full:2 +full:c60000

16 	#address-cells = <2>;
17 #size-cells = <2>;
22 #address-cells = <2>;
23 #size-cells = <2>;
38 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
108 #interrupt-cells = <2>;
110 #gpio-cells = <2>;
173 #address-cells = <2>;
174 #size-cells = <2>;
187 #address-cells = <2>;
188 #size-cells = <2>;
545 port@2 {
546 reg = <2>;
597 port@2 {
598 reg = <2>;
649 port@2 {
650 reg = <2>;
701 port@2 {
702 reg = <2>;
753 adx1_out2_port: port@2 {
754 reg = <2>;
805 adx2_out2_port: port@2 {
806 reg = <2>;
857 adx3_out2_port: port@2 {
858 reg = <2>;
909 adx4_out2_port: port@2 {
910 reg = <2>;
1146 #address-cells = <2>;
1147 #size-cells = <2>;
1268 port@2 {
1379 <&adma 2>, <&adma 2>,
1443 admaif2_port: port@2 {
1617 port@2 {
1738 port@2 {
2058 xbar_mvc2_in_port: port@2a {
2066 port@2b {
2074 xbar_amx1_in1_port: port@2c {
2082 xbar_amx1_in2_port: port@2d {
2090 xbar_amx1_in3_port: port@2e {
2098 xbar_amx1_in4_port: port@2f {
2643 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
2679 agic: interrupt-controller@2a40000 {
2695 mc: memory-controller@2c00000 {
2722 #address-cells = <2>;
2723 #size-cells = <2>;
2745 emc: external-memory-controller@2c60000 {
2961 #pwm-cells = <2>;
2971 #pwm-cells = <2>;
2981 #pwm-cells = <2>;
2991 #pwm-cells = <2>;
3001 #pwm-cells = <2>;
3011 #pwm-cells = <2>;
3021 #pwm-cells = <2>;
3149 usb2-2 {
3177 usb3-2 {
3201 usb2-2 {
3217 usb3-2 {
3317 #mbox-cells = <2>;
3807 #global-interrupts = <2>;
3840 #mbox-cells = <2>;
3928 #interrupt-cells = <2>;
3930 #gpio-cells = <2>;
3947 #pwm-cells = <2>;
3959 #interrupt-cells = <2>;
4298 #global-interrupts = <2>;
4332 #address-cells = <2>;
4333 #size-cells = <2>;
4344 <2 &smmu_niso0 TEGRA234_SID_HOST1X_CTX2 1>,
4440 #size-cells = <2>;
4494 #size-cells = <2>;
4548 #size-cells = <2>;
4640 #size-cells = <2>;
4694 #size-cells = <2>;
4698 linux,pci-domain = <2>;
4715 nvidia,bpmp = <&bpmp 2>;
4748 #size-cells = <2>;
4802 #size-cells = <2>;
4887 #size-cells = <2>;
4941 #size-cells = <2>;
5033 #size-cells = <2>;
5125 #size-cells = <2>;
5552 cache-level = <2>;
5562 cache-level = <2>;
5572 cache-level = <2>;
5582 cache-level = <2>;
5592 cache-level = <2>;
5602 cache-level = <2>;
5612 cache-level = <2>;
5622 cache-level = <2>;
5632 cache-level = <2>;
5642 cache-level = <2>;
5652 cache-level = <2>;
5662 cache-level = <2>;