Lines Matching +full:drive +full:- +full:open +full:- +full:source

1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
18 stdout-path = "serial0:115200n8";
27 vdd-supply = <&vdd_gpu>;
33 /delete-property/ dmas;
34 /delete-property/ dma-names;
39 /delete-property/ reg-shift;
41 compatible = "nvidia,tegra30-hsuart";
42 reset-names = "serial";
45 compatible = "brcm,bcm43540-bt";
46 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
47 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
48 interrupt-parent = <&gpio>;
50 interrupt-names = "host-wakeup";
57 tmp451: temperature-sensor@4c {
60 interrupt-parent = <&gpio>;
62 vcc-supply = <&vdd_1v8>;
63 #thermal-sensor-cells = <1>;
70 power-sensor@40 {
73 #address-cells = <1>;
74 #size-cells = <0>;
79 shunt-resistor-micro-ohms = <20000>;
85 shunt-resistor-micro-ohms = <10000>;
91 shunt-resistor-micro-ohms = <10000>;
105 vcc-supply = <&vdd_1v8>;
106 address-width = <8>;
109 read-only;
115 clock-frequency = <400000>;
120 interrupt-parent = <&tegra_pmc>;
123 #interrupt-cells = <2>;
124 interrupt-controller;
126 #gpio-cells = <2>;
127 gpio-controller;
129 pinctrl-names = "default";
130 pinctrl-0 = <&max77620_default>;
134 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
135 maxim,suspend-fps-time-period-us = <1280>;
139 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
140 maxim,suspend-fps-time-period-us = <1280>;
144 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
156 function = "fps-out";
157 drive-push-pull = <1>;
158 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
159 maxim,active-fps-power-up-slot = <7>;
160 maxim,active-fps-power-down-slot = <0>;
165 function = "fps-out";
166 drive-open-drain = <1>;
167 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
172 function = "32k-out1";
178 drive-push-pull = <1>;
183 in-ldo0-1-supply = <&vdd_pre>;
184 in-ldo7-8-supply = <&vdd_pre>;
185 in-sd3-supply = <&vdd_5v0_sys>;
188 regulator-name = "VDD_SOC";
189 regulator-min-microvolt = <600000>;
190 regulator-max-microvolt = <1400000>;
191 regulator-always-on;
192 regulator-boot-on;
194 regulator-enable-ramp-delay = <146>;
195 regulator-ramp-delay = <27500>;
197 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
201 regulator-name = "VDD_DDR_1V1_PMIC";
202 regulator-always-on;
203 regulator-boot-on;
205 regulator-enable-ramp-delay = <130>;
206 regulator-ramp-delay = <27500>;
208 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
212 regulator-name = "VDD_PRE_REG_1V35";
213 regulator-min-microvolt = <1350000>;
214 regulator-max-microvolt = <1350000>;
216 regulator-enable-ramp-delay = <176>;
217 regulator-ramp-delay = <27500>;
219 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
223 regulator-name = "VDD_1V8";
224 regulator-min-microvolt = <1800000>;
225 regulator-max-microvolt = <1800000>;
226 regulator-always-on;
227 regulator-boot-on;
229 regulator-enable-ramp-delay = <242>;
230 regulator-ramp-delay = <27500>;
232 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
236 regulator-name = "AVDD_SYS_1V2";
237 regulator-min-microvolt = <1200000>;
238 regulator-max-microvolt = <1200000>;
239 regulator-always-on;
240 regulator-boot-on;
242 regulator-enable-ramp-delay = <26>;
243 regulator-ramp-delay = <100000>;
245 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
249 regulator-name = "VDD_PEX_1V05";
250 regulator-min-microvolt = <1050000>;
251 regulator-max-microvolt = <1050000>;
253 regulator-enable-ramp-delay = <22>;
254 regulator-ramp-delay = <100000>;
256 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
260 regulator-name = "VDDIO_SDMMC";
261 regulator-min-microvolt = <1800000>;
262 regulator-max-microvolt = <3300000>;
263 regulator-always-on;
264 regulator-boot-on;
266 regulator-enable-ramp-delay = <62>;
267 regulator-ramp-delay = <100000>;
269 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
273 regulator-name = "VDD_CAM_HV";
274 regulator-min-microvolt = <2800000>;
275 regulator-max-microvolt = <2800000>;
277 regulator-enable-ramp-delay = <50>;
278 regulator-ramp-delay = <100000>;
280 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
284 regulator-name = "VDD_RTC";
285 regulator-min-microvolt = <850000>;
286 regulator-max-microvolt = <850000>;
287 regulator-always-on;
288 regulator-boot-on;
290 regulator-enable-ramp-delay = <22>;
291 regulator-ramp-delay = <100000>;
293 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
297 regulator-name = "VDD_TS_HV";
298 regulator-min-microvolt = <3300000>;
299 regulator-max-microvolt = <3300000>;
301 regulator-enable-ramp-delay = <62>;
302 regulator-ramp-delay = <100000>;
304 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
308 regulator-name = "VDD_TS_1V8";
309 regulator-min-microvolt = <1800000>;
310 regulator-max-microvolt = <1800000>;
312 regulator-enable-ramp-delay = <36>;
313 regulator-ramp-delay = <100000>;
315 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
316 maxim,active-fps-power-up-slot = <7>;
317 maxim,active-fps-power-down-slot = <0>;
321 regulator-name = "AVDD_1V05_PLL";
322 regulator-min-microvolt = <1050000>;
323 regulator-max-microvolt = <1050000>;
324 regulator-always-on;
325 regulator-boot-on;
327 regulator-enable-ramp-delay = <24>;
328 regulator-ramp-delay = <100000>;
330 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
334 regulator-name = "AVDD_SATA_HDMI_DP_1V05";
335 regulator-min-microvolt = <1050000>;
336 regulator-max-microvolt = <1050000>;
338 regulator-enable-ramp-delay = <22>;
339 regulator-ramp-delay = <100000>;
341 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
348 nvidia,invert-interrupt;
349 nvidia,suspend-mode = <0>;
350 nvidia,cpu-pwr-good-time = <0>;
351 nvidia,cpu-pwr-off-time = <0>;
352 nvidia,core-pwr-good-time = <4587 3876>;
353 nvidia,core-pwr-off-time = <39065>;
354 nvidia,core-power-req-active-high;
355 nvidia,sys-clock-req-active-high;
360 bus-width = <4>;
361 non-removable;
362 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
363 vqmmc-supply = <&vdd_1v8>;
364 vmmc-supply = <&vdd_3v3_sys>;
365 #address-cells = <1>;
366 #size-cells = <0>;
369 compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac";
371 interrupt-parent = <&gpio>;
373 interrupt-names = "host-wake";
380 bus-width = <8>;
381 non-removable;
382 vqmmc-supply = <&vdd_1v8>;
385 clk32k_in: clock-32k {
386 compatible = "fixed-clock";
387 clock-frequency = <32768>;
388 #clock-cells = <0>;
393 enable-method = "psci";
397 enable-method = "psci";
401 enable-method = "psci";
405 enable-method = "psci";
408 idle-states {
409 cpu-sleep {
416 compatible = "arm,psci-0.2";
420 vdd_gpu: regulator-vdd-gpu {
421 compatible = "pwm-regulator";
423 regulator-name = "VDD_GPU";
424 regulator-min-microvolt = <710000>;
425 regulator-max-microvolt = <1320000>;
426 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
427 regulator-ramp-delay = <80>;
428 regulator-enable-ramp-delay = <2000>;
429 regulator-settling-time-us = <160>;