Lines Matching +full:1 +full:c600000
162 snps,write-requests = <1>;
207 #dma-cells = <1>;
548 dmas = <&adma 1>, <&adma 1>,
610 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
641 #dma-cells = <1>;
687 #interconnect-cells = <1>;
731 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
803 #address-cells = <1>;
830 #address-cells = <1>;
846 #address-cells = <1>;
853 pinctrl-1 = <&state_dpaux1_off>;
865 #address-cells = <1>;
872 pinctrl-1 = <&state_dpaux0_off>;
884 #address-cells = <1>;
891 pinctrl-1 = <&state_dpaux2_off>;
903 #address-cells = <1>;
910 pinctrl-1 = <&state_dpaux3_off>;
921 #address-cells = <1>;
1011 #address-cells = <1>;
1038 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
1040 pinctrl-1 = <&sdmmc1_1v8>;
1045 nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
1046 nvidia,pad-autocal-pull-down-offset-1v8-timeout =
1077 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
1079 pinctrl-1 = <&sdmmc3_1v8>;
1080 nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
1081 nvidia,pad-autocal-pull-down-offset-1v8 = <0x7a>;
1085 nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
1086 nvidia,pad-autocal-pull-down-offset-1v8-timeout =
1118 nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;
1119 nvidia,pad-autocal-pull-down-offset-1v8-timeout =
1128 mmc-ddr-1_8v;
1129 mmc-hs200-1_8v;
1130 mmc-hs400-1_8v;
1179 usb2-1 {
1207 usb3-1 {
1233 usb2-1 {
1249 usb3-1 {
1354 nvidia,int-threshold = <1>;
1356 #timestamp-cells = <1>;
1577 nvidia,int-threshold = <1>;
1579 #timestamp-cells = <1>;
1587 #address-cells = <1>;
1602 #address-cells = <1>;
1693 sdmmc1_1v8: sdmmc1-1v8 {
1703 sdmmc3_1v8: sdmmc3-1v8 {
1714 aon-noc@c600000 {
1802 #global-interrupts = <1>;
1803 #iommu-cells = <1>;
1881 #iommu-cells = <1>;
1910 iommu-map = <0 &smmu TEGRA194_SID_HOST1X_CTX0 1>,
1911 <1 &smmu TEGRA194_SID_HOST1X_CTX1 1>,
1912 <2 &smmu TEGRA194_SID_HOST1X_CTX2 1>,
1913 <3 &smmu TEGRA194_SID_HOST1X_CTX3 1>,
1914 <4 &smmu TEGRA194_SID_HOST1X_CTX4 1>,
1915 <5 &smmu TEGRA194_SID_HOST1X_CTX5 1>,
1916 <6 &smmu TEGRA194_SID_HOST1X_CTX6 1>,
1917 <7 &smmu TEGRA194_SID_HOST1X_CTX7 1>;
1931 interconnect-names = "dma-mem", "read-1", "write";
1973 interconnect-names = "dma-mem", "read-1";
1991 interconnect-names = "dma-mem", "read-1";
1994 nvidia,head = <1>;
2009 interconnect-names = "dma-mem", "read-1";
2027 interconnect-names = "dma-mem", "read-1";
2079 interconnect-names = "dma-mem", "read-1", "write";
2098 interconnect-names = "dma-mem", "read-1", "write";
2134 #address-cells = <1>;
2168 #address-cells = <1>;
2202 #address-cells = <1>;
2236 #address-cells = <1>;
2253 interconnect-names = "dma-mem", "read-1", "write";
2275 pinctrl-1 = <&state_dpaux0_i2c>;
2299 pinctrl-1 = <&state_dpaux1_i2c>;
2305 nvidia,interface = <1>;
2323 pinctrl-1 = <&state_dpaux2_i2c>;
2347 pinctrl-1 = <&state_dpaux3_i2c>;
2371 num-lanes = <1>;
2372 linux,pci-domain = <1>;
2385 #interrupt-cells = <1>;
2389 nvidia,bpmp = <&bpmp 1>;
2423 num-lanes = <1>;
2437 #interrupt-cells = <1>;
2475 num-lanes = <1>;
2489 #interrupt-cells = <1>;
2541 #interrupt-cells = <1>;
2632 #interrupt-cells = <1>;
2728 #interrupt-cells = <1>;
2821 "read-1", "read-1-hp", "write-1",
2831 #address-cells = <1>;
2832 #size-cells = <1>;
2855 #clock-cells = <1>;
2856 #reset-cells = <1>;
2857 #power-domain-cells = <1>;
2868 #address-cells = <1>;
2874 #thermal-sensor-cells = <1>;
2881 #address-cells = <1>;
2898 cpu0_1: cpu@1 {
3111 <&hsp_aon TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(1)>;