Lines Matching +full:eth +full:- +full:clk +full:- +full:sel
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8516-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/phy/phy.h>
13 #include "mt8516-pinfunc.h"
17 interrupt-parent = <&sysirq>;
18 #address-cells = <2>;
19 #size-cells = <2>;
21 cluster0_opp: opp-table-0 {
22 compatible = "operating-points-v2";
23 opp-shared;
24 opp-598000000 {
25 opp-hz = /bits/ 64 <598000000>;
26 opp-microvolt = <1150000>;
28 opp-747500000 {
29 opp-hz = /bits/ 64 <747500000>;
30 opp-microvolt = <1150000>;
32 opp-1040000000 {
33 opp-hz = /bits/ 64 <1040000000>;
34 opp-microvolt = <1200000>;
36 opp-1196000000 {
37 opp-hz = /bits/ 64 <1196000000>;
38 opp-microvolt = <1250000>;
40 opp-1300000000 {
41 opp-hz = /bits/ 64 <1300000000>;
42 opp-microvolt = <1300000>;
47 #address-cells = <1>;
48 #size-cells = <0>;
52 compatible = "arm,cortex-a35";
54 enable-method = "psci";
55 cpu-idle-states = <&CLUSTER_SLEEP_0 &CLUSTER_SLEEP_0>,
59 clock-names = "cpu", "intermediate";
60 operating-points-v2 = <&cluster0_opp>;
65 compatible = "arm,cortex-a35";
67 enable-method = "psci";
68 cpu-idle-states = <&CLUSTER_SLEEP_0 &CLUSTER_SLEEP_0>,
72 clock-names = "cpu", "intermediate";
73 operating-points-v2 = <&cluster0_opp>;
78 compatible = "arm,cortex-a35";
80 enable-method = "psci";
81 cpu-idle-states = <&CLUSTER_SLEEP_0 &CLUSTER_SLEEP_0>,
85 clock-names = "cpu", "intermediate";
86 operating-points-v2 = <&cluster0_opp>;
91 compatible = "arm,cortex-a35";
93 enable-method = "psci";
94 cpu-idle-states = <&CLUSTER_SLEEP_0 &CLUSTER_SLEEP_0>,
98 clock-names = "cpu", "intermediate", "armpll";
99 operating-points-v2 = <&cluster0_opp>;
102 idle-states {
103 entry-method = "psci";
105 CPU_SLEEP_0_0: cpu-sleep-0-0 {
106 compatible = "arm,idle-state";
107 entry-latency-us = <600>;
108 exit-latency-us = <600>;
109 min-residency-us = <1200>;
110 arm,psci-suspend-param = <0x0010000>;
113 CLUSTER_SLEEP_0: cluster-sleep-0 {
114 compatible = "arm,idle-state";
115 entry-latency-us = <800>;
116 exit-latency-us = <1000>;
117 min-residency-us = <2000>;
118 arm,psci-suspend-param = <0x2010000>;
124 compatible = "arm,psci-1.0";
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <26000000>;
132 clock-output-names = "clk26m";
136 compatible = "fixed-clock";
137 #clock-cells = <0>;
138 clock-frequency = <32000>;
139 clock-output-names = "clk32k";
142 reserved-memory {
143 #address-cells = <2>;
144 #size-cells = <2>;
149 no-map;
155 compatible = "arm,armv8-timer";
156 interrupt-parent = <&gic>;
168 compatible = "arm,cortex-a35-pmu";
173 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
177 #address-cells = <2>;
178 #size-cells = <2>;
179 compatible = "simple-bus";
183 compatible = "mediatek,mt8516-topckgen", "syscon";
185 #clock-cells = <1>;
189 compatible = "mediatek,mt8516-infracfg", "syscon";
191 #clock-cells = <1>;
195 compatible = "mediatek,mt8516-pericfg", "syscon";
200 compatible = "mediatek,mt8516-apmixedsys", "syscon";
202 #clock-cells = <1>;
206 compatible = "mediatek,mt8516-wdt",
207 "mediatek,mt6589-wdt";
210 #reset-cells = <1>;
214 compatible = "mediatek,mt8516-timer",
215 "mediatek,mt6577-timer";
220 clock-names = "clk13m", "bus";
224 compatible = "mediatek,mt8516-keypad",
225 "mediatek,mt6779-keypad";
227 wakeup-source;
230 clock-names = "kpd";
234 syscfg_pctl: syscfg-pctl@10005000 {
240 compatible = "mediatek,mt8516-pinctrl";
242 mediatek,pctl-regmap = <&syscfg_pctl>;
243 gpio-controller;
244 #gpio-cells = <2>;
245 interrupt-controller;
246 #interrupt-cells = <2>;
251 compatible = "mediatek,mt8516-efuse", "mediatek,efuse";
253 #address-cells = <1>;
254 #size-cells = <1>;
258 compatible = "mediatek,mt8516-pwrap";
260 reg-names = "pwrap";
264 clock-names = "spi", "wrap";
267 sysirq: interrupt-controller@10200620 {
268 compatible = "mediatek,mt8516-sysirq",
269 "mediatek,mt6577-sysirq";
270 interrupt-controller;
271 #interrupt-cells = <3>;
272 interrupt-parent = <&gic>;
276 gic: interrupt-controller@10310000 {
277 compatible = "arm,gic-400";
278 #interrupt-cells = <3>;
279 interrupt-parent = <&gic>;
280 interrupt-controller;
289 apdma: dma-controller@11000480 {
290 compatible = "mediatek,mt8516-uart-dma",
291 "mediatek,mt6577-uart-dma";
304 dma-requests = <6>;
306 clock-names = "apdma";
307 #dma-cells = <1>;
311 compatible = "mediatek,mt8516-uart",
312 "mediatek,mt6577-uart";
317 clock-names = "baud", "bus";
320 dma-names = "tx", "rx";
325 compatible = "mediatek,mt8516-uart",
326 "mediatek,mt6577-uart";
331 clock-names = "baud", "bus";
334 dma-names = "tx", "rx";
339 compatible = "mediatek,mt8516-uart",
340 "mediatek,mt6577-uart";
345 clock-names = "baud", "bus";
348 dma-names = "tx", "rx";
353 compatible = "mediatek,mt8516-i2c",
354 "mediatek,mt2712-i2c";
358 clock-div = <2>;
361 clock-names = "main", "dma";
362 #address-cells = <1>;
363 #size-cells = <0>;
368 compatible = "mediatek,mt8516-i2c",
369 "mediatek,mt2712-i2c";
373 clock-div = <2>;
376 clock-names = "main", "dma";
377 #address-cells = <1>;
378 #size-cells = <0>;
383 compatible = "mediatek,mt8516-i2c",
384 "mediatek,mt2712-i2c";
388 clock-div = <2>;
391 clock-names = "main", "dma";
392 #address-cells = <1>;
393 #size-cells = <0>;
398 compatible = "mediatek,mt8516-spi",
399 "mediatek,mt2712-spi";
400 #address-cells = <1>;
401 #size-cells = <0>;
407 clock-names = "parent-clk", "sel-clk", "spi-clk";
412 compatible = "mediatek,mt8516-mmc";
418 clock-names = "source", "hclk", "source_cg";
423 compatible = "mediatek,mt8516-mmc";
429 clock-names = "source", "hclk", "source_cg";
434 compatible = "mediatek,mt8516-mmc";
440 clock-names = "source", "hclk", "source_cg";
445 compatible = "mediatek,mt8516-eth";
452 clock-names = "core", "reg", "trans";
457 compatible = "mediatek,mt8516-rng",
458 "mediatek,mt7623-rng";
461 clock-names = "rng";
465 compatible = "mediatek,mt8516-pwm";
467 #pwm-cells = <2>;
476 clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
481 compatible = "mediatek,mt8516-musb", "mediatek,mtk-musb";
484 interrupt-names = "mc";
489 clock-names = "main","mcu","univpll";
494 compatible = "mediatek,mt8516-musb", "mediatek,mtk-musb";
497 interrupt-names = "mc";
502 clock-names = "main","mcu","univpll";
507 usb_phy: t-phy@11110000 {
508 compatible = "mediatek,mt8516-tphy",
509 "mediatek,generic-tphy-v1";
511 #address-cells = <2>;
512 #size-cells = <2>;
516 usb0_port: usb-phy@11110800 {
519 clock-names = "ref";
520 #phy-cells = <1>;
523 usb1_port: usb-phy@11110900 {
526 clock-names = "ref";
527 #phy-cells = <1>;
532 compatible = "mediatek,mt8516-auxadc",
533 "mediatek,mt8173-auxadc";
536 clock-names = "main";
537 #io-channel-cells = <1>;