Lines Matching +full:disable +full:- +full:sensor +full:- +full:hub
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
16 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
17 #include <dt-bindings/spmi/spmi.h>
20 model = "Kontron 3.5\"-SBC-i1200";
21 compatible = "kontron,3-5-sbc-i1200", "mediatek,mt8395", "mediatek,mt8195";
34 stdout-path = "serial0:115200n8";
39 compatible = "linaro,optee-tz";
44 gpio-keys {
45 compatible = "gpio-keys";
46 pinctrl-names = "default";
47 pinctrl-0 = <&gpio_keys_pins>;
49 key-0 {
53 wakeup-source;
54 debounce-interval = <15>;
59 compatible = "gpio-leds";
60 pinctrl-names = "default";
61 pinctrl-0 = <&led_pins>;
63 led-0 {
65 default-state = "keep";
76 vsys: regulator-vsys {
77 compatible = "regulator-fixed";
78 regulator-name = "vsys";
79 regulator-always-on;
80 regulator-boot-on;
81 regulator-min-microvolt = <5000000>;
82 regulator-max-microvolt = <5000000>;
85 reserved-memory {
86 #address-cells = <2>;
87 #size-cells = <2>;
91 * 12 MiB reserved for OP-TEE (BL32)
92 * +-----------------------+ 0x43e0_0000
94 * +-----------------------+ 0x43c0_0000
96 * + TZDRAM +--------------+ 0x4340_0000
98 * +-----------------------+ 0x4320_0000
101 no-map;
106 compatible = "shared-dma-pool";
108 no-map;
112 compatible = "shared-dma-pool";
118 no-map;
123 compatible = "shared-dma-pool";
125 no-map;
129 compatible = "shared-dma-pool";
134 thermal_sensor0: thermal-sensor-0 {
135 compatible = "generic-adc-thermal";
136 #thermal-sensor-cells = <0>;
137 io-channels = <&auxadc 0>;
138 io-channel-names = "sensor-channel";
139 temperature-lookup-table = <(-25000) 1474
140 (-20000) 1374
141 (-15000) 1260
142 (-10000) 1134
143 (-5000) 1004
177 thermal_sensor1: thermal-sensor-1 {
178 compatible = "generic-adc-thermal";
179 #thermal-sensor-cells = <0>;
180 io-channels = <&auxadc 1>;
181 io-channel-names = "sensor-channel";
182 temperature-lookup-table = <(-25000) 1474
183 (-20000) 1374
184 (-15000) 1260
185 (-10000) 1134
186 (-5000) 1004
220 thermal_sensor2: thermal-sensor-2 {
221 compatible = "generic-adc-thermal";
222 #thermal-sensor-cells = <0>;
223 io-channels = <&auxadc 2>;
224 io-channel-names = "sensor-channel";
225 temperature-lookup-table = <(-25000) 1474
226 (-20000) 1374
227 (-15000) 1260
228 (-10000) 1134
229 (-5000) 1004
269 phy-mode ="rgmii-id";
270 phy-handle = <ðernet_phy0>;
271 pinctrl-names = "default", "sleep";
272 pinctrl-0 = <ð_default_pins>;
273 pinctrl-1 = <ð_sleep_pins>;
277 ethernet_phy0: ethernet-phy@1 {
278 compatible = "ethernet-phy-id001c.c916";
280 interrupts-extended = <&pio 94 IRQ_TYPE_LEVEL_LOW>;
281 reset-assert-us = <10000>;
282 reset-deassert-us = <80000>;
283 reset-gpios = <&pio 93 GPIO_ACTIVE_HIGH>;
290 mali-supply = <&mt6315_7_vbuck1>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&i2c0_pins>;
297 clock-frequency = <100000>;
303 pinctrl-names = "default";
304 pinctrl-0 = <&i2c1_pins>;
305 clock-frequency = <100000>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&i2c2_pins>;
312 clock-frequency = <400000>;
320 pinctrl-names = "default";
321 pinctrl-0 = <&i2c3_pins>;
322 clock-frequency = <100000>;
328 clock-frequency = <100000>;
329 pinctrl-0 = <&i2c4_pins>;
330 pinctrl-names = "default";
335 clock-frequency = <400000>;
336 pinctrl-0 = <&i2c6_pins>;
337 pinctrl-names = "default";
343 interrupt-controller;
344 interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>;
345 interrupt-names = "IRQB";
346 #interrupt-cells = <1>;
349 compatible = "mediatek,mt6360-regulator";
350 LDO_VIN1-supply = <&vsys>;
351 LDO_VIN2-supply = <&vsys>;
352 LDO_VIN3-supply = <&vsys>;
355 regulator-name = "emi_vdd2";
356 regulator-min-microvolt = <600000>;
357 regulator-max-microvolt = <1800000>;
358 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
361 regulator-always-on;
365 regulator-name = "emi_vddq";
366 regulator-min-microvolt = <300000>;
367 regulator-max-microvolt = <1300000>;
368 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
371 regulator-always-on;
375 regulator-name = "mt6360_ldo1"; /* Test point */
376 regulator-min-microvolt = <1200000>;
377 regulator-max-microvolt = <3600000>;
378 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
383 regulator-name = "panel1_p1v8";
384 regulator-min-microvolt = <1800000>;
385 regulator-max-microvolt = <1800000>;
386 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
391 regulator-name = "vmc_pmu";
392 regulator-min-microvolt = <1800000>;
393 regulator-max-microvolt = <3300000>;
394 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
399 regulator-name = "vmch_pmu";
400 regulator-min-microvolt = <3300000>;
401 regulator-max-microvolt = <3300000>;
402 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
407 regulator-name = "mt6360_ldo6"; /* Test point */
408 regulator-min-microvolt = <500000>;
409 regulator-max-microvolt = <2100000>;
410 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
415 regulator-name = "emi_vmddr_en";
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <1800000>;
418 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
420 regulator-always-on;
427 pinctrl-names = "default", "state_uhs";
428 pinctrl-0 = <&mmc0_default_pins>;
429 pinctrl-1 = <&mmc0_uhs_pins>;
430 bus-width = <8>;
431 max-frequency = <200000000>;
432 hs400-ds-delay = <0x14c11>;
433 cap-mmc-highspeed;
434 cap-mmc-hw-reset;
435 mmc-hs200-1_8v;
436 mmc-hs400-1_8v;
437 no-sdio;
438 no-sd;
439 non-removable;
440 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
441 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
446 pinctrl-names = "default", "state_uhs";
447 pinctrl-0 = <&mmc1_default_pins>, <&mmc1_detect_pins>;
448 pinctrl-1 = <&mmc1_default_pins>;
449 cd-gpios = <&pio 129 GPIO_ACTIVE_LOW>;
450 bus-width = <4>;
451 max-frequency = <200000000>;
452 cap-sd-highspeed;
453 sd-uhs-sdr50;
454 sd-uhs-sdr104;
455 no-mmc;
456 vmmc-supply = <&mt6360_ldo5>;
457 vqmmc-supply = <&mt6360_ldo3>;
462 regulator-always-on;
466 regulator-always-on;
470 regulator-always-on;
474 regulator-always-on;
478 regulator-always-on;
482 regulator-always-on;
486 regulator-always-on;
490 regulator-always-on;
494 regulator-always-on;
498 pinctrl-names = "default";
499 pinctrl-0 = <&nor_pins_default>;
503 compatible = "jedec,spi-nor";
505 spi-max-frequency = <52000000>;
506 spi-rx-bus-width = <2>;
507 spi-tx-bus-width = <2>;
512 pinctrl-names = "default";
513 pinctrl-0 = <&pcie0_pins_default>;
518 pinctrl-names = "default";
519 pinctrl-0 = <&pcie1_pins_default>;
528 eth_default_pins: eth-default-pins {
529 pins-txd {
534 drive-strength = <8>;
537 pins-rxd {
544 pins-cc {
549 drive-strength = <8>;
552 pins-mdio {
555 input-enable;
558 pins-power {
561 output-high;
564 pins-reset {
566 output-high;
569 pins-interrupt {
571 input-enable;
575 eth_sleep_pins: eth-sleep-pins {
576 pins-txd {
583 pins-cc {
590 pins-rxd {
597 pins-mdio {
600 input-disable;
601 bias-disable;
605 gpio_keys_pins: gpio-keys-pins {
608 input-enable;
612 i2c0_pins: i2c0-pins {
616 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
617 drive-strength-microamp = <1000>;
621 i2c1_pins: i2c1-pins {
625 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
626 drive-strength-microamp = <1000>;
630 i2c2_pins: i2c2-default-pins {
631 pins-bus {
634 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
635 drive-strength-microamp = <1000>;
639 i2c3_pins: i2c3-pins {
643 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
644 drive-strength-microamp = <1000>;
648 i2c4_pins: i2c4-pins {
652 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
653 drive-strength-microamp = <1000>;
657 i2c6_pins: i2c6-pins {
661 bias-pull-up;
662 drive-strength-microamp = <1000>;
666 mmc0_default_pins: mmc0-default-pins {
667 pins-clk {
669 drive-strength = <6>;
670 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
673 pins-cmd-dat {
683 input-enable;
684 drive-strength = <6>;
685 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
688 pins-rst {
690 drive-strength = <6>;
691 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
695 mmc0_uhs_pins: mmc0-uhs-pins {
696 pins-clk {
698 drive-strength = <8>;
699 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
702 pins-cmd-dat {
712 input-enable;
713 drive-strength = <8>;
714 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
717 pins-ds {
719 drive-strength = <8>;
720 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
723 pins-rst {
725 drive-strength = <8>;
726 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
730 mmc1_default_pins: mmc1-default-pins {
731 pins-clk {
733 drive-strength = <8>;
734 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
737 pins-cmd-dat {
743 input-enable;
744 drive-strength = <8>;
745 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
749 mmc1_detect_pins: mmc1-detect-pins {
750 pins-insert {
752 bias-pull-up;
756 nor_pins_default: nor-default-pins {
757 pins-ck-io {
761 drive-strength = <6>;
762 bias-pull-down;
765 pins-cs {
767 drive-strength = <6>;
768 bias-pull-up;
772 pcie0_pins_default: pcie0-default-pins {
773 pins-bus {
777 bias-pull-up;
781 pcie1_pins_default: pcie1-default-pins {
782 pins-bus {
786 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
790 led_pins: led-pins {
791 pins-power-en {
793 output-high;
797 spi0_pins: spi0-default-pins {
798 pins-cs-mosi-clk {
802 bias-disable;
805 pins-miso {
807 bias-pull-down;
811 spi1_pins: spi1-default-pins {
812 pins-cs-mosi-clk {
816 bias-disable;
819 pins-miso {
821 bias-pull-down;
825 uart0_pins: uart0-pins {
826 pins-rx {
828 input-enable;
829 bias-pull-up;
832 pins-tx {
837 uart1_pins: uart1-pins {
838 pins-rx {
840 input-enable;
841 bias-pull-up;
844 pins-tx {
848 pins-rts {
852 pins-cts {
854 input-enable;
858 uart2_pins: uart2-pins {
859 pins-rx {
861 input-enable;
862 bias-pull-up;
865 pins-tx {
869 pins-rts {
873 pins-cts {
875 input-enable;
879 uart3_pins: uart3-pins {
880 pins-rx {
882 input-enable;
883 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
886 pins-tx {
891 uart4_pins: uart4-pins {
892 pins-rx {
894 input-enable;
895 bias-pull-up;
898 pins-tx {
905 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
909 memory-region = <&scp_mem>;
910 firmware-name = "mediatek/mt8195/scp.img";
915 #address-cells = <2>;
916 #size-cells = <0>;
919 compatible = "mediatek,mt6315-regulator";
924 regulator-name = "Vbcpu";
925 regulator-min-microvolt = <300000>;
926 regulator-max-microvolt = <1193750>;
927 regulator-enable-ramp-delay = <256>;
928 regulator-ramp-delay = <6250>;
929 regulator-allowed-modes = <0 1 2>;
930 regulator-always-on;
936 compatible = "mediatek,mt6315-regulator";
941 regulator-name = "Vgpu";
942 regulator-min-microvolt = <625000>;
943 regulator-max-microvolt = <1193750>;
944 regulator-enable-ramp-delay = <256>;
945 regulator-ramp-delay = <6250>;
946 regulator-allowed-modes = <0 1 2>;
947 regulator-always-on;
956 vusb33-supply = <&mt6359_vusb_ldo_reg>;
960 /* USB2.0 M.2 Key-E */
962 vusb33-supply = <&mt6359_vusb_ldo_reg>;
966 /* USB2.0 to on-board usb hub */
968 vusb33-supply = <&mt6359_vusb_ldo_reg>;
973 pinctrl-names = "default";
974 pinctrl-0 = <&spi0_pins>;
975 mediatek,pad-select = <0>;
979 compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
981 spi-max-frequency = <18500000>;
987 pinctrl-names = "default";
988 pinctrl-0 = <&spi1_pins>;
989 mediatek,pad-select = <0>;
994 cpu-thermal {
995 polling-delay = <1000>; /* milliseconds */
996 polling-delay-passive = <0>; /* milliseconds */
997 thermal-sensors = <&thermal_sensor0>;
1000 trip-alert {
1006 trip-crit {
1014 pcb-top-thermal {
1015 polling-delay = <1000>; /* milliseconds */
1016 polling-delay-passive = <0>; /* milliseconds */
1017 thermal-sensors = <&thermal_sensor1>;
1020 trip-alert {
1026 trip-crit {
1034 pcb-bottom-thermal {
1035 polling-delay = <1000>; /* milliseconds */
1036 polling-delay-passive = <0>; /* milliseconds */
1037 thermal-sensors = <&thermal_sensor2>;
1040 trip-alert {
1046 trip-crit {
1056 pinctrl-names = "default";
1057 pinctrl-0 = <&uart0_pins>;
1062 pinctrl-names = "default";
1063 pinctrl-0 = <&uart1_pins>;
1064 uart-has-rtscts;
1069 pinctrl-names = "default";
1070 pinctrl-0 = <&uart2_pins>;
1071 uart-has-rtscts;
1076 pinctrl-names = "default";
1077 pinctrl-0 = <&uart3_pins>;
1082 pinctrl-names = "default";
1083 pinctrl-0 = <&uart4_pins>;
1112 /* USB2.0 M.2 Key-B */
1115 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1116 mediatek,u3p-dis-msk = <0x01>;
1120 /* USB2.0 M.2 Key-E */
1125 /* USB2.0 to on-board usb hub */