Lines Matching +full:regulator +full:- +full:fixed +full:- +full:domain
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
16 #include <dt-bindings/spmi/spmi.h>
17 #include <dt-bindings/usb/pd.h>
20 model = "MediaTek Genio 1200 EVK-P1V2-EMMC";
21 compatible = "mediatek,mt8395-evk", "mediatek,mt8395",
30 stdout-path = "serial0:921600n8";
35 compatible = "linaro,optee-tz";
45 reserved-memory {
46 #address-cells = <2>;
47 #size-cells = <2>;
51 * 12 MiB reserved for OP-TEE (BL32)
52 * +-----------------------+ 0x43e0_0000
54 * +-----------------------+ 0x43c0_0000
56 * + TZDRAM +--------------+ 0x4340_0000
58 * +-----------------------+ 0x4320_0000
61 no-map;
66 compatible = "shared-dma-pool";
68 no-map;
72 compatible = "shared-dma-pool";
78 no-map;
83 compatible = "shared-dma-pool";
85 no-map;
89 compatible = "shared-dma-pool";
94 backlight_lcd0: backlight-lcd0 {
95 compatible = "pwm-backlight";
97 enable-gpios = <&pio 47 GPIO_ACTIVE_HIGH>;
98 brightness-levels = <0 1023>;
99 num-interpolated-steps = <1023>;
100 default-brightness-level = <576>;
103 backlight_lcd1: backlight-lcd1 {
104 compatible = "pwm-backlight";
106 enable-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
107 brightness-levels = <0 1023>;
108 num-interpolated-steps = <1023>;
109 default-brightness-level = <576>;
112 can_clk: can-clk {
113 compatible = "fixed-clock";
114 #clock-cells = <0>;
115 clock-frequency = <20000000>;
116 clock-output-names = "can-clk";
119 edp_panel_fixed_3v3: regulator-0 {
120 compatible = "regulator-fixed";
121 regulator-name = "edp_panel_3v3";
122 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <3300000>;
124 enable-active-high;
126 pinctrl-names = "default";
127 pinctrl-0 = <&edp_panel_3v3_en_pins>;
130 edp_panel_fixed_12v: regulator-1 {
131 compatible = "regulator-fixed";
132 regulator-name = "edp_backlight_12v";
133 regulator-min-microvolt = <12000000>;
134 regulator-max-microvolt = <12000000>;
135 enable-active-high;
137 pinctrl-names = "default";
138 pinctrl-0 = <&edp_panel_12v_en_pins>;
141 keys: gpio-keys {
142 compatible = "gpio-keys";
144 button-volume-up {
145 wakeup-source;
146 debounce-interval = <100>;
153 wifi_fixed_3v3: regulator-2 {
154 compatible = "regulator-fixed";
155 regulator-name = "wifi_3v3";
156 regulator-min-microvolt = <3300000>;
157 regulator-max-microvolt = <3300000>;
159 enable-active-high;
160 regulator-always-on;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pwm0_default_pins>;
171 wakeup-delay-ms = <200>;
175 phy-mode ="rgmii-rxid";
176 phy-handle = <ð_phy0>;
177 snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
178 snps,reset-delays-us = <0 10000 10000>;
179 mediatek,tx-delay-ps = <2030>;
180 mediatek,mac-wol;
181 pinctrl-names = "default", "sleep";
182 pinctrl-0 = <ð_default_pins>;
183 pinctrl-1 = <ð_sleep_pins>;
187 compatible = "snps,dwmac-mdio";
188 #address-cells = <1>;
189 #size-cells = <0>;
190 eth_phy0: ethernet-phy@1 {
191 compatible = "ethernet-phy-id001c.c916";
198 mali-supply = <&mt6315_7_vbuck1>;
203 clock-frequency = <400000>;
204 pinctrl-0 = <&i2c0_pins>;
205 pinctrl-names = "default";
210 clock-frequency = <400000>;
211 pinctrl-0 = <&i2c1_pins>;
212 pinctrl-names = "default";
218 interrupts-extended = <&pio 132 IRQ_TYPE_EDGE_RISING>;
219 irq-gpios = <&pio 132 GPIO_ACTIVE_HIGH>;
220 reset-gpios = <&pio 133 GPIO_ACTIVE_HIGH>;
221 AVDD28-supply = <&mt6360_ldo1>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&touch_pins>;
228 clock-frequency = <400000>;
229 pinctrl-0 = <&i2c2_pins>;
230 pinctrl-names = "default";
235 clock-frequency = <400000>;
236 pinctrl-0 = <&i2c6_pins>;
237 pinctrl-names = "default";
238 #address-cells = <1>;
239 #size-cells = <0>;
245 interrupt-parent = <&pio>;
247 interrupt-names = "IRQB";
248 interrupt-controller;
249 #interrupt-cells = <1>;
250 pinctrl-0 = <&mt6360_pins>;
253 compatible = "mediatek,mt6360-chg";
254 richtek,vinovp-microvolt = <14500000>;
256 otg_vbus_regulator: usb-otg-vbus-regulator {
257 regulator-name = "usb-otg-vbus";
258 regulator-min-microvolt = <4425000>;
259 regulator-max-microvolt = <5825000>;
263 regulator {
264 compatible = "mediatek,mt6360-regulator";
265 LDO_VIN3-supply = <&mt6360_buck2>;
268 regulator-name = "emi_vdd2";
269 regulator-min-microvolt = <300000>;
270 regulator-max-microvolt = <1300000>;
271 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
274 regulator-always-on;
278 regulator-name = "emi_vddq";
279 regulator-min-microvolt = <300000>;
280 regulator-max-microvolt = <1300000>;
281 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
284 regulator-always-on;
288 regulator-name = "tp1_p3v0";
289 regulator-min-microvolt = <3300000>;
290 regulator-max-microvolt = <3300000>;
291 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
293 regulator-always-on;
297 regulator-name = "panel1_p1v8";
298 regulator-min-microvolt = <1800000>;
299 regulator-max-microvolt = <1800000>;
300 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
305 regulator-name = "vmc_pmu";
306 regulator-min-microvolt = <1200000>;
307 regulator-max-microvolt = <3600000>;
308 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
313 regulator-name = "vmch_pmu";
314 regulator-min-microvolt = <2700000>;
315 regulator-max-microvolt = <3600000>;
316 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
322 regulator-name = "mt6360_ldo1";
323 regulator-min-microvolt = <500000>;
324 regulator-max-microvolt = <2100000>;
325 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
330 regulator-name = "emi_vmddr_en";
331 regulator-min-microvolt = <500000>;
332 regulator-max-microvolt = <2100000>;
333 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
335 regulator-always-on;
342 domain-supply = <&mt6315_7_vbuck1>;
346 domain-supply = <&mt6359_vsram_others_ldo_reg>;
351 pinctrl-names = "default", "state_uhs";
352 pinctrl-0 = <&mmc0_default_pins>;
353 pinctrl-1 = <&mmc0_uhs_pins>;
354 bus-width = <8>;
355 max-frequency = <200000000>;
356 cap-mmc-highspeed;
357 mmc-hs200-1_8v;
358 mmc-hs400-1_8v;
359 cap-mmc-hw-reset;
360 no-sdio;
361 no-sd;
362 hs400-ds-delay = <0x14c11>;
363 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
364 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
365 non-removable;
369 pinctrl-names = "default", "state_uhs";
370 pinctrl-0 = <&mmc1_default_pins>;
371 pinctrl-1 = <&mmc1_uhs_pins>;
372 bus-width = <4>;
373 max-frequency = <200000000>;
374 cap-sd-highspeed;
375 sd-uhs-sdr50;
376 sd-uhs-sdr104;
377 no-mmc;
378 no-sdio;
379 vmmc-supply = <&mt6360_ldo5>;
380 vqmmc-supply = <&mt6360_ldo3>;
382 non-removable;
386 regulator-always-on;
390 regulator-always-on;
395 regulator-always-on;
399 regulator-min-microvolt = <3300000>;
400 regulator-max-microvolt = <3300000>;
404 regulator-always-on;
408 regulator-always-on;
412 regulator-always-on;
416 regulator-always-on;
421 regulator-min-microvolt = <750000>;
422 regulator-max-microvolt = <750000>;
426 mediatek,mic-type-0 = <1>; /* ACC */
427 mediatek,mic-type-1 = <3>; /* DCC */
428 mediatek,mic-type-2 = <1>; /* ACC */
432 pinctrl-names = "default", "idle";
433 pinctrl-0 = <&pcie0_default_pins>;
434 pinctrl-1 = <&pcie0_idle_pins>;
439 pinctrl-names = "default";
440 pinctrl-0 = <&pcie1_default_pins>;
449 audio_default_pins: audio-default-pins {
450 pins-cmd-dat {
467 disp_pwm1_default_pins: disp-pwm1-default-pins {
473 edp_panel_12v_en_pins: edp-panel-12v-en-pins {
476 output-high;
480 edp_panel_3v3_en_pins: edp-panel-3v3-en-pins {
483 output-high;
487 eth_default_pins: eth-default-pins {
488 pins-cc {
493 drive-strength = <8>;
496 pins-mdio {
499 input-enable;
502 pins-power {
505 output-high;
508 pins-rxd {
515 pins-txd {
520 drive-strength = <8>;
524 eth_sleep_pins: eth-sleep-pins {
525 pins-cc {
532 pins-mdio {
535 input-disable;
536 bias-disable;
539 pins-rxd {
546 pins-txd {
554 gpio_key_pins: gpio-keys-pins {
557 bias-pull-up;
558 input-enable;
562 i2c0_pins: i2c0-pins {
566 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
567 drive-strength-microamp = <1000>;
571 i2c1_pins: i2c1-pins {
575 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
576 drive-strength-microamp = <1000>;
580 i2c2_pins: i2c2-pins {
584 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
585 drive-strength = <6>;
589 i2c6_pins: i2c6-pins {
593 bias-pull-up;
597 mmc0_default_pins: mmc0-default-pins {
598 pins-clk {
600 drive-strength = <6>;
601 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
604 pins-cmd-dat {
614 input-enable;
615 drive-strength = <6>;
616 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
619 pins-rst {
621 drive-strength = <6>;
622 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
626 mmc0_uhs_pins: mmc0-uhs-pins {
627 pins-clk {
629 drive-strength = <8>;
630 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
633 pins-cmd-dat {
643 input-enable;
644 drive-strength = <8>;
645 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
648 pins-ds {
650 drive-strength = <8>;
651 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
654 pins-rst {
656 drive-strength = <8>;
657 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
661 mmc1_default_pins: mmc1-default-pins {
662 pins-clk {
664 drive-strength = <8>;
665 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
668 pins-cmd-dat {
674 input-enable;
675 drive-strength = <8>;
676 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
680 mmc1_uhs_pins: mmc1-uhs-pins {
681 pins-clk {
683 drive-strength = <8>;
684 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
687 pins-cmd-dat {
693 input-enable;
694 drive-strength = <8>;
695 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
699 mt6360_pins: mt6360-pins {
703 input-enable;
704 bias-pull-up;
708 pcie0_default_pins: pcie0-default-pins {
713 bias-pull-up;
717 pcie0_idle_pins: pcie0-idle-pins {
720 bias-disable;
721 output-low;
725 pcie1_default_pins: pcie1-default-pins {
730 bias-pull-up;
734 pwm0_default_pins: pwm0-default-pins {
735 pins-cmd-dat {
740 spi1_pins: spi1-pins {
746 bias-disable;
750 spi2_pins: spi-pins {
756 bias-disable;
760 touch_pins: touch-pins {
761 pins-irq {
763 input-enable;
764 bias-disable;
767 pins-reset {
769 output-high;
773 uart0_pins: uart0-pins {
780 uart1_pins: uart1-pins {
791 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
795 memory-region = <&scp_mem>;
800 pinctrl-0 = <&spi1_pins>;
801 pinctrl-names = "default";
802 mediatek,pad-select = <0>;
803 #address-cells = <1>;
804 #size-cells = <0>;
806 cs-gpios = <&pio 64 GPIO_ACTIVE_LOW>;
812 spi-max-frequency = <20000000>;
813 interrupts-extended = <&pio 16 IRQ_TYPE_LEVEL_LOW>;
814 vdd-supply = <&mt6359_vcn33_2_bt_ldo_reg>;
815 xceiver-supply = <&mt6359_vcn33_2_bt_ldo_reg>;
820 pinctrl-0 = <&spi2_pins>;
821 pinctrl-names = "default";
822 mediatek,pad-select = <0>;
823 #address-cells = <1>;
824 #size-cells = <0>;
829 #address-cells = <2>;
830 #size-cells = <0>;
833 compatible = "mediatek,mt6315-regulator";
838 regulator-compatible = "vbuck1";
839 regulator-name = "Vbcpu";
840 regulator-min-microvolt = <300000>;
841 regulator-max-microvolt = <1193750>;
842 regulator-enable-ramp-delay = <256>;
843 regulator-allowed-modes = <0 1 2>;
844 regulator-always-on;
850 compatible = "mediatek,mt6315-regulator";
855 regulator-compatible = "vbuck1";
856 regulator-name = "Vgpu";
857 regulator-min-microvolt = <546000>;
858 regulator-max-microvolt = <787000>;
859 regulator-enable-ramp-delay = <256>;
860 regulator-allowed-modes = <0 1 2>;
873 u3port1: usb-phy@700 {
874 mediatek,force-mode;
887 pinctrl-0 = <&uart0_pins>;
888 pinctrl-names = "default";
893 pinctrl-0 = <&uart1_pins>;
894 pinctrl-names = "default";
903 vusb33-supply = <&mt6359_vusb_ldo_reg>;
908 vusb33-supply = <&mt6359_vusb_ldo_reg>;
913 vusb33-supply = <&mt6359_vusb_ldo_reg>;
922 vusb33-supply = <&mt6359_vusb_ldo_reg>;