Lines Matching +full:0 +full:x1c114000
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
132 reg = <0x400>;
151 reg = <0x500>;
170 reg = <0x600>;
189 reg = <0x700>;
246 arm,psci-suspend-param = <0x00010001>;
255 arm,psci-suspend-param = <0x00010001>;
264 arm,psci-suspend-param = <0x01010002>;
273 arm,psci-suspend-param = <0x01010002>;
313 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
332 #clock-cells = <0>;
341 #clock-cells = <0>;
348 #clock-cells = <0>;
355 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
449 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
450 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
451 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
452 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
460 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
468 reg = <0 0x0c000000 0 0x40000>,
469 <0 0x0c040000 0 0x200000>;
470 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
473 ppi_cluster0: interrupt-partition-0 {
485 reg = <0 0x10000000 0 0x1000>;
491 reg = <0 0x10001000 0 0x1000>;
498 reg = <0 0x10003000 0 0x1000>;
504 reg = <0 0x10005000 0 0x1000>,
505 <0 0x11d10000 0 0x1000>,
506 <0 0x11d30000 0 0x1000>,
507 <0 0x11d40000 0 0x1000>,
508 <0 0x11e20000 0 0x1000>,
509 <0 0x11eb0000 0 0x1000>,
510 <0 0x11f40000 0 0x1000>,
511 <0 0x1000b000 0 0x1000>;
517 gpio-ranges = <&pio 0 0 144>;
519 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH 0>;
525 reg = <0 0x10006000 0 0x1000>;
531 #size-cells = <0>;
538 #size-cells = <0>;
548 #size-cells = <0>;
553 #power-domain-cells = <0>;
558 #power-domain-cells = <0>;
563 #power-domain-cells = <0>;
568 #power-domain-cells = <0>;
573 #power-domain-cells = <0>;
609 "vppsys0-0", "vppsys0-1", "vppsys0-2", "vppsys0-3",
617 #size-cells = <0>;
623 clock-names = "vdec1-0";
625 #power-domain-cells = <0>;
633 #power-domain-cells = <0>;
645 clock-names = "vdosys0", "vdosys0-0", "vdosys0-1",
650 #size-cells = <0>;
658 clock-names = "vppsys1", "vppsys1-0",
661 #power-domain-cells = <0>;
670 clock-names = "wepsys-0", "wepsys-1", "wepsys-2",
673 #power-domain-cells = <0>;
679 clock-names = "vdec0-0";
681 #power-domain-cells = <0>;
687 clock-names = "vdec2-0";
689 #power-domain-cells = <0>;
697 #power-domain-cells = <0>;
706 clock-names = "vdosys1", "vdosys1-0",
710 #size-cells = <0>;
716 #power-domain-cells = <0>;
722 #power-domain-cells = <0>;
729 #power-domain-cells = <0>;
737 clock-names = "img-0", "img-1";
740 #size-cells = <0>;
745 #power-domain-cells = <0>;
753 clock-names = "ipe", "ipe-0", "ipe-1";
755 #power-domain-cells = <0>;
766 clock-names = "cam-0", "cam-1", "cam-2", "cam-3",
770 #size-cells = <0>;
775 #power-domain-cells = <0>;
780 #power-domain-cells = <0>;
785 #power-domain-cells = <0>;
794 #power-domain-cells = <0>;
800 #power-domain-cells = <0>;
805 #power-domain-cells = <0>;
810 #power-domain-cells = <0>;
818 #power-domain-cells = <0>;
825 #power-domain-cells = <0>;
834 #size-cells = <0>;
847 #power-domain-cells = <0>;
856 reg = <0 0x10007000 0 0x100>;
862 reg = <0 0x1000c000 0 0x1000>;
869 reg = <0 0x10017000 0 0x1000>;
870 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
876 reg = <0 0x10024000 0 0x1000>;
878 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
888 reg = <0 0x10027000 0 0x000e00>,
889 <0 0x10029000 0 0x000100>;
903 reg = <0 0x10315000 0 0x5000>;
904 interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH 0>,
905 <GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH 0>,
906 <GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH 0>,
907 <GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH 0>,
908 <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH 0>;
914 reg = <0 0x10320000 0 0x4000>;
915 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
922 reg = <0 0x10330000 0 0x4000>;
923 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
930 reg = <0 0x10500000 0 0x100000>,
931 <0 0x10720000 0 0xe0000>,
932 <0 0x10700000 0 0x8000>;
934 interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
940 reg = <0 0x10720000 0 0x1000>;
946 reg = <0 0x10803000 0 0x1000>,
947 <0 0x10840000 0 0x40000>;
969 #mbox-cells = <0>;
970 reg = <0 0x10816000 0 0x1000>;
971 interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
976 #mbox-cells = <0>;
977 reg = <0 0x10817000 0 0x1000>;
978 interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>;
983 reg = <0 0x10890000 0 0x10000>;
986 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
1033 reg = <0 0x11001100 0 0x100>;
1034 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
1043 reg = <0 0x11001200 0 0x100>;
1044 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1053 reg = <0 0x11001300 0 0x100>;
1054 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1063 reg = <0 0x11001400 0 0x100>;
1064 interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
1073 reg = <0 0x11001500 0 0x100>;
1074 interrupts = <GIC_SPI 724 IRQ_TYPE_LEVEL_HIGH 0>;
1083 reg = <0 0x11001600 0 0x100>;
1084 interrupts = <GIC_SPI 725 IRQ_TYPE_LEVEL_HIGH 0>;
1093 reg = <0 0x11002000 0 0x1000>;
1102 reg = <0 0x11003000 0 0x1000>;
1110 #size-cells = <0>;
1111 reg = <0 0x1100a000 0 0x1000>;
1112 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0>;
1122 reg = <0 0x1100b000 0 0xc00>;
1123 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
1133 reg = <0 0x1100bc00 0 0x400>;
1134 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 0>;
1145 reg = <0 0x1100e000 0 0x1000>;
1146 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_LOW 0>;
1157 reg = <0 0x1100f000 0 0x1000>;
1158 interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>;
1170 #size-cells = <0>;
1171 reg = <0 0x11010000 0 0x1000>;
1172 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0>;
1184 #size-cells = <0>;
1185 reg = <0 0x11012000 0 0x1000>;
1186 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
1198 #size-cells = <0>;
1199 reg = <0 0x11013000 0 0x1000>;
1200 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1212 #size-cells = <0>;
1213 reg = <0 0x11018000 0 0x1000>;
1214 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
1226 #size-cells = <0>;
1227 reg = <0 0x11019000 0 0x1000>;
1228 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
1238 reg = <0 0x1101d000 0 0x1000>;
1239 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 0>;
1249 reg = <0 0x1101e000 0 0x1000>;
1250 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH 0>;
1260 reg = <0 0x11021000 0 0x4000>;
1261 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
1288 snps,clk-csr = <0>;
1294 #size-cells = <0>;
1298 snps,wr_osr_lmt = <0x7>;
1299 snps,rd_osr_lmt = <0x7>;
1300 snps,blen = <0 0 0 0 16 8 4>;
1308 snps,map-to-dma-channel = <0x0>;
1312 snps,map-to-dma-channel = <0x0>;
1316 snps,map-to-dma-channel = <0x0>;
1320 snps,map-to-dma-channel = <0x0>;
1328 snps,weight = <0x10>;
1330 snps,priority = <0x0>;
1333 snps,weight = <0x11>;
1335 snps,priority = <0x1>;
1338 snps,weight = <0x12>;
1340 snps,priority = <0x2>;
1343 snps,weight = <0x13>;
1345 snps,priority = <0x3>;
1352 reg = <0 0x11201000 0 0x2dff>, <0 0x11203e00 0 0x0100>;
1354 ranges = <0 0 0 0x11200000 0 0x3f00>;
1357 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH 0>;
1364 mediatek,syscon-wakeup = <&pericfg 0x400 103>;
1367 xhci0: usb@0 {
1369 reg = <0 0 0 0x1000>;
1371 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
1389 reg = <0 0x11230000 0 0x10000>,
1390 <0 0x11f50000 0 0x1000>;
1391 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1402 reg = <0 0x11240000 0 0x1000>,
1403 <0 0x11c70000 0 0x1000>;
1404 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
1417 reg = <0 0x11250000 0 0x1000>,
1418 <0 0x11e60000 0 0x1000>;
1419 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>;
1431 reg = <0 0x11278000 0 0x1000>;
1432 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
1443 reg = <0 0x11290000 0 0x1000>,
1444 <0 0x11293e00 0 0x0100>;
1446 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH 0>;
1459 mediatek,syscon-wakeup = <&pericfg 0x400 104>;
1466 reg = <0 0x112a1000 0 0x2dff>, <0 0x112a3e00 0 0x0100>;
1468 ranges = <0 0 0 0x112a0000 0 0x3f00>;
1471 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0>;
1480 mediatek,syscon-wakeup = <&pericfg 0x400 105>;
1483 xhci2: usb@0 {
1485 reg = <0 0 0 0x1000>;
1487 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
1498 reg = <0 0x112b1000 0 0x2dff>, <0 0x112b3e00 0 0x0100>;
1500 ranges = <0 0 0 0x112b0000 0 0x3f00>;
1503 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH 0>;
1512 mediatek,syscon-wakeup = <&pericfg 0x400 106>;
1515 xhci3: usb@0 {
1517 reg = <0 0 0 0x1000>;
1519 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
1534 reg = <0 0x112f0000 0 0x4000>;
1536 interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH 0>;
1537 bus-range = <0x00 0xff>;
1538 ranges = <0x81000000 0 0x20000000
1539 0x0 0x20000000 0 0x200000>,
1540 <0x82000000 0 0x20200000
1541 0x0 0x20200000 0 0x3e00000>;
1543 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE0 0x2>;
1544 iommu-map-mask = <0x0>;
1566 interrupt-map-mask = <0 0 0 7>;
1567 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
1568 <0 0 0 2 &pcie_intc0 1>,
1569 <0 0 0 3 &pcie_intc0 2>,
1570 <0 0 0 4 &pcie_intc0 3>;
1575 #address-cells = <0>;
1586 reg = <0 0x112f8000 0 0x4000>;
1588 interrupts = <GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH 0>;
1589 bus-range = <0x00 0xff>;
1590 ranges = <0x81000000 0 0x24000000
1591 0x0 0x24000000 0 0x200000>,
1592 <0x82000000 0 0x24200000
1593 0x0 0x24200000 0 0x3e00000>;
1595 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE1 0x2>;
1596 iommu-map-mask = <0x0>;
1615 interrupt-map-mask = <0 0 0 7>;
1616 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
1617 <0 0 0 2 &pcie_intc1 1>,
1618 <0 0 0 3 &pcie_intc1 2>,
1619 <0 0 0 4 &pcie_intc1 3>;
1624 #address-cells = <0>;
1632 reg = <0 0x1132c000 0 0x1000>;
1633 interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
1639 #size-cells = <0>;
1645 reg = <0 0x11c10000 0 0x1000>;
1649 reg = <0x184 0x1>;
1650 bits = <0 5>;
1653 reg = <0x184 0x2>;
1657 reg = <0x185 0x1>;
1661 reg = <0x186 0x1>;
1662 bits = <0 5>;
1665 reg = <0x186 0x2>;
1669 reg = <0x187 0x1>;
1673 reg = <0x188 0x1>;
1674 bits = <0 5>;
1677 reg = <0x188 0x2>;
1681 reg = <0x189 0x1>;
1685 reg = <0x189 0x2>;
1689 reg = <0x190 0x1>;
1690 bits = <0 4>;
1693 reg = <0x190 0x1>;
1697 reg = <0x191 0x1>;
1698 bits = <0 4>;
1701 reg = <0x191 0x1>;
1705 reg = <0x192 0x1>;
1706 bits = <0 4>;
1709 reg = <0x192 0x1>;
1713 reg = <0x193 0x1>;
1714 bits = <0 4>;
1717 reg = <0x1ac 0x10>;
1720 reg = <0x1bc 0x14>;
1723 reg = <0x1d0 0x38>;
1726 reg = <0x580 0x64>;
1729 reg = <0x7a0 0x4>;
1737 ranges = <0 0 0x11c40000 0x700>;
1740 u2port2: usb-phy@0 {
1741 reg = <0x0 0x700>;
1752 ranges = <0 0 0x11c50000 0x700>;
1755 u2port3: usb-phy@0 {
1756 reg = <0x0 0x700>;
1765 reg = <0 0x11c80000 0 0x1000>;
1768 #clock-cells = <0>;
1769 #phy-cells = <0>;
1775 reg = <0 0x11c90000 0 0x1000>;
1778 #clock-cells = <0>;
1779 #phy-cells = <0>;
1786 reg = <0 0x11d00000 0 0x1000>,
1787 <0 0x10220580 0 0x80>;
1788 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH 0>;
1794 #size-cells = <0>;
1801 reg = <0 0x11d01000 0 0x1000>,
1802 <0 0x10220600 0 0x80>;
1803 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
1809 #size-cells = <0>;
1816 reg = <0 0x11d02000 0 0x1000>,
1817 <0 0x10220680 0 0x80>;
1818 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
1824 #size-cells = <0>;
1830 reg = <0 0x11d03000 0 0x1000>;
1837 reg = <0 0x11e00000 0 0x1000>,
1838 <0 0x10220080 0 0x80>;
1839 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0>;
1845 #size-cells = <0>;
1852 reg = <0 0x11e01000 0 0x1000>,
1853 <0 0x10220200 0 0x80>;
1854 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>;
1860 #size-cells = <0>;
1867 reg = <0 0x11e02000 0 0x1000>,
1868 <0 0x10220380 0 0x80>;
1869 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
1875 #size-cells = <0>;
1882 reg = <0 0x11e03000 0 0x1000>,
1883 <0 0x10220480 0 0x80>;
1884 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
1890 #size-cells = <0>;
1897 reg = <0 0x11e04000 0 0x1000>,
1898 <0 0x10220500 0 0x80>;
1899 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
1905 #size-cells = <0>;
1911 reg = <0 0x11e05000 0 0x1000>;
1919 ranges = <0 0 0x11e30000 0xe00>;
1923 u2port1: usb-phy@0 {
1924 reg = <0x0 0x700>;
1932 reg = <0x700 0x700>;
1948 ranges = <0 0 0x11e40000 0xe00>;
1951 u2port0: usb-phy@0 {
1952 reg = <0x0 0x700>;
1960 reg = <0x700 0x700>;
1974 reg = <0 0x11e80000 0 0x10000>;
1985 #phy-cells = <0>;
1991 reg = <0 0x11fa0000 0 0xc000>;
1994 #phy-cells = <0>;
2001 reg = <0 0x13000000 0 0x4000>;
2004 interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>,
2005 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH 0>,
2006 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH 0>;
2020 reg = <0 0x13fbf000 0 0x1000>;
2026 reg = <0 0x14000000 0 0x1000>;
2028 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0 0x1000>;
2033 reg = <0 0x14001000 0 0x1000>;
2034 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x1000 0x1000>;
2051 reg = <0 0x14002000 0 0x1000>;
2052 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>;
2058 reg = <0 0x14003000 0 0x1000>;
2059 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>;
2065 reg = <0 0x14004000 0 0x1000>;
2066 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>;
2072 reg = <0 0x14005000 0 0x1000>;
2073 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH 0>;
2074 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x5000 0x1000>;
2081 reg = <0 0x14006000 0 0x1000>;
2082 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x6000 0x1000>;
2090 reg = <0 0x14007000 0 0x1000>;
2091 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>;
2097 reg = <0 0x14008000 0 0x1000>;
2098 interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0>;
2099 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x8000 0x1000>;
2106 reg = <0 0x14009000 0 0x1000>;
2107 interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH 0>;
2108 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x9000 0x1000>;
2116 reg = <0 0x1400a000 0 0x1000>;
2117 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xa000 0x1000>;
2124 reg = <0 0x1400b000 0 0x1000>;
2125 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
2131 reg = <0 0x1400c000 0 0x1000>;
2132 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xc000 0x1000>;
2143 reg = <0 0x1400f000 0 0x1000>;
2144 interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
2145 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
2152 reg = <0 0x14010000 0 0x1000>;
2163 reg = <0 0x14011000 0 0x1000>;
2174 reg = <0 0x14012000 0 0x1000>;
2185 reg = <0 0x14013000 0 0x1000>;
2196 reg = <0 0x14018000 0 0x1000>;
2201 interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0>;
2210 reg = <0 0x14e00000 0 0x1000>;
2216 reg = <0 0x14e02000 0 0x1000>;
2222 reg = <0 0x14e03000 0 0x1000>;
2228 reg = <0 0x14e04000 0 0x1000>;
2239 reg = <0 0x14e05000 0 0x1000>;
2251 reg = <0 0x14f00000 0 0x1000>;
2253 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0 0x1000>;
2258 reg = <0 0x14f01000 0 0x1000>;
2259 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
2260 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
2267 reg = <0 0x14f02000 0 0x1000>;
2279 reg = <0 0x14f03000 0 0x1000>;
2291 reg = <0 0x14f06000 0 0x1000>;
2292 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x6000 0x1000>;
2301 reg = <0 0x14f07000 0 0x1000>;
2302 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x7000 0x1000>;
2308 reg = <0 0x14f08000 0 0x1000>;
2309 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x8000 0x1000>;
2320 reg = <0 0x14f09000 0 0x1000>;
2321 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x9000 0x1000>;
2332 reg = <0 0x14f0a000 0 0x1000>;
2333 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xa000 0x1000>;
2344 reg = <0 0x14f0b000 0 0x1000>;
2345 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xb000 0x1000>;
2351 reg = <0 0x14f0c000 0 0x1000>;
2352 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xc000 0x1000>;
2358 reg = <0 0x14f0d000 0 0x1000>;
2359 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xd000 0x1000>;
2365 reg = <0 0x14f0e000 0 0x1000>;
2366 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xe000 0x1000>;
2372 reg = <0 0x14f0f000 0 0x1000>;
2373 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xf000 0x1000>;
2379 reg = <0 0x14f10000 0 0x1000>;
2380 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0 0x1000>;
2386 reg = <0 0x14f11000 0 0x1000>;
2387 interrupts = <GIC_SPI 617 IRQ_TYPE_LEVEL_HIGH 0>;
2388 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x1000 0x1000>;
2395 reg = <0 0x14f12000 0 0x1000>;
2396 interrupts = <GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH 0>;
2397 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x2000 0x1000>;
2404 reg = <0 0x14f13000 0 0x1000>;
2405 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH 0>;
2406 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x3000 0x1000>;
2413 reg = <0 0x14f14000 0 0x1000>;
2414 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x4000 0x1000>;
2422 reg = <0 0x14f15000 0 0x1000>;
2423 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x5000 0x1000>;
2431 reg = <0 0x14f16000 0 0x1000>;
2432 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x6000 0x1000>;
2440 reg = <0 0x14f17000 0 0x1000>;
2441 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x7000 0x1000>;
2447 reg = <0 0x14f18000 0 0x1000>;
2448 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x8000 0x1000>;
2454 reg = <0 0x14f19000 0 0x1000>;
2455 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x9000 0x1000>;
2461 reg = <0 0x14f1a000 0 0x1000>;
2462 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xa000 0x1000>;
2469 reg = <0 0x14f1b000 0 0x1000>;
2470 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xb000 0x1000>;
2477 reg = <0 0x14f1c000 0 0x1000>;
2478 interrupts = <GIC_SPI 628 IRQ_TYPE_LEVEL_HIGH 0>;
2479 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xc000 0x1000>;
2486 reg = <0 0x14f1d000 0 0x1000>;
2487 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xd000 0x1000>;
2488 interrupts = <GIC_SPI 629 IRQ_TYPE_LEVEL_HIGH 0>;
2495 reg = <0 0x14f1e000 0 0x1000>;
2496 interrupts = <GIC_SPI 630 IRQ_TYPE_LEVEL_HIGH 0>;
2497 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xe000 0x1000>;
2504 reg = <0 0x14f1f000 0 0x1000>;
2505 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH 0>;
2506 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xf000 0x1000>;
2514 reg = <0 0x14f20000 0 0x1000>;
2515 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0 0x1000>;
2522 reg = <0 0x14f21000 0 0x1000>;
2523 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x1000 0x1000>;
2530 reg = <0 0x14f22000 0 0x1000>;
2531 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x2000 0x1000>;
2538 reg = <0 0x14f23000 0 0x1000>;
2539 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x3000 0x1000>;
2550 reg = <0 0x14f24000 0 0x1000>;
2551 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x4000 0x1000>;
2562 reg = <0 0x14f25000 0 0x1000>;
2563 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x5000 0x1000>;
2574 reg = <0 0x15000000 0 0x1000>;
2580 reg = <0 0x15001000 0 0x1000>;
2592 reg = <0 0x15002000 0 0x1000>;
2603 reg = <0 0x15003000 0 0x1000>;
2614 reg = <0 0x15110000 0 0x1000>;
2620 reg = <0 0x15120000 0 0x1000>;
2631 reg = <0 0x15130000 0 0x1000>;
2637 reg = <0 0x15220000 0 0x1000>;
2643 reg = <0 0x15230000 0 0x1000>;
2654 reg = <0 0x15330000 0 0x1000>;
2660 reg = <0 0x15340000 0 0x1000>;
2671 reg = <0 0x16000000 0 0x1000>;
2677 reg = <0 0x16001000 0 0x1000>;
2689 reg = <0 0x16002000 0 0x1000>;
2700 reg = <0 0x16004000 0 0x1000>;
2711 reg = <0 0x16005000 0 0x1000>;
2722 reg = <0 0x16012000 0 0x1000>;
2733 reg = <0 0x16013000 0 0x1000>;
2744 reg = <0 0x16014000 0 0x1000>;
2755 reg = <0 0x16015000 0 0x1000>;
2766 reg = <0 0x1604f000 0 0x1000>;
2772 reg = <0 0x1606f000 0 0x1000>;
2778 reg = <0 0x1608f000 0 0x1000>;
2784 reg = <0 0x160af000 0 0x1000>;
2790 reg = <0 0x16140000 0 0x1000>;
2796 reg = <0 0x16141000 0 0x1000>;
2808 reg = <0 0x16142000 0 0x1000>;
2820 reg = <0 0x17200000 0 0x1000>;
2826 reg = <0 0x17201000 0 0x1000>;
2841 reg = <0 0x18000000 0 0x1000>,
2842 <0 0x18004000 0 0x1000>;
2843 ranges = <0 0 0 0x18000000 0 0x26000>;
2847 reg = <0 0x2000 0 0x800>;
2862 reg = <0 0x10000 0 0x800>;
2863 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
2882 reg = <0 0x25000 0 0x1000>; /* VDEC_CORE_MISC */
2883 interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
2907 reg = <0 0x1800d000 0 0x1000>;
2918 reg = <0 0x1800e000 0 0x1000>;
2929 reg = <0 0x1800f000 0 0x1000>;
2935 reg = <0 0x1802e000 0 0x1000>;
2946 reg = <0 0x1802f000 0 0x1000>;
2952 reg = <0 0x1803e000 0 0x1000>;
2963 reg = <0 0x1803f000 0 0x1000>;
2969 reg = <0 0x190f3000 0 0x1000>;
2975 reg = <0 0x1a000000 0 0x1000>;
2981 reg = <0 0x1a010000 0 0x1000>;
2992 reg = <0 0x1a020000 0 0x10000>;
3002 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>;
3028 reg = <0 0x1a040000 0 0x10000>;/* JPGDEC_C0 */
3035 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
3043 reg = <0 0x1a050000 0 0x10000>;/* JPGDEC_C1 */
3050 interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0>;
3058 reg = <0 0x1b040000 0 0x10000>;/* JPGDEC_C2 */
3065 interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 0>;
3074 reg = <0 0x1b000000 0 0x1000>;
3080 reg = <0 0x1c01a000 0 0x1000>;
3081 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
3083 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
3100 reg = <0 0x1a030000 0 0x10000>;
3105 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
3113 reg = <0 0x1b030000 0 0x10000>;
3118 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0>;
3127 reg = <0 0x1b010000 0 0x1000>;
3139 reg = <0 0x1c000000 0 0x1000>;
3140 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
3144 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x0000 0x1000>;
3148 #size-cells = <0>;
3150 port@0 {
3151 reg = <0>;
3166 reg = <0 0x1c002000 0 0x1000>;
3167 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
3171 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x2000 0x1000>;
3175 #size-cells = <0>;
3177 port@0 {
3178 reg = <0>;
3195 reg = <0 0x1c003000 0 0x1000>;
3196 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
3199 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x3000 0x1000>;
3203 #size-cells = <0>;
3205 port@0 {
3206 reg = <0>;
3223 reg = <0 0x1c004000 0 0x1000>;
3224 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
3227 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x4000 0x1000>;
3231 #size-cells = <0>;
3233 port@0 {
3234 reg = <0>;
3251 reg = <0 0x1c005000 0 0x1000>;
3252 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
3255 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
3259 #size-cells = <0>;
3261 port@0 {
3262 reg = <0>;
3279 reg = <0 0x1c006000 0 0x1000>;
3280 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
3283 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x6000 0x1000>;
3287 #size-cells = <0>;
3289 port@0 {
3290 reg = <0>;
3307 reg = <0 0x1c007000 0 0x1000>;
3308 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
3311 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x7000 0x1000>;
3315 #size-cells = <0>;
3317 port@0 {
3318 reg = <0>;
3333 reg = <0 0x1c008000 0 0x1000>;
3334 interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
3347 reg = <0 0x1c009000 0 0x1000>;
3348 interrupts = <GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0>;
3351 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x9000 0x1000>;
3356 reg = <0 0x1c012000 0 0x1000>;
3357 interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
3370 reg = <0 0x1c014000 0 0x1000>;
3371 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
3374 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>;
3379 reg = <0 0x1c015000 0 0x1000>;
3380 interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
3390 reg = <0 0x1c016000 0 0x1000>;
3391 interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
3394 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x6000 0x1000>;
3400 reg = <0 0x1c018000 0 0x1000>;
3401 mediatek,larb-id = <0>;
3412 reg = <0 0x1c019000 0 0x1000>;
3424 reg = <0 0x1c100000 0 0x1000>;
3426 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x0000 0x1000>;
3433 reg = <0 0x1c01b000 0 0x1000>;
3445 reg = <0 0x1c01f000 0 0x1000>;
3450 interrupts = <GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH 0>;
3459 reg = <0 0x1c101000 0 0x1000>;
3460 interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
3463 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
3469 reg = <0 0x1c102000 0 0x1000>;
3481 reg = <0 0x1c103000 0 0x1000>;
3493 reg = <0 0x1c104000 0 0x1000>;
3494 interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
3498 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
3504 reg = <0 0x1c105000 0 0x1000>;
3505 interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>;
3509 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x5000 0x1000>;
3515 reg = <0 0x1c106000 0 0x1000>;
3516 interrupts = <GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH 0>;
3520 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x6000 0x1000>;
3526 reg = <0 0x1c107000 0 0x1000>;
3527 interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH 0>;
3531 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x7000 0x1000>;
3537 reg = <0 0x1c108000 0 0x1000>;
3538 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH 0>;
3542 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x8000 0x1000>;
3548 reg = <0 0x1c109000 0 0x1000>;
3549 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH 0>;
3553 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x9000 0x1000>;
3559 reg = <0 0x1c10a000 0 0x1000>;
3560 interrupts = <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH 0>;
3564 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xa000 0x1000>;
3570 reg = <0 0x1c10b000 0 0x1000>;
3571 interrupts = <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH 0>;
3575 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xb000 0x1000>;
3581 reg = <0 0x1c10c000 0 0x1000>;
3582 interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
3587 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
3594 reg = <0 0x1c10d000 0 0x1000>;
3595 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH 0>;
3600 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
3607 reg = <0 0x1c10e000 0 0x1000>;
3608 interrupts = <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH 0>;
3613 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
3620 reg = <0 0x1c10f000 0 0x1000>;
3621 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0>;
3626 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
3633 reg = <0 0x1c110000 0 0x1000>;
3634 interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>;
3639 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
3646 reg = <0 0x1c113000 0 0x1000>;
3647 interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0>;
3658 reg = <0 0x1c114000 0 0x1000>,
3659 <0 0x1c115000 0 0x1000>,
3660 <0 0x1c117000 0 0x1000>,
3661 <0 0x1c119000 0 0x1000>,
3662 <0 0x1c11a000 0 0x1000>,
3663 <0 0x1c11b000 0 0x1000>,
3664 <0 0x1c11c000 0 0x1000>;
3667 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x4000 0x1000>,
3668 <&gce0 SUBSYS_1c11XXXX 0x5000 0x1000>,
3669 <&gce0 SUBSYS_1c11XXXX 0x7000 0x1000>,
3670 <&gce0 SUBSYS_1c11XXXX 0x9000 0x1000>,
3671 <&gce0 SUBSYS_1c11XXXX 0xa000 0x1000>,
3672 <&gce0 SUBSYS_1c11XXXX 0xb000 0x1000>,
3673 <&gce0 SUBSYS_1c11XXXX 0xc000 0x1000>;
3694 interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH 0>; /* disp mixer */
3706 reg = <0 0x1c500000 0 0x8000>;
3710 interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
3717 reg = <0 0x1c600000 0 0x8000>;
3721 interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;