Lines Matching +full:0 +full:x15110000
27 #size-cells = <0>;
29 cpu0: cpu@0 {
32 reg = <0x000>;
50 reg = <0x100>;
68 reg = <0x200>;
86 reg = <0x300>;
104 reg = <0x400>;
122 reg = <0x500>;
140 reg = <0x600>;
158 reg = <0x700>;
214 arm,psci-suspend-param = <0x00010000>;
223 arm,psci-suspend-param = <0x00010000>;
232 arm,psci-suspend-param = <0x01010010>;
241 arm,psci-suspend-param = <0x01010010>;
281 #clock-cells = <0>;
288 #clock-cells = <0>;
295 #clock-cells = <0>;
307 opp-supported-hw = <0xff>;
312 opp-supported-hw = <0xff>;
317 opp-supported-hw = <0xff>;
322 opp-supported-hw = <0xff>;
327 opp-supported-hw = <0xff>;
332 opp-supported-hw = <0xff>;
337 opp-supported-hw = <0xff>;
342 opp-supported-hw = <0xff>;
347 opp-supported-hw = <0xff>;
352 opp-supported-hw = <0xff>;
357 opp-supported-hw = <0xff>;
362 opp-supported-hw = <0xff>;
367 opp-supported-hw = <0xff>;
372 opp-supported-hw = <0xff>;
377 opp-supported-hw = <0x8f>;
382 opp-supported-hw = <0x30>;
387 opp-supported-hw = <0x70>;
392 opp-supported-hw = <0x8f>;
397 opp-supported-hw = <0x30>;
402 opp-supported-hw = <0x70>;
444 hysteresis = <0>;
482 hysteresis = <0>;
520 hysteresis = <0>;
558 hysteresis = <0>;
596 hysteresis = <0>;
630 hysteresis = <0>;
664 hysteresis = <0>;
690 hysteresis = <0>;
723 hysteresis = <0>;
756 hysteresis = <0>;
782 hysteresis = <0>;
808 hysteresis = <0>;
834 hysteresis = <0>;
860 hysteresis = <0>;
870 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
871 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
872 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
873 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
889 reg = <0 0x0c000000 0 0x40000>,
890 <0 0x0c040000 0 0x200000>;
891 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
894 ppi_cluster0: interrupt-partition-0 {
906 reg = <0 0x10000000 0 0x1000>;
912 reg = <0 0x10001000 0 0x1000>;
919 reg = <0 0x10003000 0 0x1000>;
925 reg = <0 0x10005000 0 0x1000>,
926 <0 0x11c00000 0 0x1000>,
927 <0 0x11e10000 0 0x1000>,
928 <0 0x11e20000 0 0x1000>,
929 <0 0x11ea0000 0 0x1000>,
930 <0 0x1000b000 0 0x1000>;
935 gpio-ranges = <&pio 0 0 176>;
937 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH 0>;
943 reg = <0 0x10006000 0 0x1000>;
949 #size-cells = <0>;
956 #size-cells = <0>;
966 #size-cells = <0>;
971 #power-domain-cells = <0>;
976 #power-domain-cells = <0>;
981 #power-domain-cells = <0>;
1027 #size-cells = <0>;
1046 #size-cells = <0>;
1061 #power-domain-cells = <0>;
1069 #power-domain-cells = <0>;
1077 #power-domain-cells = <0>;
1089 #size-cells = <0>;
1104 #size-cells = <0>;
1115 #power-domain-cells = <0>;
1126 #power-domain-cells = <0>;
1142 #size-cells = <0>;
1151 #power-domain-cells = <0>;
1157 #power-domain-cells = <0>;
1163 #power-domain-cells = <0>;
1176 #power-domain-cells = <0>;
1185 #power-domain-cells = <0>;
1195 #power-domain-cells = <0>;
1203 #power-domain-cells = <0>;
1208 #power-domain-cells = <0>;
1218 #size-cells = <0>;
1225 #size-cells = <0>;
1233 #power-domain-cells = <0>;
1243 #power-domain-cells = <0>;
1249 #power-domain-cells = <0>;
1259 #power-domain-cells = <0>;
1266 reg = <0 0x10007000 0 0x100>;
1273 reg = <0 0x1000c000 0 0x1000>;
1279 reg = <0 0x10017000 0 0x1000>;
1280 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
1286 reg = <0 0x10024000 0 0x1000>;
1288 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
1296 reg = <0 0x10320000 0 0x4000>;
1297 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
1304 reg = <0 0x10330000 0 0x4000>;
1305 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
1312 reg = <0 0x10500000 0 0x100000>,
1313 <0 0x10720000 0 0xe0000>;
1315 interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
1320 reg = <0 0x10b91100 0 0x100>;
1326 reg = <0 0x11001100 0 0x100>;
1327 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
1335 reg = <0 0x11001200 0 0x100>;
1336 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1344 reg = <0 0x11001300 0 0x100>;
1345 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1353 reg = <0 0x11001400 0 0x100>;
1354 interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
1362 reg = <0 0x11002000 0 0x1000>;
1371 reg = <0 0x11003000 0 0x1000>;
1378 #size-cells = <0>;
1379 reg = <0 0x1100a000 0 0x1000>;
1380 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0>;
1390 reg = <0 0x1100b000 0 0xc00>;
1391 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 0>;
1402 #size-cells = <0>;
1403 reg = <0 0x11010000 0 0x1000>;
1404 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0>;
1415 #size-cells = <0>;
1416 reg = <0 0x11012000 0 0x1000>;
1417 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
1428 #size-cells = <0>;
1429 reg = <0 0x11013000 0 0x1000>;
1430 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1441 #size-cells = <0>;
1442 reg = <0 0x11018000 0 0x1000>;
1443 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
1454 #size-cells = <0>;
1455 reg = <0 0x11019000 0 0x1000>;
1456 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
1466 reg = <0 0x11200000 0 0x1000>,
1467 <0 0x11203e00 0 0x0100>;
1469 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
1480 mediatek,syscon-wakeup = <&pericfg 0x468 2>;
1487 reg = <0 0x11230000 0 0x10000>,
1488 <0 0x11f50000 0 0x1000>;
1489 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1500 reg = <0 0x11240000 0 0x1000>,
1501 <0 0x11eb0000 0 0x1000>;
1502 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
1514 reg = <0 0x11278000 0 0x1000>;
1515 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 0>;
1525 reg = <0 0x11280000 0 0x1000>,
1526 <0 0x10220080 0 0x80>;
1527 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH 0>;
1533 #size-cells = <0>;
1539 reg = <0 0x11281000 0 0x1000>,
1540 <0 0x10220180 0 0x80>;
1541 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0>;
1547 #size-cells = <0>;
1553 reg = <0 0x11282000 0 0x1000>,
1554 <0 0x10220280 0 0x80>;
1555 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>;
1561 #size-cells = <0>;
1567 reg = <0 0x11283000 0 0x1000>;
1573 reg = <0 0x112a0000 0 0x1000>,
1574 <0 0x112a3e00 0 0x0100>;
1576 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
1591 reg = <0 0x112b0000 0 0x1000>,
1592 <0 0x112b3e00 0 0x0100>;
1594 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
1604 mediatek,syscon-wakeup = <&pericfg 0x460 2>;
1611 reg = <0 0x1132c000 0 0x1000>;
1617 interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
1623 reg = <0 0x11e00000 0 0x1000>,
1624 <0 0x10220100 0 0x80>;
1625 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
1631 #size-cells = <0>;
1637 reg = <0 0x11e01000 0 0x1000>,
1638 <0 0x10220380 0 0x80>;
1639 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH 0>;
1645 #size-cells = <0>;
1651 reg = <0 0x11e02000 0 0x1000>;
1659 ranges = <0x0 0x0 0x11e30000 0x1000>;
1662 u2port0: usb-phy@0 {
1663 reg = <0x0 0x700>;
1675 ranges = <0x0 0x0 0x11e40000 0x1000>;
1678 u2port1: usb-phy@0 {
1679 reg = <0x0 0x700>;
1687 reg = <0x700 0x700>;
1700 ranges = <0x0 0x0 0x11e80000 0x1000>;
1703 u2port2: usb-phy@0 {
1704 reg = <0x0 0x700>;
1714 reg = <0 0x11ec0000 0 0x1000>,
1715 <0 0x10220480 0 0x80>;
1716 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH 0>;
1722 #size-cells = <0>;
1728 reg = <0 0x11ec1000 0 0x1000>,
1729 <0 0x10220600 0 0x80>;
1730 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
1736 #size-cells = <0>;
1742 reg = <0 0x11ec2000 0 0x1000>;
1748 reg = <0 0x11f20000 0 0x1000>;
1753 reg = <0x1ac 0x40>;
1759 reg = <0 0x13000000 0 0x4000>;
1762 interrupts = <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH 0>,
1763 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 0>,
1764 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH 0>;
1777 reg = <0 0x13fbf000 0 0x1000>;
1783 reg = <0 0x14000000 0 0x1000>;
1789 reg = <0 0x14e00000 0 0x1000>;
1795 reg = <0 0x14e02000 0 0x1000>;
1801 reg = <0 0x14f00000 0 0x1000>;
1807 reg = <0 0x15000000 0 0x1000>;
1813 reg = <0 0x15110000 0 0x1000>;
1819 reg = <0 0x15130000 0 0x1000>;
1825 reg = <0 0x15220000 0 0x1000>;
1831 reg = <0 0x15330000 0 0x1000>;
1837 reg = <0 0x15520000 0 0x1000>;
1843 reg = <0 0x15620000 0 0x1000>;
1849 reg = <0 0x16000000 0 0x1000>;
1855 reg = <0 0x1604f000 0 0x1000>;
1861 reg = <0 0x1606f000 0 0x1000>;
1867 reg = <0 0x1608f000 0 0x1000>;
1873 reg = <0 0x160af000 0 0x1000>;
1879 reg = <0 0x17200000 0 0x1000>;
1885 reg = <0 0x1800f000 0 0x1000>;
1891 reg = <0 0x1802f000 0 0x1000>;
1897 reg = <0 0x1a000000 0 0x1000>;
1903 reg = <0 0x1c01d000 0 0x1000>;
1905 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
1906 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xd000 0x1000>;
1911 reg = <0 0x1c100000 0 0x1000>;
1915 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0 0x1000>;