Lines Matching +full:0 +full:x11e60000
61 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0x000>;
78 performance-domains = <&performance 0>;
85 reg = <0x100>;
97 performance-domains = <&performance 0>;
104 reg = <0x200>;
116 performance-domains = <&performance 0>;
123 reg = <0x300>;
135 performance-domains = <&performance 0>;
142 reg = <0x400>;
154 performance-domains = <&performance 0>;
161 reg = <0x500>;
173 performance-domains = <&performance 0>;
180 reg = <0x600>;
199 reg = <0x700>;
256 arm,psci-suspend-param = <0x00010000>;
265 arm,psci-suspend-param = <0x00010000>;
274 arm,psci-suspend-param = <0x01010010>;
283 arm,psci-suspend-param = <0x01010010>;
323 #clock-cells = <0>;
330 #clock-cells = <0>;
337 #clock-cells = <0>;
349 opp-supported-hw = <0xff>;
354 opp-supported-hw = <0xff>;
359 opp-supported-hw = <0xff>;
364 opp-supported-hw = <0xff>;
369 opp-supported-hw = <0xff>;
374 opp-supported-hw = <0xff>;
379 opp-supported-hw = <0xff>;
384 opp-supported-hw = <0xff>;
389 opp-supported-hw = <0xff>;
394 opp-supported-hw = <0xff>;
399 opp-supported-hw = <0xff>;
404 opp-supported-hw = <0xff>;
409 opp-supported-hw = <0xff>;
414 opp-supported-hw = <0xff>;
419 opp-supported-hw = <0x8f>;
424 opp-supported-hw = <0x30>;
429 opp-supported-hw = <0x70>;
434 opp-supported-hw = <0x8f>;
439 opp-supported-hw = <0x30>;
444 opp-supported-hw = <0x70>;
491 hysteresis = <0>;
529 hysteresis = <0>;
567 hysteresis = <0>;
605 hysteresis = <0>;
643 hysteresis = <0>;
677 hysteresis = <0>;
711 hysteresis = <0>;
737 hysteresis = <0>;
770 hysteresis = <0>;
803 hysteresis = <0>;
829 hysteresis = <0>;
855 hysteresis = <0>;
881 hysteresis = <0>;
907 hysteresis = <0>;
917 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
918 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
919 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
920 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
928 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
933 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
943 reg = <0 0x0c000000 0 0x40000>,
944 <0 0x0c040000 0 0x200000>;
945 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
948 ppi_cluster0: interrupt-partition-0 {
960 reg = <0 0x10000000 0 0x1000>;
966 reg = <0 0x10001000 0 0x1000>;
973 reg = <0 0x10003000 0 0x1000>;
979 reg = <0 0x10005000 0 0x1000>,
980 <0 0x11c00000 0 0x1000>,
981 <0 0x11e10000 0 0x1000>,
982 <0 0x11e20000 0 0x1000>,
983 <0 0x11ea0000 0 0x1000>,
984 <0 0x1000b000 0 0x1000>;
989 gpio-ranges = <&pio 0 0 176>;
991 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH 0>;
997 reg = <0 0x10006000 0 0x1000>;
1003 #size-cells = <0>;
1010 #size-cells = <0>;
1020 #size-cells = <0>;
1025 #power-domain-cells = <0>;
1030 #power-domain-cells = <0>;
1035 #power-domain-cells = <0>;
1081 #size-cells = <0>;
1100 #size-cells = <0>;
1115 #power-domain-cells = <0>;
1124 #size-cells = <0>;
1132 #power-domain-cells = <0>;
1145 #size-cells = <0>;
1160 #size-cells = <0>;
1171 #power-domain-cells = <0>;
1182 #power-domain-cells = <0>;
1198 #size-cells = <0>;
1207 #power-domain-cells = <0>;
1213 #power-domain-cells = <0>;
1219 #power-domain-cells = <0>;
1232 #power-domain-cells = <0>;
1241 #power-domain-cells = <0>;
1251 #power-domain-cells = <0>;
1259 #power-domain-cells = <0>;
1264 #power-domain-cells = <0>;
1274 #size-cells = <0>;
1281 #size-cells = <0>;
1289 #power-domain-cells = <0>;
1299 #power-domain-cells = <0>;
1305 #power-domain-cells = <0>;
1315 #power-domain-cells = <0>;
1322 reg = <0 0x10007000 0 0x100>;
1329 reg = <0 0x1000c000 0 0x1000>;
1335 reg = <0 0x10017000 0 0x1000>;
1336 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
1342 reg = <0 0x10024000 0 0x1000>;
1344 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
1352 reg = <0 0x10027000 0 0xe00>, <0 0x10029000 0 0x100>;
1364 reg = <0 0x10315000 0 0x1000>;
1365 interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH 0>;
1371 reg = <0 0x10320000 0 0x4000>;
1372 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
1379 reg = <0 0x10330000 0 0x4000>;
1380 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
1387 reg = <0 0x10720000 0 0xe0000>;
1391 ranges = <0 0 0x10500000 0x100000>;
1394 scp_c0: scp@0 {
1396 reg = <0x0 0xd0000>;
1398 interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
1404 reg = <0xd0000 0x2f000>;
1406 interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0>;
1413 reg = <0 0x10b10000 0 0x10000>;
1462 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
1473 reg = <0 0x10b80000 0 0x2000>,
1474 <0 0x10d00000 0 0x80000>,
1475 <0 0x10b8b000 0 0x100>,
1476 <0 0x10b8f000 0 0x1000>;
1490 reg = <0 0x10b86100 0 0x1000>;
1491 interrupts = <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH 0>;
1492 #mbox-cells = <0>;
1497 reg = <0 0x10b87100 0 0x1000>;
1498 interrupts = <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH 0>;
1499 #mbox-cells = <0>;
1504 reg = <0 0x10b91100 0 0x100>;
1510 reg = <0 0x11001100 0 0x100>;
1511 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
1519 reg = <0 0x11001200 0 0x100>;
1520 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1528 reg = <0 0x11001300 0 0x100>;
1529 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1537 reg = <0 0x11001400 0 0x100>;
1538 interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
1546 reg = <0 0x11002000 0 0x1000>;
1555 reg = <0 0x11003000 0 0x1000>;
1562 #size-cells = <0>;
1563 reg = <0 0x1100a000 0 0x1000>;
1564 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0>;
1574 reg = <0 0x1100b000 0 0xc00>;
1575 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 0>;
1585 reg = <0 0x1100e000 0 0x1000>;
1589 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
1596 reg = <0 0x1100f000 0 0x1000>;
1600 interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>;
1608 #size-cells = <0>;
1609 reg = <0 0x11010000 0 0x1000>;
1610 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0>;
1621 #size-cells = <0>;
1622 reg = <0 0x11012000 0 0x1000>;
1623 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
1634 #size-cells = <0>;
1635 reg = <0 0x11013000 0 0x1000>;
1636 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1647 #size-cells = <0>;
1648 reg = <0 0x11018000 0 0x1000>;
1649 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
1660 #size-cells = <0>;
1661 reg = <0 0x11019000 0 0x1000>;
1662 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
1672 reg = <0 0x11201000 0 0x2dff>, <0 0x11203e00 0 0x0100>;
1674 ranges = <0 0 0 0x11200000 0 0x3f00>;
1677 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH 0>;
1686 mediatek,syscon-wakeup = <&pericfg 0x468 2>;
1689 xhci1: usb@0 {
1691 reg = <0 0 0 0x1000>;
1693 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
1705 reg = <0 0x11021000 0 0x4000>;
1706 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
1729 snps,clk-csr = <0>;
1735 #size-cells = <0>;
1739 snps,blen = <0 0 0 0 16 8 4>;
1740 snps,rd_osr_lmt = <0x7>;
1741 snps,wr_osr_lmt = <0x7>;
1750 snps,map-to-dma-channel = <0x0>;
1755 snps,map-to-dma-channel = <0x0>;
1760 snps,map-to-dma-channel = <0x0>;
1765 snps,map-to-dma-channel = <0x0>;
1775 snps,priority = <0x0>;
1776 snps,weight = <0x10>;
1781 snps,priority = <0x1>;
1782 snps,weight = <0x11>;
1787 snps,priority = <0x2>;
1788 snps,weight = <0x12>;
1793 snps,priority = <0x3>;
1794 snps,weight = <0x13>;
1801 reg = <0 0x11230000 0 0x10000>,
1802 <0 0x11f50000 0 0x1000>;
1803 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1814 reg = <0 0x11240000 0 0x1000>,
1815 <0 0x11eb0000 0 0x1000>;
1816 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
1828 reg = <0 0x11250000 0 0x1000>,
1829 <0 0x11e60000 0 0x1000>;
1830 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>;
1842 reg = <0 0x11278000 0 0x1000>;
1843 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 0>;
1853 reg = <0 0x11280000 0 0x1000>,
1854 <0 0x10220080 0 0x80>;
1855 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH 0>;
1861 #size-cells = <0>;
1867 reg = <0 0x11281000 0 0x1000>,
1868 <0 0x10220180 0 0x80>;
1869 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0>;
1875 #size-cells = <0>;
1881 reg = <0 0x11282000 0 0x1000>,
1882 <0 0x10220280 0 0x80>;
1883 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>;
1889 #size-cells = <0>;
1895 reg = <0 0x11283000 0 0x1000>;
1901 reg = <0 0x112a1000 0 0x2dff>, <0 0x112a3e00 0 0x0100>;
1903 ranges = <0 0 0 0x112a0000 0 0x3f00>;
1906 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH 0>;
1915 mediatek,syscon-wakeup = <&pericfg 0x470 2>;
1918 xhci2: usb@0 {
1920 reg = <0 0 0 0x1000>;
1922 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
1933 reg = <0 0x112b1000 0 0x2dff>, <0 0x112b3e00 0 0x0100>;
1935 ranges = <0 0 0 0x112b0000 0 0x3f00>;
1938 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0>;
1947 mediatek,syscon-wakeup = <&pericfg 0x460 2>;
1950 xhci0: usb@0 {
1952 reg = <0 0 0 0x1000>;
1954 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
1965 reg = <0 0x112f0000 0 0x2000>;
1967 ranges = <0x82000000 0 0x20000000 0 0x20000000 0 0x4000000>;
1968 bus-range = <0 0xff>;
1970 linux,pci-domain = <0>;
1984 interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH 0>;
1985 interrupt-map = <0 0 0 1 &pcie_intc 0>,
1986 <0 0 0 2 &pcie_intc 1>,
1987 <0 0 0 3 &pcie_intc 2>,
1988 <0 0 0 4 &pcie_intc 3>;
1989 interrupt-map-mask = <0 0 0 7>;
1991 iommu-map = <0 &infra_iommu IFR_IOMMU_PORT_PCIE_0 0xffff>;
1992 iommu-map-mask = <0>;
2005 #address-cells = <0>;
2013 reg = <0 0x1132c000 0 0x1000>;
2019 interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
2021 #size-cells = <0>;
2027 ranges = <0 0 0x11c20700 0x700>;
2033 pcieport: pcie-phy@0 {
2034 reg = <0 0x700>;
2043 reg = <0 0x11c80000 0 0x1000>;
2046 #clock-cells = <0>;
2047 #phy-cells = <0>;
2053 reg = <0 0x11c90000 0 0x1000>;
2056 #clock-cells = <0>;
2057 #phy-cells = <0>;
2063 reg = <0 0x11e00000 0 0x1000>,
2064 <0 0x10220100 0 0x80>;
2065 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
2071 #size-cells = <0>;
2077 reg = <0 0x11e01000 0 0x1000>,
2078 <0 0x10220380 0 0x80>;
2079 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH 0>;
2085 #size-cells = <0>;
2091 reg = <0 0x11e02000 0 0x1000>;
2099 ranges = <0x0 0x0 0x11e30000 0x1000>;
2102 u2port0: usb-phy@0 {
2103 reg = <0x0 0x700>;
2115 ranges = <0x0 0x0 0x11e40000 0x1000>;
2118 u2port1: usb-phy@0 {
2119 reg = <0x0 0x700>;
2127 reg = <0x700 0x700>;
2139 ranges = <0x0 0x0 0x11e80000 0x1000>;
2142 u2port2: usb-phy@0 {
2143 reg = <0x0 0x700>;
2153 reg = <0 0x11ec0000 0 0x1000>,
2154 <0 0x10220480 0 0x80>;
2155 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH 0>;
2161 #size-cells = <0>;
2167 reg = <0 0x11ec1000 0 0x1000>,
2168 <0 0x10220600 0 0x80>;
2169 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
2175 #size-cells = <0>;
2181 reg = <0 0x11ec2000 0 0x1000>;
2187 reg = <0 0x11f20000 0 0x1000>;
2192 reg = <0x1a0 0xc>;
2196 reg = <0x1ac 0x40>;
2200 reg = <0x581 0x1>;
2201 bits = <0 3>;
2205 reg = <0x7a0 0x4>;
2209 reg = <0x7e0 0x4>;
2215 reg = <0 0x13000000 0 0x4000>;
2218 interrupts = <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH 0>,
2219 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 0>,
2220 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH 0>;
2235 reg = <0 0x13fbf000 0 0x1000>;
2241 reg = <0 0x14000000 0 0x1000>;
2247 reg = <0 0x14001000 0 0x1000>;
2257 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x1000 0x1000>;
2265 reg = <0 0x14002000 0 0x1000>;
2267 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>;
2272 reg = <0 0x14004000 0 0x1000>;
2274 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>;
2279 reg = <0 0x14005000 0 0x1000>;
2280 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH 0>;
2283 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x5000 0x1000>;
2288 reg = <0 0x14006000 0 0x1000>;
2290 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x6000 0x1000>;
2297 reg = <0 0x14007000 0 0x1000>;
2299 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>;
2304 reg = <0 0x14008000 0 0x1000>;
2305 interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0>;
2308 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x8000 0x1000>;
2313 reg = <0 0x14009000 0 0x1000>;
2314 interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH 0>;
2317 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x9000 0x1000>;
2323 reg = <0 0x1400a000 0 0x1000>;
2326 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xa000 0x1000>;
2331 reg = <0 0x1400b000 0 0x1000>;
2333 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
2338 reg = <0 0x1400c000 0 0x1000>;
2343 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xc000 0x1000>;
2350 reg = <0 0x1400f000 0 0x1000>;
2351 interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
2354 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
2359 reg = <0 0x14012000 0 0x1000>;
2368 reg = <0 0x14013000 0 0x1000>;
2379 reg = <0 0x14018000 0 0x5000>;
2382 interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0>;
2390 reg = <0 0x14f09000 0 0x1000>;
2395 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x9000 0x1000>;
2402 reg = <0 0x14f0a000 0 0x1000>;
2407 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xa000 0x1000>;
2414 reg = <0 0x14f0c000 0 0x1000>;
2416 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xc000 0x1000>;
2421 reg = <0 0x14f0d000 0 0x1000>;
2423 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xd000 0x1000>;
2428 reg = <0 0x14f0f000 0 0x1000>;
2430 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0xf000 0x1000>;
2435 reg = <0 0x14f10000 0 0x1000>;
2437 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0 0x1000>;
2442 reg = <0 0x14f12000 0 0x1000>;
2443 interrupts = <GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH 0>;
2446 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x2000 0x1000>;
2451 reg = <0 0x14f13000 0 0x1000>;
2452 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH 0>;
2455 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x3000 0x1000>;
2460 reg = <0 0x14f15000 0 0x1000>;
2462 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x5000 0x1000>;
2469 reg = <0 0x14f16000 0 0x1000>;
2471 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x6000 0x1000>;
2478 reg = <0 0x14f18000 0 0x1000>;
2480 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x8000 0x1000>;
2485 reg = <0 0x14f19000 0 0x1000>;
2487 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0x9000 0x1000>;
2492 reg = <0 0x14f1a000 0 0x1000>;
2495 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xa000 0x1000>;
2500 reg = <0 0x14f1b000 0 0x1000>;
2503 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xb000 0x1000>;
2508 reg = <0 0x14f1d000 0 0x1000>;
2509 interrupts = <GIC_SPI 629 IRQ_TYPE_LEVEL_HIGH 0>;
2512 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xd000 0x1000>;
2517 reg = <0 0x14f1e000 0 0x1000>;
2518 interrupts = <GIC_SPI 630 IRQ_TYPE_LEVEL_HIGH 0>;
2521 mediatek,gce-client-reg = <&gce1 SUBSYS_14f1XXXX 0xe000 0x1000>;
2527 reg = <0 0x14f21000 0 0x1000>;
2530 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x1000 0x1000>;
2536 reg = <0 0x14f22000 0 0x1000>;
2539 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x2000 0x1000>;
2544 reg = <0 0x14f24000 0 0x1000>;
2549 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x4000 0x1000>;
2556 reg = <0 0x14f25000 0 0x1000>;
2561 mediatek,gce-client-reg = <&gce1 SUBSYS_14f2XXXX 0x5000 0x1000>;
2568 reg = <0 0x14e00000 0 0x1000>;
2574 reg = <0 0x14e02000 0 0x1000>;
2580 reg = <0 0x14e04000 0 0x1000>;
2591 reg = <0 0x14f00000 0 0x1000>;
2597 reg = <0 0x14f01000 0 0x1000>;
2598 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
2601 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
2606 reg = <0 0x14f02000 0 0x1000>;
2617 reg = <0 0x14f03000 0 0x1000>;
2628 reg = <0 0x15000000 0 0x1000>;
2634 reg = <0 0x15110000 0 0x1000>;
2641 reg = <0 0x15130000 0 0x1000>;
2648 reg = <0 0x15220000 0 0x1000>;
2655 reg = <0 0x15330000 0 0x1000>;
2662 reg = <0 0x15520000 0 0x1000>;
2669 reg = <0 0x15620000 0 0x1000>;
2676 reg = <0 0x16000000 0 0x1000>;
2682 reg = <0 0x1604f000 0 0x1000>;
2689 reg = <0 0x1606f000 0 0x1000>;
2696 reg = <0 0x1608f000 0 0x1000>;
2703 reg = <0 0x160af000 0 0x1000>;
2710 reg = <0 0x17200000 0 0x1000>;
2716 reg = <0 0x18000000 0 0x1000>, <0 0x18004000 0 0x1000>;
2717 ranges = <0 0 0 0x18000000 0 0x26000>;
2725 reg = <0 0x10000 0 0x800>;
2733 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
2748 reg = <0 0x25000 0 0x1000>;
2756 interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
2774 reg = <0 0x1800d000 0 0x1000>;
2785 reg = <0 0x1800f000 0 0x1000>;
2791 reg = <0 0x1802e000 0 0x1000>;
2802 reg = <0 0x1802f000 0 0x1000>;
2808 reg = <0 0x1a000000 0 0x1000>;
2814 reg = <0 0x1a010000 0 0x1000>;
2825 reg = <0 0x1a020000 0 0x10000>;
2832 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0>;
2850 reg = <0 0x1a030000 0 0x10000>;
2853 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0>;
2863 reg = <0 0x1a040000 0 0x10000>;
2867 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0>;
2879 reg = <0 0x1c000000 0 0x1000>;
2881 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
2884 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x0000 0x1000>;
2888 #size-cells = <0>;
2890 port@0 {
2891 reg = <0>;
2906 reg = <0 0x1c002000 0 0x1000>;
2908 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
2911 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x2000 0x1000>;
2915 #size-cells = <0>;
2917 port@0 {
2918 reg = <0>;
2935 reg = <0 0x1c003000 0 0x1000>;
2937 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
2939 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x3000 0x1000>;
2943 #size-cells = <0>;
2945 port@0 {
2946 reg = <0>;
2963 reg = <0 0x1c004000 0 0x1000>;
2965 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
2967 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x4000 0x1000>;
2971 #size-cells = <0>;
2973 port@0 {
2974 reg = <0>;
2991 reg = <0 0x1c005000 0 0x1000>;
2993 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
2995 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
2999 #size-cells = <0>;
3001 port@0 {
3002 reg = <0>;
3019 reg = <0 0x1c006000 0 0x1000>;
3021 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
3023 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x6000 0x1000>;
3027 #size-cells = <0>;
3029 port@0 {
3030 reg = <0>;
3045 reg = <0 0x1c007000 0 0x1000>;
3047 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
3049 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x7000 0x1000>;
3053 #size-cells = <0>;
3055 port@0 {
3056 reg = <0>;
3069 reg = <0 0x1c008000 0 0x1000>;
3074 interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
3084 reg = <0 0x1c009000 0 0x1000>;
3086 interrupts = <GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0>;
3088 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x9000 0x1000>;
3093 reg = <0 0x1c012000 0 0x1000>;
3098 interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
3108 reg = <0 0x1c014000 0 0x1000>;
3112 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
3114 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>;
3119 reg = <0 0x1c015000 0 0x1000>;
3124 interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
3131 reg = <0 0x1c016000 0 0x1000>;
3133 interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
3135 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x6000 0x1000>;
3142 reg = <0 0x1c01a000 0 0x1000>;
3144 interrupts = <GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH 0>;
3146 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
3150 #size-cells = <0>;
3152 port@0 {
3153 reg = <0>;
3166 reg = <0 0x1c01d000 0 0x1000>;
3169 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
3170 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xd000 0x1000>;
3175 reg = <0 0x1c022000 0 0x1000>;
3186 reg = <0 0x1c023000 0 0x1000>;
3197 reg = <0 0x1c024000 0 0x1000>;
3206 reg = <0 0x1c028000 0 0x5000>;
3209 interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0>;
3217 reg = <0 0x1c100000 0 0x1000>;
3221 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0 0x1000>;
3226 reg = <0 0x1c101000 0 0x1000>;
3228 interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
3230 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
3236 reg = <0 0x1c102000 0 0x1000>;
3247 reg = <0 0x1c103000 0 0x1000>;
3258 reg = <0 0x1c104000 0 0x1000>;
3260 interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
3264 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
3269 reg = <0 0x1c105000 0 0x1000>;
3271 interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>;
3275 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x5000 0x1000>;
3280 reg = <0 0x1c106000 0 0x1000>;
3282 interrupts = <GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH 0>;
3286 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x6000 0x1000>;
3291 reg = <0 0x1c107000 0 0x1000>;
3293 interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH 0>;
3297 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x7000 0x1000>;
3302 reg = <0 0x1c108000 0 0x1000>;
3304 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH 0>;
3308 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x8000 0x1000>;
3313 reg = <0 0x1c109000 0 0x1000>;
3315 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH 0>;
3319 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x9000 0x1000>;
3324 reg = <0 0x1c10a000 0 0x1000>;
3326 interrupts = <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH 0>;
3330 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xa000 0x1000>;
3335 reg = <0 0x1c10b000 0 0x1000>;
3337 interrupts = <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH 0>;
3341 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xb000 0x1000>;
3346 reg = <0 0x1c10c000 0 0x1000>;
3350 interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
3353 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
3359 reg = <0 0x1c10d000 0 0x1000>;
3363 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH 0>;
3366 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
3372 reg = <0 0x1c10e000 0 0x1000>;
3376 interrupts = <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH 0>;
3379 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
3385 reg = <0 0x1c10f000 0 0x1000>;
3389 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0>;
3392 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
3398 reg = <0 0x1c110000 0 0x1000>;
3402 interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>;
3405 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
3411 reg = <0 0x1c113000 0 0x1000>;
3416 interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0>;
3423 reg = <0 0x1c114000 0 0x1000>,
3424 <0 0x1c115000 0 0x1000>,
3425 <0 0x1c117000 0 0x1000>,
3426 <0 0x1c119000 0 0x1000>,
3427 <0 0x1c11a000 0 0x1000>,
3428 <0 0x1c11b000 0 0x1000>,
3429 <0 0x1c11c000 0 0x1000>;
3450 interrupts = <GIC_SPI 566 IRQ_TYPE_LEVEL_HIGH 0>;
3460 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x4000 0x1000>,
3461 <&gce0 SUBSYS_1c11XXXX 0x5000 0x1000>,
3462 <&gce0 SUBSYS_1c11XXXX 0x7000 0x1000>,
3463 <&gce0 SUBSYS_1c11XXXX 0x9000 0x1000>,
3464 <&gce0 SUBSYS_1c11XXXX 0xa000 0x1000>,
3465 <&gce0 SUBSYS_1c11XXXX 0xb000 0x1000>,
3466 <&gce0 SUBSYS_1c11XXXX 0xc000 0x1000>;
3471 reg = <0 0x1c11d000 0 0x1000>;
3474 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
3479 reg = <0 0x1c11e000 0 0x1000>;
3482 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xe000 0x1000>;
3487 reg = <0 0x1c11f000 0 0x1000>;
3490 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xf000 0x1000>;
3495 reg = <0 0x1c120000 0 0x1000>;
3498 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x0000 0x1000>;
3503 reg = <0 0x1c121000 0 0x1000>;
3506 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x1000 0x1000>;
3511 reg = <0 0x1c122000 0 0x1000>;
3514 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x2000 0x1000>;
3519 reg = <0 0x1c123000 0 0x1000>;
3522 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x3000 0x1000>;
3527 reg = <0 0x1c124000 0 0x1000>;
3530 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x4000 0x1000>;
3535 reg = <0 0x1c500000 0 0x8000>;
3536 interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
3546 reg = <0 0x1c600000 0 0x8000>;
3547 interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;