Lines Matching +full:0 +full:x11c00000
59 #size-cells = <0>;
61 cpu0: cpu@0 {
64 reg = <0x000>;
76 performance-domains = <&performance 0>;
83 reg = <0x100>;
95 performance-domains = <&performance 0>;
102 reg = <0x200>;
114 performance-domains = <&performance 0>;
121 reg = <0x300>;
133 performance-domains = <&performance 0>;
140 reg = <0x400>;
152 performance-domains = <&performance 0>;
159 reg = <0x500>;
171 performance-domains = <&performance 0>;
178 reg = <0x600>;
197 reg = <0x700>;
254 arm,psci-suspend-param = <0x00010000>;
263 arm,psci-suspend-param = <0x00010000>;
272 arm,psci-suspend-param = <0x01010010>;
281 arm,psci-suspend-param = <0x01010010>;
321 #clock-cells = <0>;
328 #clock-cells = <0>;
335 #clock-cells = <0>;
347 opp-supported-hw = <0xff>;
352 opp-supported-hw = <0xff>;
357 opp-supported-hw = <0xff>;
362 opp-supported-hw = <0xff>;
367 opp-supported-hw = <0xff>;
372 opp-supported-hw = <0xff>;
377 opp-supported-hw = <0xff>;
382 opp-supported-hw = <0xff>;
387 opp-supported-hw = <0xff>;
392 opp-supported-hw = <0xff>;
397 opp-supported-hw = <0xff>;
402 opp-supported-hw = <0xff>;
407 opp-supported-hw = <0xff>;
412 opp-supported-hw = <0xff>;
417 opp-supported-hw = <0x8f>;
422 opp-supported-hw = <0x30>;
427 opp-supported-hw = <0x70>;
432 opp-supported-hw = <0x8f>;
437 opp-supported-hw = <0x30>;
442 opp-supported-hw = <0x70>;
489 hysteresis = <0>;
527 hysteresis = <0>;
565 hysteresis = <0>;
603 hysteresis = <0>;
641 hysteresis = <0>;
675 hysteresis = <0>;
709 hysteresis = <0>;
735 hysteresis = <0>;
768 hysteresis = <0>;
801 hysteresis = <0>;
827 hysteresis = <0>;
853 hysteresis = <0>;
879 hysteresis = <0>;
905 hysteresis = <0>;
915 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
916 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
917 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
918 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
926 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
931 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
941 reg = <0 0x0c000000 0 0x40000>,
942 <0 0x0c040000 0 0x200000>;
943 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
946 ppi_cluster0: interrupt-partition-0 {
958 reg = <0 0x10000000 0 0x1000>;
964 reg = <0 0x10001000 0 0x1000>;
971 reg = <0 0x10003000 0 0x1000>;
977 reg = <0 0x10005000 0 0x1000>,
978 <0 0x11c00000 0 0x1000>,
979 <0 0x11e10000 0 0x1000>,
980 <0 0x11e20000 0 0x1000>,
981 <0 0x11ea0000 0 0x1000>,
982 <0 0x1000b000 0 0x1000>;
987 gpio-ranges = <&pio 0 0 176>;
989 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH 0>;
995 reg = <0 0x10006000 0 0x1000>;
1001 #size-cells = <0>;
1008 #size-cells = <0>;
1018 #size-cells = <0>;
1023 #power-domain-cells = <0>;
1028 #power-domain-cells = <0>;
1033 #power-domain-cells = <0>;
1079 #size-cells = <0>;
1098 #size-cells = <0>;
1113 #power-domain-cells = <0>;
1122 #size-cells = <0>;
1130 #power-domain-cells = <0>;
1143 #size-cells = <0>;
1158 #size-cells = <0>;
1169 #power-domain-cells = <0>;
1180 #power-domain-cells = <0>;
1196 #size-cells = <0>;
1205 #power-domain-cells = <0>;
1211 #power-domain-cells = <0>;
1217 #power-domain-cells = <0>;
1230 #power-domain-cells = <0>;
1239 #power-domain-cells = <0>;
1249 #power-domain-cells = <0>;
1257 #power-domain-cells = <0>;
1262 #power-domain-cells = <0>;
1272 #size-cells = <0>;
1279 #size-cells = <0>;
1287 #power-domain-cells = <0>;
1297 #power-domain-cells = <0>;
1303 #power-domain-cells = <0>;
1313 #power-domain-cells = <0>;
1320 reg = <0 0x10007000 0 0x100>;
1327 reg = <0 0x1000c000 0 0x1000>;
1333 reg = <0 0x10017000 0 0x1000>;
1334 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
1340 reg = <0 0x10024000 0 0x1000>;
1342 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
1350 reg = <0 0x10027000 0 0xe00>, <0 0x10029000 0 0x100>;
1362 reg = <0 0x10315000 0 0x1000>;
1363 interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH 0>;
1369 reg = <0 0x10320000 0 0x4000>;
1370 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
1377 reg = <0 0x10330000 0 0x4000>;
1378 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
1385 reg = <0 0x10500000 0 0x100000>,
1386 <0 0x10720000 0 0xe0000>;
1388 interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
1393 reg = <0 0x10b10000 0 0x10000>;
1442 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
1453 reg = <0 0x10b80000 0 0x2000>,
1454 <0 0x10d00000 0 0x80000>,
1455 <0 0x10b8b000 0 0x100>,
1456 <0 0x10b8f000 0 0x1000>;
1470 reg = <0 0x10b86100 0 0x1000>;
1471 interrupts = <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH 0>;
1472 #mbox-cells = <0>;
1477 reg = <0 0x10b87100 0 0x1000>;
1478 interrupts = <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH 0>;
1479 #mbox-cells = <0>;
1484 reg = <0 0x10b91100 0 0x100>;
1490 reg = <0 0x11001100 0 0x100>;
1491 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
1499 reg = <0 0x11001200 0 0x100>;
1500 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1508 reg = <0 0x11001300 0 0x100>;
1509 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1517 reg = <0 0x11001400 0 0x100>;
1518 interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
1526 reg = <0 0x11002000 0 0x1000>;
1535 reg = <0 0x11003000 0 0x1000>;
1542 #size-cells = <0>;
1543 reg = <0 0x1100a000 0 0x1000>;
1544 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0>;
1554 reg = <0 0x1100b000 0 0xc00>;
1555 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 0>;
1565 reg = <0 0x1100e000 0 0x1000>;
1569 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
1576 reg = <0 0x1100f000 0 0x1000>;
1580 interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>;
1588 #size-cells = <0>;
1589 reg = <0 0x11010000 0 0x1000>;
1590 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0>;
1601 #size-cells = <0>;
1602 reg = <0 0x11012000 0 0x1000>;
1603 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
1614 #size-cells = <0>;
1615 reg = <0 0x11013000 0 0x1000>;
1616 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1627 #size-cells = <0>;
1628 reg = <0 0x11018000 0 0x1000>;
1629 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
1640 #size-cells = <0>;
1641 reg = <0 0x11019000 0 0x1000>;
1642 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
1653 reg = <0 0x11021000 0 0x4000>;
1654 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
1677 snps,clk-csr = <0>;
1683 #size-cells = <0>;
1687 snps,blen = <0 0 0 0 16 8 4>;
1688 snps,rd_osr_lmt = <0x7>;
1689 snps,wr_osr_lmt = <0x7>;
1698 snps,map-to-dma-channel = <0x0>;
1703 snps,map-to-dma-channel = <0x0>;
1708 snps,map-to-dma-channel = <0x0>;
1713 snps,map-to-dma-channel = <0x0>;
1723 snps,priority = <0x0>;
1724 snps,weight = <0x10>;
1729 snps,priority = <0x1>;
1730 snps,weight = <0x11>;
1735 snps,priority = <0x2>;
1736 snps,weight = <0x12>;
1741 snps,priority = <0x3>;
1742 snps,weight = <0x13>;
1749 reg = <0 0x11200000 0 0x1000>,
1750 <0 0x11203e00 0 0x0100>;
1752 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
1763 mediatek,syscon-wakeup = <&pericfg 0x468 2>;
1770 reg = <0 0x11230000 0 0x10000>,
1771 <0 0x11f50000 0 0x1000>;
1772 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1783 reg = <0 0x11240000 0 0x1000>,
1784 <0 0x11eb0000 0 0x1000>;
1785 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
1797 reg = <0 0x11278000 0 0x1000>;
1798 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 0>;
1808 reg = <0 0x11280000 0 0x1000>,
1809 <0 0x10220080 0 0x80>;
1810 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH 0>;
1816 #size-cells = <0>;
1822 reg = <0 0x11281000 0 0x1000>,
1823 <0 0x10220180 0 0x80>;
1824 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0>;
1830 #size-cells = <0>;
1836 reg = <0 0x11282000 0 0x1000>,
1837 <0 0x10220280 0 0x80>;
1838 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>;
1844 #size-cells = <0>;
1850 reg = <0 0x11283000 0 0x1000>;
1856 reg = <0 0x112a0000 0 0x1000>,
1857 <0 0x112a3e00 0 0x0100>;
1859 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
1874 reg = <0 0x112b0000 0 0x1000>,
1875 <0 0x112b3e00 0 0x0100>;
1877 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
1887 mediatek,syscon-wakeup = <&pericfg 0x460 2>;
1894 reg = <0 0x112f0000 0 0x2000>;
1896 ranges = <0x82000000 0 0x20000000 0 0x20000000 0 0x4000000>;
1897 bus-range = <0 0xff>;
1899 linux,pci-domain = <0>;
1913 interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH 0>;
1914 interrupt-map = <0 0 0 1 &pcie_intc 0>,
1915 <0 0 0 2 &pcie_intc 1>,
1916 <0 0 0 3 &pcie_intc 2>,
1917 <0 0 0 4 &pcie_intc 3>;
1918 interrupt-map-mask = <0 0 0 7>;
1920 iommu-map = <0 &infra_iommu IFR_IOMMU_PORT_PCIE_0 0xffff>;
1921 iommu-map-mask = <0>;
1934 #address-cells = <0>;
1942 reg = <0 0x1132c000 0 0x1000>;
1948 interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
1950 #size-cells = <0>;
1956 ranges = <0 0 0x11c20700 0x700>;
1962 pcieport: pcie-phy@0 {
1963 reg = <0 0x700>;
1972 reg = <0 0x11c80000 0 0x1000>;
1975 #clock-cells = <0>;
1976 #phy-cells = <0>;
1982 reg = <0 0x11c90000 0 0x1000>;
1985 #clock-cells = <0>;
1986 #phy-cells = <0>;
1992 reg = <0 0x11e00000 0 0x1000>,
1993 <0 0x10220100 0 0x80>;
1994 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
2000 #size-cells = <0>;
2006 reg = <0 0x11e01000 0 0x1000>,
2007 <0 0x10220380 0 0x80>;
2008 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH 0>;
2014 #size-cells = <0>;
2020 reg = <0 0x11e02000 0 0x1000>;
2028 ranges = <0x0 0x0 0x11e30000 0x1000>;
2031 u2port0: usb-phy@0 {
2032 reg = <0x0 0x700>;
2044 ranges = <0x0 0x0 0x11e40000 0x1000>;
2047 u2port1: usb-phy@0 {
2048 reg = <0x0 0x700>;
2056 reg = <0x700 0x700>;
2068 ranges = <0x0 0x0 0x11e80000 0x1000>;
2071 u2port2: usb-phy@0 {
2072 reg = <0x0 0x700>;
2082 reg = <0 0x11ec0000 0 0x1000>,
2083 <0 0x10220480 0 0x80>;
2084 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH 0>;
2090 #size-cells = <0>;
2096 reg = <0 0x11ec1000 0 0x1000>,
2097 <0 0x10220600 0 0x80>;
2098 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
2104 #size-cells = <0>;
2110 reg = <0 0x11ec2000 0 0x1000>;
2116 reg = <0 0x11f20000 0 0x1000>;
2121 reg = <0x1a0 0xc>;
2125 reg = <0x1ac 0x40>;
2129 reg = <0x7a0 0x4>;
2133 reg = <0x7e0 0x4>;
2139 reg = <0 0x13000000 0 0x4000>;
2142 interrupts = <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH 0>,
2143 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 0>,
2144 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH 0>;
2157 reg = <0 0x13fbf000 0 0x1000>;
2163 reg = <0 0x14000000 0 0x1000>;
2169 reg = <0 0x14012000 0 0x1000>;
2178 reg = <0 0x14013000 0 0x1000>;
2189 reg = <0 0x14018000 0 0x5000>;
2192 interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0>;
2200 reg = <0 0x14e00000 0 0x1000>;
2206 reg = <0 0x14e02000 0 0x1000>;
2212 reg = <0 0x14e04000 0 0x1000>;
2223 reg = <0 0x14f00000 0 0x1000>;
2229 reg = <0 0x14f02000 0 0x1000>;
2240 reg = <0 0x14f03000 0 0x1000>;
2251 reg = <0 0x15000000 0 0x1000>;
2257 reg = <0 0x15110000 0 0x1000>;
2263 reg = <0 0x15130000 0 0x1000>;
2269 reg = <0 0x15220000 0 0x1000>;
2275 reg = <0 0x15330000 0 0x1000>;
2281 reg = <0 0x15520000 0 0x1000>;
2287 reg = <0 0x15620000 0 0x1000>;
2293 reg = <0 0x16000000 0 0x1000>;
2299 reg = <0 0x1604f000 0 0x1000>;
2305 reg = <0 0x1606f000 0 0x1000>;
2311 reg = <0 0x1608f000 0 0x1000>;
2317 reg = <0 0x160af000 0 0x1000>;
2323 reg = <0 0x17200000 0 0x1000>;
2329 reg = <0 0x18000000 0 0x1000>, <0 0x18004000 0 0x1000>;
2330 ranges = <0 0 0 0x18000000 0 0x26000>;
2338 reg = <0 0x10000 0 0x800>;
2346 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
2361 reg = <0 0x25000 0 0x1000>;
2369 interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
2387 reg = <0 0x1800d000 0 0x1000>;
2398 reg = <0 0x1800f000 0 0x1000>;
2404 reg = <0 0x1802e000 0 0x1000>;
2415 reg = <0 0x1802f000 0 0x1000>;
2421 reg = <0 0x1a000000 0 0x1000>;
2427 reg = <0 0x1a010000 0 0x1000>;
2438 reg = <0 0x1a020000 0 0x10000>;
2445 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0>;
2463 reg = <0 0x1a030000 0 0x10000>;
2466 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0>;
2476 reg = <0 0x1a040000 0 0x10000>;
2480 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0>;
2492 reg = <0 0x1c000000 0 0x1000>;
2494 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
2497 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x0000 0x1000>;
2502 reg = <0 0x1c002000 0 0x1000>;
2504 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
2507 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x2000 0x1000>;
2512 reg = <0 0x1c003000 0 0x1000>;
2514 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
2516 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x3000 0x1000>;
2521 reg = <0 0x1c004000 0 0x1000>;
2523 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
2525 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x4000 0x1000>;
2530 reg = <0 0x1c005000 0 0x1000>;
2532 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
2534 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
2539 reg = <0 0x1c006000 0 0x1000>;
2541 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
2543 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x6000 0x1000>;
2548 reg = <0 0x1c007000 0 0x1000>;
2550 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
2552 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x7000 0x1000>;
2557 reg = <0 0x1c008000 0 0x1000>;
2562 interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
2572 reg = <0 0x1c012000 0 0x1000>;
2577 interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
2587 reg = <0 0x1c015000 0 0x1000>;
2592 interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
2599 reg = <0 0x1c016000 0 0x1000>;
2601 interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
2603 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x6000 0x1000>;
2610 reg = <0 0x1c01a000 0 0x1000>;
2612 interrupts = <GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH 0>;
2614 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
2619 reg = <0 0x1c01d000 0 0x1000>;
2622 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
2623 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xd000 0x1000>;
2628 reg = <0 0x1c022000 0 0x1000>;
2639 reg = <0 0x1c023000 0 0x1000>;
2650 reg = <0 0x1c024000 0 0x1000>;
2659 reg = <0 0x1c028000 0 0x5000>;
2662 interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0>;
2670 reg = <0 0x1c100000 0 0x1000>;
2674 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0 0x1000>;
2679 reg = <0 0x1c101000 0 0x1000>;
2681 interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
2683 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
2689 reg = <0 0x1c102000 0 0x1000>;
2700 reg = <0 0x1c103000 0 0x1000>;
2711 reg = <0 0x1c104000 0 0x1000>;
2713 interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
2717 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
2722 reg = <0 0x1c105000 0 0x1000>;
2724 interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>;
2728 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x5000 0x1000>;
2733 reg = <0 0x1c106000 0 0x1000>;
2735 interrupts = <GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH 0>;
2739 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x6000 0x1000>;
2744 reg = <0 0x1c107000 0 0x1000>;
2746 interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH 0>;
2750 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x7000 0x1000>;
2755 reg = <0 0x1c108000 0 0x1000>;
2757 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH 0>;
2761 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x8000 0x1000>;
2766 reg = <0 0x1c109000 0 0x1000>;
2768 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH 0>;
2772 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x9000 0x1000>;
2777 reg = <0 0x1c10a000 0 0x1000>;
2779 interrupts = <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH 0>;
2783 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xa000 0x1000>;
2788 reg = <0 0x1c10b000 0 0x1000>;
2790 interrupts = <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH 0>;
2794 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xb000 0x1000>;
2799 reg = <0 0x1c10c000 0 0x1000>;
2803 interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
2806 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
2812 reg = <0 0x1c10d000 0 0x1000>;
2816 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH 0>;
2819 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
2825 reg = <0 0x1c10e000 0 0x1000>;
2829 interrupts = <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH 0>;
2832 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
2838 reg = <0 0x1c10f000 0 0x1000>;
2842 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0>;
2845 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
2851 reg = <0 0x1c110000 0 0x1000>;
2855 interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>;
2858 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
2864 reg = <0 0x1c113000 0 0x1000>;
2869 interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0>;
2876 reg = <0 0x1c114000 0 0x1000>,
2877 <0 0x1c115000 0 0x1000>,
2878 <0 0x1c117000 0 0x1000>,
2879 <0 0x1c119000 0 0x1000>,
2880 <0 0x1c11a000 0 0x1000>,
2881 <0 0x1c11b000 0 0x1000>,
2882 <0 0x1c11c000 0 0x1000>;
2903 interrupts = <GIC_SPI 566 IRQ_TYPE_LEVEL_HIGH 0>;
2913 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x4000 0x1000>,
2914 <&gce0 SUBSYS_1c11XXXX 0x5000 0x1000>,
2915 <&gce0 SUBSYS_1c11XXXX 0x7000 0x1000>,
2916 <&gce0 SUBSYS_1c11XXXX 0x9000 0x1000>,
2917 <&gce0 SUBSYS_1c11XXXX 0xa000 0x1000>,
2918 <&gce0 SUBSYS_1c11XXXX 0xb000 0x1000>,
2919 <&gce0 SUBSYS_1c11XXXX 0xc000 0x1000>;
2924 reg = <0 0x1c11d000 0 0x1000>;
2927 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
2932 reg = <0 0x1c11e000 0 0x1000>;
2935 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xe000 0x1000>;
2940 reg = <0 0x1c11f000 0 0x1000>;
2943 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xf000 0x1000>;
2948 reg = <0 0x1c120000 0 0x1000>;
2951 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x0000 0x1000>;
2956 reg = <0 0x1c121000 0 0x1000>;
2959 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x1000 0x1000>;
2964 reg = <0 0x1c122000 0 0x1000>;
2967 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x2000 0x1000>;
2972 reg = <0 0x1c123000 0 0x1000>;
2975 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x3000 0x1000>;
2980 reg = <0 0x1c124000 0 0x1000>;
2983 mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x4000 0x1000>;
2988 reg = <0 0x1c500000 0 0x8000>;
2989 interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
2999 reg = <0 0x1c600000 0 0x8000>;
3000 interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;