Lines Matching +full:0 +full:x1400e000
35 reg = <0 0x1000ce00 0 0x200>;
336 #size-cells = <0>;
374 cpu0: cpu@0 {
377 reg = <0x000>;
401 reg = <0x100>;
425 reg = <0x200>;
449 reg = <0x300>;
473 reg = <0x400>;
497 reg = <0x500>;
521 reg = <0x600>;
545 reg = <0x700>;
571 arm,psci-suspend-param = <0x00010001>;
580 arm,psci-suspend-param = <0x00010001>;
589 arm,psci-suspend-param = <0x01010001>;
598 arm,psci-suspend-param = <0x01010001>;
638 #clock-cells = <0>;
647 #clock-cells = <0>;
654 #clock-cells = <0>;
665 opp-supported-hw = <0xff>;
671 opp-supported-hw = <0xff>;
677 opp-supported-hw = <0xff>;
683 opp-supported-hw = <0xff>;
689 opp-supported-hw = <0xff>;
695 opp-supported-hw = <0xff>;
701 opp-supported-hw = <0xff>;
707 opp-supported-hw = <0xff>;
713 opp-supported-hw = <0xff>;
719 opp-supported-hw = <0xff>;
725 opp-supported-hw = <0xff>;
731 opp-supported-hw = <0xff>;
737 opp-supported-hw = <0xff>;
743 opp-supported-hw = <0xcf>;
749 opp-supported-hw = <0x10>;
755 opp-supported-hw = <0x20>;
761 opp-supported-hw = <0xcf>;
767 opp-supported-hw = <0x10>;
773 opp-supported-hw = <0x20>;
779 opp-supported-hw = <0xcf>;
785 opp-supported-hw = <0x10>;
791 opp-supported-hw = <0x20>;
815 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
816 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
817 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
818 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
825 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
834 reg = <0 0x0c000000 0 0x40000>,
835 <0 0x0c040000 0 0x200000>;
836 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
839 ppi_cluster0: interrupt-partition-0 {
851 reg = <0 0xc53a000 0 0x1000>;
857 reg = <0 0x10000000 0 0x1000>;
863 reg = <0 0x10001000 0 0x1000>;
870 reg = <0 0x10003000 0 0x1000>;
875 reg = <0 0x10005000 0 0x1000>,
876 <0 0x10002000 0 0x0200>,
877 <0 0x10002200 0 0x0200>,
878 <0 0x10002400 0 0x0200>,
879 <0 0x10002600 0 0x0200>,
880 <0 0x10002a00 0 0x0200>,
881 <0 0x10002c00 0 0x0200>,
882 <0 0x1000b000 0 0x1000>;
887 gpio-ranges = <&pio 0 0 185>;
889 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>;
895 reg = <0 0x10006000 0 0x1000>;
901 #size-cells = <0>;
910 #size-cells = <0>;
917 #size-cells = <0>;
922 #power-domain-cells = <0>;
927 #power-domain-cells = <0>;
938 #power-domain-cells = <0>;
946 #power-domain-cells = <0>;
954 #power-domain-cells = <0>;
964 #size-cells = <0>;
970 #size-cells = <0>;
976 #power-domain-cells = <0>;
984 #power-domain-cells = <0>;
1002 #size-cells = <0>;
1011 #power-domain-cells = <0>;
1029 #size-cells = <0>;
1034 #power-domain-cells = <0>;
1039 #power-domain-cells = <0>;
1050 #size-cells = <0>;
1055 #power-domain-cells = <0>;
1072 #power-domain-cells = <0>;
1081 #power-domain-cells = <0>;
1093 #power-domain-cells = <0>;
1102 reg = <0 0x10007000 0 0x1000>;
1108 reg = <0 0x1000c000 0 0x1000>;
1114 reg = <0 0x1000d000 0 0x1000>;
1116 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1124 reg = <0 0x10015000 0 0x000e00>, <0 0x1001B000 0 0x000100>;
1132 interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH 0>,
1133 <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH 0>;
1140 reg = <0 0x10017000 0 0x1000>;
1141 interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 0>;
1147 reg = <0 0X1022c000 0 0x4000>;
1150 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
1156 reg = <0 0x10500000 0 0x40000>,
1157 <0 0x105c0000 0 0x19080>;
1159 interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 0>;
1164 reg = <0 0x10680000 0 0x2000>, <0 0x10800000 0 0x100000>,
1165 <0 0x1068b000 0 0x100>, <0 0x1068f000 0 0x1000>;
1180 #mbox-cells = <0>;
1181 reg = <0 0x10686100 0 0x1000>;
1182 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH 0>;
1187 #mbox-cells = <0>;
1188 reg = <0 0x10687100 0 0x1000>;
1189 interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH 0>;
1194 reg = <0 0x11000000 0 0x1000>;
1202 interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH 0>;
1208 reg = <0 0x11001000 0 0x1000>;
1217 reg = <0 0x11002000 0 0x1000>;
1218 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;
1227 reg = <0 0x11003000 0 0x1000>;
1228 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1236 reg = <0 0x11007000 0 0x1000>,
1237 <0 0x10200100 0 0x100>;
1238 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
1244 #size-cells = <0>;
1250 reg = <0 0x11008000 0 0x1000>,
1251 <0 0x10200200 0 0x100>;
1252 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1258 #size-cells = <0>;
1264 reg = <0 0x11009000 0 0x1000>,
1265 <0 0x10200300 0 0x180>;
1266 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH 0>;
1272 #size-cells = <0>;
1278 reg = <0 0x1100f000 0 0x1000>,
1279 <0 0x10200480 0 0x100>;
1280 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>;
1286 #size-cells = <0>;
1292 reg = <0 0x11011000 0 0x1000>,
1293 <0 0x10200580 0 0x180>;
1294 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
1300 #size-cells = <0>;
1306 reg = <0 0x11016000 0 0x1000>,
1307 <0 0x10200700 0 0x100>;
1308 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0>;
1314 #size-cells = <0>;
1320 reg = <0 0x1100d000 0 0x1000>,
1321 <0 0x10200800 0 0x100>;
1322 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0>;
1328 #size-cells = <0>;
1334 reg = <0 0x11004000 0 0x1000>,
1335 <0 0x10200900 0 0x180>;
1336 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
1342 #size-cells = <0>;
1348 reg = <0 0x11005000 0 0x1000>,
1349 <0 0x10200A80 0 0x180>;
1350 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1356 #size-cells = <0>;
1363 #size-cells = <0>;
1364 reg = <0 0x1100a000 0 0x1000>;
1365 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH 0>;
1375 reg = <0 0x1100b000 0 0x1000>;
1376 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
1386 reg = <0 0x1100bc00 0 0x400>;
1387 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1398 reg = <0 0x1100e000 0 0x1000>;
1399 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1410 #size-cells = <0>;
1411 reg = <0 0x11010000 0 0x1000>;
1412 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH 0>;
1423 #size-cells = <0>;
1424 reg = <0 0x11012000 0 0x1000>;
1425 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH 0>;
1436 #size-cells = <0>;
1437 reg = <0 0x11013000 0 0x1000>;
1438 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0>;
1449 #size-cells = <0>;
1450 reg = <0 0x11014000 0 0x1000>;
1451 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1462 #size-cells = <0>;
1463 reg = <0 0x11015000 0 0x1000>;
1464 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1474 reg = <0 0x11017000 0 0x1000>;
1481 reg = <0 0x11018000 0 0x1000>;
1482 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH 0>;
1490 reg = <0 0x11019000 0 0x1000>,
1491 <0 0x10200c00 0 0x180>;
1492 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH 0>;
1498 #size-cells = <0>;
1504 reg = <0 0x11210000 0 0x2000>;
1555 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
1566 reg = <0 0x11201000 0 0x2dff>, <0 0x11203e00 0 0x0100>;
1574 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>;
1584 reg = <0 0x11200000 0 0x1000>;
1592 interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0>;
1593 mediatek,syscon-wakeup = <&pericfg 0x420 2>;
1602 reg = <0 0x11230000 0 0x10000>,
1603 <0 0x11cd0000 0 0x1000>;
1609 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
1618 reg = <0 0x11240000 0 0x1000>,
1619 <0 0x11c90000 0 0x1000>;
1624 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
1632 reg = <0 0x11281000 0 0x2dff>, <0 0x11283e00 0 0x0100>;
1640 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0>;
1650 reg = <0 0x11280000 0 0x1000>;
1658 interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0>;
1659 mediatek,syscon-wakeup = <&pericfg 0x424 2>;
1670 ranges = <0x0 0x0 0x11c80000 0x1000>;
1673 u2port1: usb-phy@0 {
1674 reg = <0x0 0x700>;
1681 reg = <0x700 0x900>;
1693 ranges = <0x0 0x0 0x11ca0000 0x1000>;
1696 u2port0: usb-phy@0 {
1697 reg = <0x0 0x700>;
1701 mediatek,discth = <0x8>;
1707 reg = <0 0x11cb0000 0 0x1000>;
1712 reg = <0x1cc 0x14>;
1716 reg = <0x2f8 0x14>;
1720 reg = <0x550 0x50>;
1724 reg = <0x59c 0x4>;
1725 bits = <0 3>;
1729 reg = <0x7a0 0x4>;
1735 reg = <0 0x11cc0000 0 0x1000>;
1737 #clock-cells = <0>;
1738 #phy-cells = <0>;
1745 reg = <0 0x13000000 0 0x1000>;
1752 reg = <0 0x13040000 0 0x4000>;
1755 interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH 0>,
1756 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH 0>,
1757 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH 0>;
1772 reg = <0 0x14000000 0 0x1000>;
1775 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
1777 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
1782 reg = <0 0x14001000 0 0x1000>;
1784 interrupts = <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0>;
1785 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
1793 reg = <0 0x14002000 0 0x1000>;
1802 reg = <0 0x14003000 0 0x1000>;
1806 mediatek,larb-id = <0>;
1813 reg = <0 0x14004000 0 0x1000>;
1824 reg = <0 0x14005000 0 0x1000>;
1826 interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH 0>;
1828 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
1834 reg = <0 0x14006000 0 0x1000>;
1836 interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH 0>;
1838 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
1844 reg = <0 0x14007000 0 0x1000>;
1846 interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH 0>;
1848 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x7000 0x1000>;
1854 reg = <0 0x14009000 0 0x1000>;
1856 interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH 0>;
1857 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>;
1863 reg = <0 0x1400a000 0 0x1000>;
1870 interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>;
1881 reg = <0 0x1400b000 0 0x1000>;
1883 interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH 0>;
1884 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>;
1890 reg = <0 0x1400c000 0 0x1000>;
1892 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH 0>;
1893 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;
1899 reg = <0 0x1400d000 0 0x1000>;
1901 interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH 0>;
1902 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
1909 reg = <0 0x1400e000 0 0x1000>;
1911 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH 0>;
1912 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>;
1918 reg = <0 0x1400f000 0 0x1000>;
1920 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH 0>;
1921 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
1927 reg = <0 0x14013000 0 0x1000>;
1932 interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 0>;
1946 reg = <0 0x14016000 0 0x1000>;
1949 interrupts = <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 0>;
1960 reg = <0 0x1401f000 0 0x1000>;
1962 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 0>;
1964 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xf000 0x1000>;
1970 reg = <0 0x14020000 0 0x1000>;
1976 reg = <0 0x14023000 0 0x1000>;
1987 reg = <0 0x15020000 0 0x1000>;
1993 reg = <0 0x1502e000 0 0x1000>;
2004 reg = <0 0x15820000 0 0x1000>;
2010 reg = <0 0x1582e000 0 0x1000>;
2021 reg = <0 0x16000000 0 0x1000>;
2025 dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
2031 reg = <0 0x16025000 0 0x1000>;
2032 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
2058 reg = <0 0x1602e000 0 0x1000>;
2069 reg = <0 0x1602f000 0 0x1000>;
2075 reg = <0 0x17000000 0 0x1000>;
2081 reg = <0 0x17010000 0 0x1000>;
2092 reg = <0 0x17020000 0 0x2000>;
2093 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
2113 reg = <0 0x17030000 0 0x10000>;
2114 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>;
2126 reg = <0 0x1a000000 0 0x1000>;
2132 reg = <0 0x1a001000 0 0x1000>;
2142 reg = <0 0x1a002000 0 0x1000>;
2152 reg = <0 0x1a00f000 0 0x1000>;
2163 reg = <0 0x1a010000 0 0x1000>;
2174 reg = <0 0x1a04f000 0 0x1000>;
2180 reg = <0 0x1a06f000 0 0x1000>;
2186 reg = <0 0x1b000000 0 0x1000>;
2192 reg = <0 0x1b002000 0 0x1000>;
2202 reg = <0 0x1c000000 0 0x1000>;
2208 reg = <0 0x1c00f000 0 0x1000>;
2218 reg = <0 0x1c10f000 0 0x1000>;
2248 hysteresis = <0>;
2286 hysteresis = <0>;
2324 hysteresis = <0>;
2362 hysteresis = <0>;
2388 hysteresis = <0>;
2414 hysteresis = <0>;
2440 hysteresis = <0>;
2473 hysteresis = <0>;
2507 hysteresis = <0>;