Lines Matching +full:0 +full:x11012000
329 #size-cells = <0>;
367 cpu0: cpu@0 {
370 reg = <0x000>;
394 reg = <0x100>;
418 reg = <0x200>;
442 reg = <0x300>;
466 reg = <0x400>;
490 reg = <0x500>;
514 reg = <0x600>;
538 reg = <0x700>;
564 arm,psci-suspend-param = <0x00010001>;
573 arm,psci-suspend-param = <0x00010001>;
582 arm,psci-suspend-param = <0x01010001>;
591 arm,psci-suspend-param = <0x01010001>;
631 #clock-cells = <0>;
640 #clock-cells = <0>;
647 #clock-cells = <0>;
658 opp-supported-hw = <0xff>;
664 opp-supported-hw = <0xff>;
670 opp-supported-hw = <0xff>;
676 opp-supported-hw = <0xff>;
682 opp-supported-hw = <0xff>;
688 opp-supported-hw = <0xff>;
694 opp-supported-hw = <0xff>;
700 opp-supported-hw = <0xff>;
706 opp-supported-hw = <0xff>;
712 opp-supported-hw = <0xff>;
718 opp-supported-hw = <0xff>;
724 opp-supported-hw = <0xff>;
730 opp-supported-hw = <0xff>;
736 opp-supported-hw = <0xcf>;
742 opp-supported-hw = <0x10>;
748 opp-supported-hw = <0x20>;
754 opp-supported-hw = <0xcf>;
760 opp-supported-hw = <0x10>;
766 opp-supported-hw = <0x20>;
772 opp-supported-hw = <0xcf>;
778 opp-supported-hw = <0x10>;
784 opp-supported-hw = <0x20>;
808 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
809 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
810 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
811 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
818 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
827 reg = <0 0x0c000000 0 0x40000>,
828 <0 0x0c040000 0 0x200000>;
829 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
832 ppi_cluster0: interrupt-partition-0 {
844 reg = <0 0xc53a000 0 0x1000>;
850 reg = <0 0x10000000 0 0x1000>;
856 reg = <0 0x10001000 0 0x1000>;
863 reg = <0 0x10003000 0 0x1000>;
868 reg = <0 0x10005000 0 0x1000>,
869 <0 0x10002000 0 0x0200>,
870 <0 0x10002200 0 0x0200>,
871 <0 0x10002400 0 0x0200>,
872 <0 0x10002600 0 0x0200>,
873 <0 0x10002a00 0 0x0200>,
874 <0 0x10002c00 0 0x0200>,
875 <0 0x1000b000 0 0x1000>;
880 gpio-ranges = <&pio 0 0 185>;
882 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>;
888 reg = <0 0x10006000 0 0x1000>;
894 #size-cells = <0>;
903 #size-cells = <0>;
910 #size-cells = <0>;
915 #power-domain-cells = <0>;
920 #power-domain-cells = <0>;
931 #power-domain-cells = <0>;
939 #power-domain-cells = <0>;
947 #power-domain-cells = <0>;
957 #size-cells = <0>;
963 #size-cells = <0>;
969 #power-domain-cells = <0>;
977 #power-domain-cells = <0>;
995 #size-cells = <0>;
1004 #power-domain-cells = <0>;
1022 #size-cells = <0>;
1027 #power-domain-cells = <0>;
1032 #power-domain-cells = <0>;
1043 #size-cells = <0>;
1048 #power-domain-cells = <0>;
1065 #power-domain-cells = <0>;
1074 #power-domain-cells = <0>;
1086 #power-domain-cells = <0>;
1095 reg = <0 0x10007000 0 0x1000>;
1101 reg = <0 0x1000c000 0 0x1000>;
1107 reg = <0 0x1000d000 0 0x1000>;
1109 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1117 reg = <0 0x10015000 0 0x000e00>, <0 0x1001B000 0 0x000100>;
1125 interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH 0>,
1126 <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH 0>;
1133 reg = <0 0x10017000 0 0x1000>;
1134 interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 0>;
1140 reg = <0 0X1022c000 0 0x4000>;
1143 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
1149 reg = <0 0x10500000 0 0x40000>,
1150 <0 0x105c0000 0 0x19080>;
1152 interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 0>;
1157 reg = <0 0x10680000 0 0x2000>, <0 0x10800000 0 0x100000>,
1158 <0 0x1068b000 0 0x100>, <0 0x1068f000 0 0x1000>;
1173 #mbox-cells = <0>;
1174 reg = <0 0x10686100 0 0x1000>;
1175 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH 0>;
1180 #mbox-cells = <0>;
1181 reg = <0 0x10687100 0 0x1000>;
1182 interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH 0>;
1187 reg = <0 0x11000000 0 0x1000>;
1195 interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH 0>;
1201 reg = <0 0x11001000 0 0x1000>;
1210 reg = <0 0x11002000 0 0x1000>;
1211 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;
1220 reg = <0 0x11003000 0 0x1000>;
1221 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1229 reg = <0 0x11007000 0 0x1000>,
1230 <0 0x10200100 0 0x100>;
1231 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
1237 #size-cells = <0>;
1243 reg = <0 0x11008000 0 0x1000>,
1244 <0 0x10200200 0 0x100>;
1245 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1251 #size-cells = <0>;
1257 reg = <0 0x11009000 0 0x1000>,
1258 <0 0x10200300 0 0x180>;
1259 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH 0>;
1265 #size-cells = <0>;
1271 reg = <0 0x1100f000 0 0x1000>,
1272 <0 0x10200480 0 0x100>;
1273 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>;
1279 #size-cells = <0>;
1285 reg = <0 0x11011000 0 0x1000>,
1286 <0 0x10200580 0 0x180>;
1287 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
1293 #size-cells = <0>;
1299 reg = <0 0x11016000 0 0x1000>,
1300 <0 0x10200700 0 0x100>;
1301 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0>;
1307 #size-cells = <0>;
1313 reg = <0 0x1100d000 0 0x1000>,
1314 <0 0x10200800 0 0x100>;
1315 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0>;
1321 #size-cells = <0>;
1327 reg = <0 0x11004000 0 0x1000>,
1328 <0 0x10200900 0 0x180>;
1329 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
1335 #size-cells = <0>;
1341 reg = <0 0x11005000 0 0x1000>,
1342 <0 0x10200A80 0 0x180>;
1343 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1349 #size-cells = <0>;
1356 #size-cells = <0>;
1357 reg = <0 0x1100a000 0 0x1000>;
1358 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH 0>;
1368 reg = <0 0x1100b000 0 0x1000>;
1369 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
1379 reg = <0 0x1100bc00 0 0x400>;
1380 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1391 reg = <0 0x1100e000 0 0x1000>;
1392 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1403 #size-cells = <0>;
1404 reg = <0 0x11010000 0 0x1000>;
1405 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH 0>;
1416 #size-cells = <0>;
1417 reg = <0 0x11012000 0 0x1000>;
1418 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH 0>;
1429 #size-cells = <0>;
1430 reg = <0 0x11013000 0 0x1000>;
1431 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0>;
1442 #size-cells = <0>;
1443 reg = <0 0x11014000 0 0x1000>;
1444 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1455 #size-cells = <0>;
1456 reg = <0 0x11015000 0 0x1000>;
1457 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1467 reg = <0 0x11017000 0 0x1000>;
1474 reg = <0 0x11018000 0 0x1000>;
1475 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH 0>;
1483 reg = <0 0x11019000 0 0x1000>,
1484 <0 0x10200c00 0 0x180>;
1485 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH 0>;
1491 #size-cells = <0>;
1497 reg = <0 0x11210000 0 0x2000>;
1548 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
1559 reg = <0 0x11201000 0 0x2dff>, <0 0x11203e00 0 0x0100>;
1567 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>;
1577 reg = <0 0x11200000 0 0x1000>;
1585 interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0>;
1586 mediatek,syscon-wakeup = <&pericfg 0x420 2>;
1595 reg = <0 0x11230000 0 0x10000>,
1596 <0 0x11cd0000 0 0x1000>;
1602 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
1611 reg = <0 0x11240000 0 0x1000>,
1612 <0 0x11c90000 0 0x1000>;
1617 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
1625 reg = <0 0x11281000 0 0x2dff>, <0 0x11283e00 0 0x0100>;
1633 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0>;
1643 reg = <0 0x11280000 0 0x1000>;
1651 interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0>;
1652 mediatek,syscon-wakeup = <&pericfg 0x424 2>;
1663 ranges = <0x0 0x0 0x11c80000 0x1000>;
1666 u2port1: usb-phy@0 {
1667 reg = <0x0 0x700>;
1674 reg = <0x700 0x900>;
1686 ranges = <0x0 0x0 0x11ca0000 0x1000>;
1689 u2port0: usb-phy@0 {
1690 reg = <0x0 0x700>;
1694 mediatek,discth = <0x8>;
1700 reg = <0 0x11cb0000 0 0x1000>;
1705 reg = <0x1cc 0x14>;
1709 reg = <0x2f8 0x14>;
1713 reg = <0x550 0x50>;
1717 reg = <0x59c 0x4>;
1718 bits = <0 3>;
1722 reg = <0x7a0 0x4>;
1728 reg = <0 0x11cc0000 0 0x1000>;
1730 #clock-cells = <0>;
1731 #phy-cells = <0>;
1738 reg = <0 0x13000000 0 0x1000>;
1745 reg = <0 0x13040000 0 0x4000>;
1748 interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH 0>,
1749 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH 0>,
1750 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH 0>;
1765 reg = <0 0x14000000 0 0x1000>;
1768 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
1770 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
1775 reg = <0 0x14001000 0 0x1000>;
1777 interrupts = <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0>;
1778 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
1786 reg = <0 0x14002000 0 0x1000>;
1795 reg = <0 0x14003000 0 0x1000>;
1799 mediatek,larb-id = <0>;
1806 reg = <0 0x14004000 0 0x1000>;
1817 reg = <0 0x14005000 0 0x1000>;
1819 interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH 0>;
1821 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
1827 reg = <0 0x14006000 0 0x1000>;
1829 interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH 0>;
1831 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
1837 reg = <0 0x14007000 0 0x1000>;
1839 interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH 0>;
1841 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x7000 0x1000>;
1847 reg = <0 0x14009000 0 0x1000>;
1849 interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH 0>;
1850 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>;
1856 reg = <0 0x1400a000 0 0x1000>;
1863 interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>;
1874 reg = <0 0x1400b000 0 0x1000>;
1876 interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH 0>;
1877 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>;
1883 reg = <0 0x1400c000 0 0x1000>;
1885 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH 0>;
1886 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;
1892 reg = <0 0x1400d000 0 0x1000>;
1894 interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH 0>;
1895 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
1902 reg = <0 0x1400e000 0 0x1000>;
1904 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH 0>;
1905 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>;
1911 reg = <0 0x1400f000 0 0x1000>;
1913 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH 0>;
1914 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
1920 reg = <0 0x14013000 0 0x1000>;
1925 interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 0>;
1939 reg = <0 0x14016000 0 0x1000>;
1942 interrupts = <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 0>;
1953 reg = <0 0x1401f000 0 0x1000>;
1955 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 0>;
1957 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xf000 0x1000>;
1963 reg = <0 0x14020000 0 0x1000>;
1969 reg = <0 0x14023000 0 0x1000>;
1980 reg = <0 0x15020000 0 0x1000>;
1986 reg = <0 0x1502e000 0 0x1000>;
1997 reg = <0 0x15820000 0 0x1000>;
2003 reg = <0 0x1582e000 0 0x1000>;
2014 reg = <0 0x16000000 0 0x1000>;
2018 dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
2024 reg = <0 0x16025000 0 0x1000>;
2025 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
2051 reg = <0 0x1602e000 0 0x1000>;
2062 reg = <0 0x1602f000 0 0x1000>;
2068 reg = <0 0x17000000 0 0x1000>;
2074 reg = <0 0x17010000 0 0x1000>;
2085 reg = <0 0x17020000 0 0x2000>;
2086 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
2106 reg = <0 0x17030000 0 0x10000>;
2107 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>;
2119 reg = <0 0x1a000000 0 0x1000>;
2125 reg = <0 0x1a001000 0 0x1000>;
2135 reg = <0 0x1a002000 0 0x1000>;
2145 reg = <0 0x1a00f000 0 0x1000>;
2156 reg = <0 0x1a010000 0 0x1000>;
2167 reg = <0 0x1a04f000 0 0x1000>;
2173 reg = <0 0x1a06f000 0 0x1000>;
2179 reg = <0 0x1b000000 0 0x1000>;
2185 reg = <0 0x1b002000 0 0x1000>;
2195 reg = <0 0x1c000000 0 0x1000>;
2201 reg = <0 0x1c00f000 0 0x1000>;
2211 reg = <0 0x1c10f000 0 0x1000>;
2241 hysteresis = <0>;
2279 hysteresis = <0>;
2317 hysteresis = <0>;
2355 hysteresis = <0>;
2381 hysteresis = <0>;
2407 hysteresis = <0>;
2433 hysteresis = <0>;
2466 hysteresis = <0>;
2500 hysteresis = <0>;