Lines Matching +full:0 +full:x1100e000
293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
517 arm,psci-suspend-param = <0x00010001>;
523 CLUSTER_SLEEP0: cluster-sleep-0 {
526 arm,psci-suspend-param = <0x01010001>;
534 arm,psci-suspend-param = <0x01010001>;
560 gpu_opp_table: opp-table-0 {
664 #clock-cells = <0>;
673 #clock-cells = <0>;
681 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
682 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
683 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
684 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
696 reg = <0 0x08000000 0 0x0010>;
707 reg = <0 0x0c000000 0 0x40000>, /* GICD */
708 <0 0x0c100000 0 0x200000>, /* GICR */
709 <0 0x0c400000 0 0x2000>, /* GICC */
710 <0 0x0c410000 0 0x1000>, /* GICH */
711 <0 0x0c420000 0 0x2000>; /* GICV */
713 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
715 ppi_cluster0: interrupt-partition-0 {
726 reg = <0 0x0c530000 0 0x1000>;
736 reg = <0 0x0c530a80 0 0x50>;
741 reg = <0x0 0xd410000 0x0 0x1000>;
749 reg = <0x0 0xd510000 0x0 0x1000>;
757 reg = <0x0 0xd610000 0x0 0x1000>;
765 reg = <0x0 0xd710000 0x0 0x1000>;
773 reg = <0x0 0xd810000 0x0 0x1000>;
781 reg = <0x0 0xd910000 0x0 0x1000>;
789 reg = <0x0 0xda10000 0x0 0x1000>;
797 reg = <0x0 0xdb10000 0x0 0x1000>;
805 reg = <0 0x10000000 0 0x1000>;
811 reg = <0 0x10001000 0 0x1000>;
818 reg = <0 0x10003000 0 0x1000>;
824 reg = <0 0x10005000 0 0x1000>,
825 <0 0x11f20000 0 0x1000>,
826 <0 0x11e80000 0 0x1000>,
827 <0 0x11e70000 0 0x1000>,
828 <0 0x11e90000 0 0x1000>,
829 <0 0x11d30000 0 0x1000>,
830 <0 0x11d20000 0 0x1000>,
831 <0 0x11c50000 0 0x1000>,
832 <0 0x11f30000 0 0x1000>,
833 <0 0x1000b000 0 0x1000>;
840 gpio-ranges = <&pio 0 0 192>;
848 reg = <0 0x10006000 0 0x1000>;
854 #size-cells = <0>;
864 #power-domain-cells = <0>;
870 #power-domain-cells = <0>;
876 #size-cells = <0>;
882 #size-cells = <0>;
887 #power-domain-cells = <0>;
892 #power-domain-cells = <0>;
898 #power-domain-cells = <0>;
916 clock-names = "mm", "mm-0", "mm-1", "mm-2", "mm-3",
922 #size-cells = <0>;
935 clock-names = "cam", "cam-0", "cam-1",
940 #power-domain-cells = <0>;
948 clock-names = "isp", "isp-0", "isp-1";
951 #power-domain-cells = <0>;
957 #power-domain-cells = <0>;
963 #power-domain-cells = <0>;
976 clock-names = "vpu", "vpu1", "vpu-0", "vpu-1",
981 #size-cells = <0>;
989 #power-domain-cells = <0>;
997 #power-domain-cells = <0>;
1006 reg = <0 0x10007000 0 0x100>;
1012 reg = <0 0x1000c000 0 0x1000>;
1018 reg = <0 0x1000d000 0 0x1000>;
1028 reg = <0 0x10010000 0 0x1000>;
1037 reg = <0 0x10500000 0 0x80000>,
1038 <0 0x105c0000 0 0x19080>;
1050 reg = <0 0x10017000 0 0x1000>;
1057 reg = <0 0x10205000 0 0x1000>;
1066 reg = <0 0x10238000 0 0x4000>;
1076 reg = <0 0x11001000 0 0x1000>;
1086 reg = <0 0x11002000 0 0x1000>;
1096 reg = <0 0x11003000 0 0x1000>;
1106 reg = <0 0x11004000 0 0x1000>;
1115 reg = <0 0x11005000 0 0x1000>,
1116 <0 0x11000600 0 0x80>;
1123 #size-cells = <0>;
1129 reg = <0 0x11007000 0 0x1000>,
1130 <0 0x11000080 0 0x80>;
1137 #size-cells = <0>;
1143 reg = <0 0x11008000 0 0x1000>,
1144 <0 0x11000100 0 0x80>;
1152 #size-cells = <0>;
1158 reg = <0 0x11009000 0 0x1000>,
1159 <0 0x11000280 0 0x80>;
1167 #size-cells = <0>;
1174 #size-cells = <0>;
1175 reg = <0 0x1100a000 0 0x1000>;
1187 reg = <0 0x1100b000 0 0xc00>;
1192 interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
1201 reg = <0 0x1100bc00 0 0x400>;
1213 reg = <0 0x1100e000 0 0x1000>;
1224 reg = <0 0x11006000 0 0x1000>;
1238 reg = <0 0x1100f000 0 0x1000>,
1239 <0 0x11000400 0 0x80>;
1246 #size-cells = <0>;
1253 #size-cells = <0>;
1254 reg = <0 0x11010000 0 0x1000>;
1265 reg = <0 0x11011000 0 0x1000>,
1266 <0 0x11000480 0 0x80>;
1273 #size-cells = <0>;
1280 #size-cells = <0>;
1281 reg = <0 0x11012000 0 0x1000>;
1293 #size-cells = <0>;
1294 reg = <0 0x11013000 0 0x1000>;
1305 reg = <0 0x11014000 0 0x1000>,
1306 <0 0x11000180 0 0x80>;
1314 #size-cells = <0>;
1320 reg = <0 0x11015000 0 0x1000>,
1321 <0 0x11000300 0 0x80>;
1329 #size-cells = <0>;
1335 reg = <0 0x11016000 0 0x1000>,
1336 <0 0x11000500 0 0x80>;
1344 #size-cells = <0>;
1350 reg = <0 0x11017000 0 0x1000>,
1351 <0 0x11000580 0 0x80>;
1359 #size-cells = <0>;
1366 #size-cells = <0>;
1367 reg = <0 0x11018000 0 0x1000>;
1379 #size-cells = <0>;
1380 reg = <0 0x11019000 0 0x1000>;
1391 reg = <0 0x1101a000 0 0x1000>,
1392 <0 0x11000680 0 0x80>;
1399 #size-cells = <0>;
1405 reg = <0 0x1101b000 0 0x1000>,
1406 <0 0x11000700 0 0x80>;
1413 #size-cells = <0>;
1419 reg = <0 0x11201000 0 0x2e00>,
1420 <0 0x11203e00 0 0x0100>;
1428 mediatek,syscon-wakeup = <&pericfg 0x420 101>;
1437 reg = <0 0x11200000 0 0x1000>;
1449 reg = <0 0x11220000 0 0x1000>;
1547 reg = <0 0x11230000 0 0x1000>,
1548 <0 0x11f50000 0 0x1000>;
1559 reg = <0 0x11240000 0 0x1000>,
1560 <0 0x11e10000 0 0x1000>;
1571 reg = <0 0x11e50000 0 0x1000>;
1573 #clock-cells = <0>;
1574 #phy-cells = <0>;
1583 reg = <0 0x11f10000 0 0x1000>;
1588 reg = <0x04c 0x4>;
1592 reg = <0x060 0x4>;
1596 reg = <0x180 0xc>;
1600 reg = <0x190 0xc>;
1604 reg = <0x580 0x64>;
1613 ranges = <0 0 0x11f40000 0x1000>;
1616 u2port0: usb-phy@0 {
1617 reg = <0x0 0x700>;
1626 reg = <0x0700 0x900>;
1636 reg = <0 0x13000000 0 0x1000>;
1643 reg = <0 0x13040000 0 0x4000>;
1663 reg = <0 0x14000000 0 0x1000>;
1666 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
1668 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
1673 reg = <0 0x14001000 0 0x1000>;
1674 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
1681 mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>,
1682 <&gce 21 CMDQ_THR_PRIO_LOWEST 0>;
1688 reg = <0 0x14003000 0 0x1000>;
1689 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>;
1697 reg = <0 0x14004000 0 0x1000>;
1698 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>;
1706 reg = <0 0x14005000 0 0x1000>;
1707 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
1718 reg = <0 0x14006000 0 0x1000>;
1719 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
1729 reg = <0 0x14008000 0 0x1000>;
1734 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>;
1739 reg = <0 0x14009000 0 0x1000>;
1744 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
1749 reg = <0 0x1400a000 0 0x1000>;
1754 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xa000 0x1000>;
1759 reg = <0 0x1400b000 0 0x1000>;
1765 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>;
1770 reg = <0 0x1400c000 0 0x1000>;
1776 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;
1782 reg = <0 0x1400e000 0 0x1000>;
1786 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>;
1791 reg = <0 0x1400f000 0 0x1000>;
1795 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
1800 reg = <0 0x14010000 0 0x1000>;
1804 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>;
1809 reg = <0 0x14011000 0 0x1000>;
1813 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
1818 reg = <0 0x14012000 0 0x1000>;
1822 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>;
1827 reg = <0 0x14014000 0 0x1000>;
1841 reg = <0 0x14015000 0 0x1000>;
1852 reg = <0 0x14016000 0 0x1000>;
1857 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>;
1862 reg = <0 0x14017000 0 0x1000>;
1872 reg = <0 0x14019000 0 0x1000>;
1883 reg = <0 0x1401c000 0 0x1000>;
1884 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>;
1892 reg = <0 0x15020000 0 0x1000>;
1898 reg = <0 0x15021000 0 0x1000>;
1908 reg = <0 0x1502f000 0 0x1000>;
1918 reg = <0 0x16000000 0 0x1000>;
1924 reg = <0 0x16020000 0 0x1000>, /* VDEC_MISC */
1925 <0 0x16021000 0 0x800>, /* VDEC_VLD */
1926 <0 0x16021800 0 0x800>, /* VDEC_TOP */
1927 <0 0x16022000 0 0x1000>, /* VDEC_MC */
1928 <0 0x16023000 0 0x1000>, /* VDEC_AVCVLD */
1929 <0 0x16024000 0 0x1000>, /* VDEC_AVCMV */
1930 <0 0x16025000 0 0x1000>, /* VDEC_PP */
1931 <0 0x16026800 0 0x800>, /* VP8_VD */
1932 <0 0x16027000 0 0x800>, /* VP6_VD */
1933 <0 0x16027800 0 0x800>, /* VP8_VL */
1934 <0 0x16028400 0 0x400>; /* VP9_VD */
1954 reg = <0 0x16010000 0 0x1000>;
1963 reg = <0 0x17000000 0 0x1000>;
1969 reg = <0 0x17010000 0 0x1000>;
1979 reg = <0 0x17030000 0 0x1000>;
1990 reg = <0 0x19000000 0 0x1000>;
1996 reg = <0 0x19010000 0 0x1000>;
2002 reg = <0 0x19180000 0 0x1000>;
2008 reg = <0 0x19280000 0 0x1000>;
2014 reg = <0 0x1a000000 0 0x1000>;
2020 reg = <0 0x1a001000 0 0x1000>;
2030 reg = <0 0x1a002000 0 0x1000>;
2043 thermal-sensors = <&thermal 0>;