Lines Matching +full:pp1800 +full:- +full:supply
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <®_vsys>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <32768>;
44 clock-output-names = "clk32k";
48 compatible = "regulator-fixed";
49 regulator-name = "it6505_pp18";
51 enable-active-high;
52 vin-supply = <&pp1800_alw>;
56 compatible = "regulator-fixed";
57 regulator-name = "pp1800_alw";
58 regulator-always-on;
59 regulator-boot-on;
60 regulator-min-microvolt = <1800000>;
61 regulator-max-microvolt = <1800000>;
62 vin-supply = <®_vsys>;
66 compatible = "regulator-fixed";
67 regulator-name = "pp3300_alw";
68 regulator-always-on;
69 regulator-boot-on;
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72 vin-supply = <®_vsys>;
75 /* system wide semi-regulated power rail from charger */
76 reg_vsys: regulator-vsys {
77 compatible = "regulator-fixed";
78 regulator-name = "vsys";
79 regulator-always-on;
80 regulator-boot-on;
83 reserved_memory: reserved-memory {
84 #address-cells = <2>;
85 #size-cells = <2>;
89 compatible = "shared-dma-pool";
91 no-map;
95 sound: mt8183-sound {
97 pinctrl-names = "default",
100 pinctrl-0 = <&aud_pins_default>;
101 pinctrl-1 = <&aud_pins_tdm_out_on>;
102 pinctrl-2 = <&aud_pins_tdm_out_off>;
106 btsco: bt-sco {
107 compatible = "linux,bt-sco";
110 wifi_pwrseq: wifi-pwrseq {
111 compatible = "mmc-pwrseq-simple";
112 pinctrl-names = "default";
113 pinctrl-0 = <&wifi_pins_pwrseq>;
116 reset-gpios = <&pio 119 1>;
119 wifi_wakeup: wifi-wakeup {
120 compatible = "gpio-keys";
121 pinctrl-names = "default";
122 pinctrl-0 = <&wifi_pins_wakeup>;
124 wifi_wakeup_event: event-wowlan {
128 wakeup-source;
132 tboard_thermistor1: thermal-sensor1 {
133 compatible = "generic-adc-thermal";
134 #thermal-sensor-cells = <0>;
135 io-channels = <&auxadc 0>;
136 io-channel-names = "sensor-channel";
137 temperature-lookup-table = < (-5000) 1553
166 tboard_thermistor2: thermal-sensor2 {
167 compatible = "generic-adc-thermal";
168 #thermal-sensor-cells = <0>;
169 io-channels = <&auxadc 1>;
170 io-channel-names = "sensor-channel";
171 temperature-lookup-table = < (-5000) 1553
206 proc-supply = <&mt6358_vproc12_reg>;
210 proc-supply = <&mt6358_vproc12_reg>;
214 proc-supply = <&mt6358_vproc12_reg>;
218 proc-supply = <&mt6358_vproc12_reg>;
222 proc-supply = <&mt6358_vproc12_reg>;
226 proc-supply = <&mt6358_vproc11_reg>;
230 proc-supply = <&mt6358_vproc11_reg>;
234 proc-supply = <&mt6358_vproc11_reg>;
238 proc-supply = <&mt6358_vproc11_reg>;
243 #address-cells = <1>;
244 #size-cells = <0>;
248 enable-gpios = <&pio 45 0>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&panel_pins_default>;
251 avdd-supply = <&ppvarn_lcd>;
252 avee-supply = <&ppvarp_lcd>;
253 pp1800-supply = <&pp1800_lcd>;
258 remote-endpoint = <&dsi_out>;
266 remote-endpoint = <&panel_in>;
273 mediatek,broken-save-restore-fw;
277 mali-supply = <&mt6358_vgpu_reg>;
281 pinctrl-names = "default";
282 pinctrl-0 = <&i2c0_pins>;
284 clock-frequency = <400000>;
285 #address-cells = <1>;
286 #size-cells = <0>;
290 pinctrl-names = "default";
291 pinctrl-0 = <&i2c1_pins>;
293 clock-frequency = <100000>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&i2c3_pins>;
300 clock-frequency = <100000>;
301 #address-cells = <1>;
302 #size-cells = <0>;
306 pinctrl-names = "default";
307 pinctrl-0 = <&i2c5_pins>;
309 clock-frequency = <100000>;
310 #address-cells = <1>;
311 #size-cells = <0>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c6_pins>;
318 clock-frequency = <100000>;
327 pinctrl-names = "default", "state_uhs";
328 pinctrl-0 = <&mmc0_pins_default>;
329 pinctrl-1 = <&mmc0_pins_uhs>;
330 bus-width = <8>;
331 max-frequency = <200000000>;
332 cap-mmc-highspeed;
333 mmc-hs200-1_8v;
334 mmc-hs400-1_8v;
335 cap-mmc-hw-reset;
336 no-sdio;
337 no-sd;
338 hs400-ds-delay = <0x12814>;
339 vmmc-supply = <&mt6358_vemc_reg>;
340 vqmmc-supply = <&mt6358_vio18_reg>;
341 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
342 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
343 non-removable;
348 pinctrl-names = "default", "state_uhs";
349 pinctrl-0 = <&mmc1_pins_default>;
350 pinctrl-1 = <&mmc1_pins_uhs>;
351 vmmc-supply = <&pp3300_alw>;
352 vqmmc-supply = <&pp1800_alw>;
353 mmc-pwrseq = <&wifi_pwrseq>;
354 bus-width = <4>;
355 max-frequency = <200000000>;
356 cap-sd-highspeed;
357 sd-uhs-sdr50;
358 sd-uhs-sdr104;
359 keep-power-in-suspend;
360 wakeup-source;
361 cap-sdio-irq;
362 non-removable;
363 no-mmc;
364 no-sd;
365 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
366 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
367 #address-cells = <1>;
368 #size-cells = <0>;
370 qca_wifi: qca-wifi@1 {
377 regulator-always-on;
381 Avdd-supply = <&mt6358_vaud28_reg>;
385 vsys-ldo1-supply = <®_vsys>;
386 vsys-ldo2-supply = <®_vsys>;
387 vsys-ldo3-supply = <®_vsys>;
388 vsys-vcore-supply = <®_vsys>;
389 vsys-vdram1-supply = <®_vsys>;
390 vsys-vgpu-supply = <®_vsys>;
391 vsys-vmodem-supply = <®_vsys>;
392 vsys-vpa-supply = <®_vsys>;
393 vsys-vproc11-supply = <®_vsys>;
394 vsys-vproc12-supply = <®_vsys>;
395 vsys-vs1-supply = <®_vsys>;
396 vsys-vs2-supply = <®_vsys>;
397 vs1-ldo1-supply = <&mt6358_vs1_reg>;
398 vs2-ldo1-supply = <&mt6358_vdram1_reg>;
399 vs2-ldo2-supply = <&mt6358_vs2_reg>;
400 vs2-ldo3-supply = <&mt6358_vs2_reg>;
401 vs2-ldo4-supply = <&mt6358_vs2_reg>;
405 regulator-max-microvolt = <900000>;
407 regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
408 regulator-coupled-max-spread = <100000>;
412 regulator-min-microvolt = <2700000>;
413 regulator-max-microvolt = <2700000>;
417 regulator-min-microvolt = <2700000>;
418 regulator-max-microvolt = <2700000>;
422 regulator-min-microvolt = <850000>;
423 regulator-max-microvolt = <1000000>;
425 regulator-coupled-with = <&mt6358_vgpu_reg>;
426 regulator-coupled-max-spread = <100000>;
431 pins-bus {
453 pins-bus {
459 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
460 drive-strength = <6>;
465 pins-bus {
472 input-enable;
473 bias-pull-down;
474 drive-strength = <2>;
478 bt_pins: bt-pins {
479 pins-bt-en {
481 output-low;
485 ec_ap_int_odl: ec-ap-int-odl {
488 input-enable;
489 bias-pull-up;
493 h1_int_od_l: h1-int-od-l {
496 input-enable;
501 pins-bus {
504 mediatek,pull-up-adv = <3>;
509 pins-bus {
512 mediatek,pull-up-adv = <3>;
517 pins-bus {
520 bias-disable;
525 pins-bus {
528 mediatek,pull-up-adv = <3>;
533 pins-bus {
536 bias-disable;
541 pins-bus {
544 mediatek,pull-up-adv = <3>;
549 pins-bus {
552 bias-disable;
556 mmc0_pins_default: mmc0-pins-default {
557 pins-cmd-dat {
567 input-enable;
568 drive-strength = <MTK_DRIVE_14mA>;
569 mediatek,pull-up-adv = <01>;
572 pins-clk {
574 drive-strength = <MTK_DRIVE_14mA>;
575 mediatek,pull-down-adv = <10>;
578 pins-rst {
580 drive-strength = <MTK_DRIVE_14mA>;
581 mediatek,pull-down-adv = <01>;
585 mmc0_pins_uhs: mmc0-pins-uhs {
586 pins-cmd-dat {
596 input-enable;
597 drive-strength = <MTK_DRIVE_14mA>;
598 mediatek,pull-up-adv = <01>;
601 pins-clk {
603 drive-strength = <MTK_DRIVE_14mA>;
604 mediatek,pull-down-adv = <10>;
607 pins-ds {
609 drive-strength = <MTK_DRIVE_14mA>;
610 mediatek,pull-down-adv = <10>;
613 pins-rst {
615 drive-strength = <MTK_DRIVE_14mA>;
616 mediatek,pull-up-adv = <01>;
620 mmc1_pins_default: mmc1-pins-default {
621 pins-cmd-dat {
627 input-enable;
628 mediatek,pull-up-adv = <10>;
631 pins-clk {
633 input-enable;
634 mediatek,pull-down-adv = <10>;
638 mmc1_pins_uhs: mmc1-pins-uhs {
639 pins-cmd-dat {
645 drive-strength = <6>;
646 input-enable;
647 mediatek,pull-up-adv = <10>;
650 pins-clk {
652 drive-strength = <8>;
653 mediatek,pull-down-adv = <10>;
654 input-enable;
658 panel_pins_default: panel-pins-default {
659 panel-reset {
661 output-low;
662 bias-pull-up;
666 pwm0_pin_default: pwm0-pin-default {
669 output-high;
670 bias-pull-up;
678 pins-scp-uart {
685 pins-spi {
690 bias-disable;
695 pins-spi {
700 bias-disable;
705 pins-spi {
709 bias-disable;
711 pins-spi-mi {
713 mediatek,pull-down-adv = <00>;
718 pins-spi {
723 bias-disable;
728 pins-spi {
733 bias-disable;
738 pins-spi {
743 bias-disable;
747 uart0_pins_default: uart0-pins-default {
748 pins-rx {
750 input-enable;
751 bias-pull-up;
753 pins-tx {
758 uart1_pins_default: uart1-pins-default {
759 pins-rx {
761 input-enable;
762 bias-pull-up;
764 pins-tx {
767 pins-rts {
770 pins-cts {
772 input-enable;
776 uart1_pins_sleep: uart1-pins-sleep {
777 pins-rx {
779 input-enable;
780 bias-pull-up;
782 pins-tx {
785 pins-rts {
788 pins-cts {
790 input-enable;
794 wifi_pins_pwrseq: wifi-pins-pwrseq {
795 pins-wifi-enable {
797 output-low;
801 wifi_pins_wakeup: wifi-pins-wakeup {
802 pins-wifi-wakeup {
804 input-enable;
810 interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>;
815 pinctrl-names = "default";
816 pinctrl-0 = <&pwm0_pin_default>;
822 firmware-name = "mediatek/mt8183/scp.img";
823 pinctrl-names = "default";
824 pinctrl-0 = <&scp_pins>;
826 cros-ec-rpmsg {
827 compatible = "google,cros-ec-rpmsg";
828 mediatek,rpmsg-name = "cros-ec-rpmsg";
833 domain-supply = <&mt6358_vsram_gpu_reg>;
837 domain-supply = <&mt6358_vgpu_reg>;
841 pinctrl-names = "default";
842 pinctrl-0 = <&spi0_pins>;
843 mediatek,pad-select = <0>;
845 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
850 spi-max-frequency = <1000000>;
851 pinctrl-names = "default";
852 pinctrl-0 = <&h1_int_od_l>;
853 interrupts-extended = <&pio 153 IRQ_TYPE_EDGE_RISING>;
858 pinctrl-names = "default";
859 pinctrl-0 = <&spi1_pins>;
860 mediatek,pad-select = <0>;
864 compatible = "winbond,w25q64dw", "jedec,spi-nor";
866 spi-max-frequency = <25000000>;
871 pinctrl-names = "default";
872 pinctrl-0 = <&spi2_pins>;
873 mediatek,pad-select = <0>;
876 cros_ec: cros-ec@0 {
877 compatible = "google,cros-ec-spi";
879 spi-max-frequency = <3000000>;
880 interrupts-extended = <&pio 151 IRQ_TYPE_LEVEL_LOW>;
881 pinctrl-names = "default";
882 pinctrl-0 = <&ec_ap_int_odl>;
883 wakeup-source;
885 i2c_tunnel: i2c-tunnel {
886 compatible = "google,cros-ec-i2c-tunnel";
887 google,remote-bus = <1>;
888 #address-cells = <1>;
889 #size-cells = <0>;
893 compatible = "google,extcon-usbc-cros-ec";
894 google,usb-port-id = <0>;
898 compatible = "google,cros-ec-typec";
899 #address-cells = <1>;
900 #size-cells = <0>;
903 compatible = "usb-c-connector";
905 power-role = "dual";
906 data-role = "host";
907 try-power-role = "sink";
914 pinctrl-names = "default";
915 pinctrl-0 = <&spi3_pins>;
916 mediatek,pad-select = <0>;
921 pinctrl-names = "default";
922 pinctrl-0 = <&spi4_pins>;
923 mediatek,pad-select = <0>;
928 pinctrl-names = "default";
929 pinctrl-0 = <&spi5_pins>;
930 mediatek,pad-select = <0>;
936 wakeup-source;
937 vusb33-supply = <&mt6358_vusb_reg>;
942 tboard1-thermal {
943 polling-delay = <1000>; /* milliseconds */
944 polling-delay-passive = <0>; /* milliseconds */
945 thermal-sensors = <&tboard_thermistor1>;
948 tboard2-thermal {
949 polling-delay = <1000>; /* milliseconds */
950 polling-delay-passive = <0>; /* milliseconds */
951 thermal-sensors = <&tboard_thermistor2>;
960 pinctrl-names = "default";
961 pinctrl-0 = <&uart0_pins_default>;
966 pinctrl-names = "default", "sleep";
967 pinctrl-0 = <&uart1_pins_default>;
968 pinctrl-1 = <&uart1_pins_sleep>;
970 /delete-property/ interrupts;
971 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
975 pinctrl-names = "default";
976 pinctrl-0 = <&bt_pins>;
978 compatible = "qcom,qca6174-bt";
979 enable-gpios = <&pio 120 0>;
981 firmware-name = "nvm_00440302_i2s.bin";
986 #address-cells = <1>;
987 #size-cells = <0>;
988 vusb33-supply = <&mt6358_vusb_reg>;
997 #include <arm/cros-ec-sbs.dtsi>