Lines Matching +full:disable +full:- +full:sensor +full:- +full:hub
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <®_vsys>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <32768>;
44 clock-output-names = "clk32k";
48 compatible = "regulator-fixed";
49 regulator-name = "it6505_pp18";
51 enable-active-high;
52 vin-supply = <&pp1800_alw>;
56 compatible = "regulator-fixed";
57 regulator-name = "pp1800_alw";
58 regulator-always-on;
59 regulator-boot-on;
60 regulator-min-microvolt = <1800000>;
61 regulator-max-microvolt = <1800000>;
62 vin-supply = <®_vsys>;
66 compatible = "regulator-fixed";
67 regulator-name = "pp3300_alw";
68 regulator-always-on;
69 regulator-boot-on;
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72 vin-supply = <®_vsys>;
75 /* system wide semi-regulated power rail from charger */
76 reg_vsys: regulator-vsys {
77 compatible = "regulator-fixed";
78 regulator-name = "vsys";
79 regulator-always-on;
80 regulator-boot-on;
83 reserved_memory: reserved-memory {
84 #address-cells = <2>;
85 #size-cells = <2>;
89 compatible = "shared-dma-pool";
91 no-map;
95 sound: mt8183-sound {
97 pinctrl-names = "default",
100 pinctrl-0 = <&aud_pins_default>;
101 pinctrl-1 = <&aud_pins_tdm_out_on>;
102 pinctrl-2 = <&aud_pins_tdm_out_off>;
106 btsco: bt-sco {
107 compatible = "linux,bt-sco";
110 wifi_pwrseq: wifi-pwrseq {
111 compatible = "mmc-pwrseq-simple";
112 pinctrl-names = "default";
113 pinctrl-0 = <&wifi_pins_pwrseq>;
116 reset-gpios = <&pio 119 1>;
119 wifi_wakeup: wifi-wakeup {
120 compatible = "gpio-keys";
121 pinctrl-names = "default";
122 pinctrl-0 = <&wifi_pins_wakeup>;
124 wifi_wakeup_event: event-wowlan {
128 wakeup-source;
132 tboard_thermistor1: thermal-sensor1 {
133 compatible = "generic-adc-thermal";
134 #thermal-sensor-cells = <0>;
135 io-channels = <&auxadc 0>;
136 io-channel-names = "sensor-channel";
137 temperature-lookup-table = < (-5000) 1553
166 tboard_thermistor2: thermal-sensor2 {
167 compatible = "generic-adc-thermal";
168 #thermal-sensor-cells = <0>;
169 io-channels = <&auxadc 1>;
170 io-channel-names = "sensor-channel";
171 temperature-lookup-table = < (-5000) 1553
206 proc-supply = <&mt6358_vproc12_reg>;
210 proc-supply = <&mt6358_vproc12_reg>;
214 proc-supply = <&mt6358_vproc12_reg>;
218 proc-supply = <&mt6358_vproc12_reg>;
222 proc-supply = <&mt6358_vproc12_reg>;
226 proc-supply = <&mt6358_vproc11_reg>;
230 proc-supply = <&mt6358_vproc11_reg>;
234 proc-supply = <&mt6358_vproc11_reg>;
238 proc-supply = <&mt6358_vproc11_reg>;
243 #address-cells = <1>;
244 #size-cells = <0>;
248 enable-gpios = <&pio 45 0>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&panel_pins_default>;
251 avdd-supply = <&ppvarn_lcd>;
252 avee-supply = <&ppvarp_lcd>;
253 pp1800-supply = <&pp1800_lcd>;
258 remote-endpoint = <&dsi_out>;
266 remote-endpoint = <&panel_in>;
273 /* TODO Re-enable after DP to Type-C port muxing can be described */
278 mediatek,broken-save-restore-fw;
282 mali-supply = <&mt6358_vgpu_reg>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&i2c0_pins>;
289 clock-frequency = <400000>;
290 #address-cells = <1>;
291 #size-cells = <0>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&i2c1_pins>;
298 clock-frequency = <100000>;
302 pinctrl-names = "default";
303 pinctrl-0 = <&i2c3_pins>;
305 clock-frequency = <100000>;
306 #address-cells = <1>;
307 #size-cells = <0>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&i2c5_pins>;
314 clock-frequency = <100000>;
315 #address-cells = <1>;
316 #size-cells = <0>;
320 pinctrl-names = "default";
321 pinctrl-0 = <&i2c6_pins>;
323 clock-frequency = <100000>;
332 pinctrl-names = "default", "state_uhs";
333 pinctrl-0 = <&mmc0_pins_default>;
334 pinctrl-1 = <&mmc0_pins_uhs>;
335 bus-width = <8>;
336 max-frequency = <200000000>;
337 cap-mmc-highspeed;
338 mmc-hs200-1_8v;
339 mmc-hs400-1_8v;
340 cap-mmc-hw-reset;
341 no-sdio;
342 no-sd;
343 hs400-ds-delay = <0x12814>;
344 vmmc-supply = <&mt6358_vemc_reg>;
345 vqmmc-supply = <&mt6358_vio18_reg>;
346 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
347 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
348 non-removable;
353 pinctrl-names = "default", "state_uhs";
354 pinctrl-0 = <&mmc1_pins_default>;
355 pinctrl-1 = <&mmc1_pins_uhs>;
356 vmmc-supply = <&pp3300_alw>;
357 vqmmc-supply = <&pp1800_alw>;
358 mmc-pwrseq = <&wifi_pwrseq>;
359 bus-width = <4>;
360 max-frequency = <200000000>;
361 cap-sd-highspeed;
362 sd-uhs-sdr50;
363 sd-uhs-sdr104;
364 keep-power-in-suspend;
365 wakeup-source;
366 cap-sdio-irq;
367 non-removable;
368 no-mmc;
369 no-sd;
370 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
371 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
372 #address-cells = <1>;
373 #size-cells = <0>;
375 qca_wifi: qca-wifi@1 {
382 regulator-always-on;
386 Avdd-supply = <&mt6358_vaud28_reg>;
390 vsys-ldo1-supply = <®_vsys>;
391 vsys-ldo2-supply = <®_vsys>;
392 vsys-ldo3-supply = <®_vsys>;
393 vsys-vcore-supply = <®_vsys>;
394 vsys-vdram1-supply = <®_vsys>;
395 vsys-vgpu-supply = <®_vsys>;
396 vsys-vmodem-supply = <®_vsys>;
397 vsys-vpa-supply = <®_vsys>;
398 vsys-vproc11-supply = <®_vsys>;
399 vsys-vproc12-supply = <®_vsys>;
400 vsys-vs1-supply = <®_vsys>;
401 vsys-vs2-supply = <®_vsys>;
402 vs1-ldo1-supply = <&mt6358_vs1_reg>;
403 vs2-ldo1-supply = <&mt6358_vdram1_reg>;
404 vs2-ldo2-supply = <&mt6358_vs2_reg>;
405 vs2-ldo3-supply = <&mt6358_vs2_reg>;
406 vs2-ldo4-supply = <&mt6358_vs2_reg>;
410 regulator-max-microvolt = <900000>;
412 regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
413 regulator-coupled-max-spread = <100000>;
417 regulator-min-microvolt = <2700000>;
418 regulator-max-microvolt = <2700000>;
422 regulator-min-microvolt = <2700000>;
423 regulator-max-microvolt = <2700000>;
427 regulator-min-microvolt = <850000>;
428 regulator-max-microvolt = <1000000>;
430 regulator-coupled-with = <&mt6358_vgpu_reg>;
431 regulator-coupled-max-spread = <100000>;
436 pins-bus {
458 pins-bus {
464 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
465 drive-strength = <6>;
470 pins-bus {
477 input-enable;
478 bias-pull-down;
479 drive-strength = <2>;
483 bt_pins: bt-pins {
484 pins-bt-en {
486 output-low;
490 ec_ap_int_odl: ec-ap-int-odl {
493 input-enable;
494 bias-pull-up;
498 h1_int_od_l: h1-int-od-l {
501 input-enable;
506 pins-bus {
509 mediatek,pull-up-adv = <3>;
514 pins-bus {
517 mediatek,pull-up-adv = <3>;
522 pins-bus {
525 bias-disable;
530 pins-bus {
533 mediatek,pull-up-adv = <3>;
538 pins-bus {
541 bias-disable;
546 pins-bus {
549 mediatek,pull-up-adv = <3>;
554 pins-bus {
557 bias-disable;
561 mmc0_pins_default: mmc0-pins-default {
562 pins-cmd-dat {
572 input-enable;
573 drive-strength = <MTK_DRIVE_14mA>;
574 mediatek,pull-up-adv = <01>;
577 pins-clk {
579 drive-strength = <MTK_DRIVE_14mA>;
580 mediatek,pull-down-adv = <10>;
583 pins-rst {
585 drive-strength = <MTK_DRIVE_14mA>;
586 mediatek,pull-down-adv = <01>;
590 mmc0_pins_uhs: mmc0-pins-uhs {
591 pins-cmd-dat {
601 input-enable;
602 drive-strength = <MTK_DRIVE_14mA>;
603 mediatek,pull-up-adv = <01>;
606 pins-clk {
608 drive-strength = <MTK_DRIVE_14mA>;
609 mediatek,pull-down-adv = <10>;
612 pins-ds {
614 drive-strength = <MTK_DRIVE_14mA>;
615 mediatek,pull-down-adv = <10>;
618 pins-rst {
620 drive-strength = <MTK_DRIVE_14mA>;
621 mediatek,pull-up-adv = <01>;
625 mmc1_pins_default: mmc1-pins-default {
626 pins-cmd-dat {
632 input-enable;
633 mediatek,pull-up-adv = <10>;
636 pins-clk {
638 input-enable;
639 mediatek,pull-down-adv = <10>;
643 mmc1_pins_uhs: mmc1-pins-uhs {
644 pins-cmd-dat {
650 drive-strength = <6>;
651 input-enable;
652 mediatek,pull-up-adv = <10>;
655 pins-clk {
657 drive-strength = <8>;
658 mediatek,pull-down-adv = <10>;
659 input-enable;
663 panel_pins_default: panel-pins-default {
664 panel-reset {
666 output-low;
667 bias-pull-up;
671 pwm0_pin_default: pwm0-pin-default {
674 output-high;
675 bias-pull-up;
683 pins-scp-uart {
690 pins-spi {
695 bias-disable;
700 pins-spi {
705 bias-disable;
710 pins-spi {
714 bias-disable;
716 pins-spi-mi {
718 mediatek,pull-down-adv = <00>;
723 pins-spi {
728 bias-disable;
733 pins-spi {
738 bias-disable;
743 pins-spi {
748 bias-disable;
752 uart0_pins_default: uart0-pins-default {
753 pins-rx {
755 input-enable;
756 bias-pull-up;
758 pins-tx {
763 uart1_pins_default: uart1-pins-default {
764 pins-rx {
766 input-enable;
767 bias-pull-up;
769 pins-tx {
772 pins-rts {
775 pins-cts {
777 input-enable;
781 uart1_pins_sleep: uart1-pins-sleep {
782 pins-rx {
784 input-enable;
785 bias-pull-up;
787 pins-tx {
790 pins-rts {
793 pins-cts {
795 input-enable;
799 wifi_pins_pwrseq: wifi-pins-pwrseq {
800 pins-wifi-enable {
802 output-low;
806 wifi_pins_wakeup: wifi-pins-wakeup {
807 pins-wifi-wakeup {
809 input-enable;
815 interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>;
820 pinctrl-names = "default";
821 pinctrl-0 = <&pwm0_pin_default>;
827 firmware-name = "mediatek/mt8183/scp.img";
828 pinctrl-names = "default";
829 pinctrl-0 = <&scp_pins>;
831 cros-ec-rpmsg {
832 compatible = "google,cros-ec-rpmsg";
833 mediatek,rpmsg-name = "cros-ec-rpmsg";
838 domain-supply = <&mt6358_vsram_gpu_reg>;
842 domain-supply = <&mt6358_vgpu_reg>;
846 pinctrl-names = "default";
847 pinctrl-0 = <&spi0_pins>;
848 mediatek,pad-select = <0>;
850 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
855 spi-max-frequency = <1000000>;
856 pinctrl-names = "default";
857 pinctrl-0 = <&h1_int_od_l>;
858 interrupts-extended = <&pio 153 IRQ_TYPE_EDGE_RISING>;
863 pinctrl-names = "default";
864 pinctrl-0 = <&spi1_pins>;
865 mediatek,pad-select = <0>;
869 compatible = "winbond,w25q64dw", "jedec,spi-nor";
871 spi-max-frequency = <25000000>;
876 pinctrl-names = "default";
877 pinctrl-0 = <&spi2_pins>;
878 mediatek,pad-select = <0>;
881 cros_ec: cros-ec@0 {
882 compatible = "google,cros-ec-spi";
884 spi-max-frequency = <3000000>;
885 interrupts-extended = <&pio 151 IRQ_TYPE_LEVEL_LOW>;
886 pinctrl-names = "default";
887 pinctrl-0 = <&ec_ap_int_odl>;
888 wakeup-source;
890 i2c_tunnel: i2c-tunnel {
891 compatible = "google,cros-ec-i2c-tunnel";
892 google,remote-bus = <1>;
893 #address-cells = <1>;
894 #size-cells = <0>;
898 compatible = "google,extcon-usbc-cros-ec";
899 google,usb-port-id = <0>;
903 compatible = "google,cros-ec-typec";
904 #address-cells = <1>;
905 #size-cells = <0>;
908 compatible = "usb-c-connector";
910 power-role = "dual";
911 data-role = "host";
912 try-power-role = "sink";
919 pinctrl-names = "default";
920 pinctrl-0 = <&spi3_pins>;
921 mediatek,pad-select = <0>;
926 pinctrl-names = "default";
927 pinctrl-0 = <&spi4_pins>;
928 mediatek,pad-select = <0>;
933 pinctrl-names = "default";
934 pinctrl-0 = <&spi5_pins>;
935 mediatek,pad-select = <0>;
941 wakeup-source;
942 vusb33-supply = <&mt6358_vusb_reg>;
948 polling-delay = <1000>; /* milliseconds */
949 polling-delay-passive = <0>; /* milliseconds */
950 thermal-sensors = <&tboard_thermistor1>;
954 polling-delay = <1000>; /* milliseconds */
955 polling-delay-passive = <0>; /* milliseconds */
956 thermal-sensors = <&tboard_thermistor2>;
965 pinctrl-names = "default";
966 pinctrl-0 = <&uart0_pins_default>;
971 pinctrl-names = "default", "sleep";
972 pinctrl-0 = <&uart1_pins_default>;
973 pinctrl-1 = <&uart1_pins_sleep>;
975 /delete-property/ interrupts;
976 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
980 pinctrl-names = "default";
981 pinctrl-0 = <&bt_pins>;
983 compatible = "qcom,qca6174-bt";
984 enable-gpios = <&pio 120 0>;
986 firmware-name = "nvm_00440302_i2s.bin";
991 #address-cells = <1>;
992 #size-cells = <0>;
993 vusb33-supply = <&mt6358_vusb_reg>;
996 hub@1 {
1002 #include <arm/cros-ec-sbs.dtsi>