Lines Matching +full:0 +full:x11e10000
21 #size-cells = <0>;
22 cpu0: cpu@0 {
24 reg = <0x0>;
32 reg = <0x1>;
40 reg = <0x2>;
48 reg = <0x3>;
58 #clock-cells = <0>;
73 reg = <0 0x43000000 0 0x30000>;
79 reg = <0 0x4fc00000 0 0x00100000>;
83 reg = <0 0x4fd00000 0 0x40000>;
88 reg = <0 0x4fd40000 0 0x40000>;
93 reg = <0 0x151e0000 0 0x8000>;
98 reg = <0 0x151f0000 0 0x8000>;
103 reg = <0 0x4fd80000 0 0x240000>;
108 reg = <0 0x151e8000 0 0x2000>;
113 reg = <0 0x151f8000 0 0x2000>;
118 reg = <0 0x15194000 0 0x1000>;
132 reg = <0 0x0c000000 0 0x10000>, /* GICD */
133 <0 0x0c080000 0 0x80000>, /* GICR */
134 <0 0x0c400000 0 0x2000>, /* GICC */
135 <0 0x0c410000 0 0x1000>, /* GICH */
136 <0 0x0c420000 0 0x2000>; /* GICV */
145 reg = <0 0x10001000 0 0x1000>;
153 reg = <0 0x10003000 0 0x10>;
158 reg = <0 0x1001B000 0 0x1000>;
164 reg = <0 0x1001c000 0 0x1000>;
172 reg = <0 0x1001E000 0 0x1000>;
178 reg = <0 0x1001f000 0 0x1000>,
179 <0 0x11c30000 0 0x1000>,
180 <0 0x11c40000 0 0x1000>,
181 <0 0x11e20000 0 0x1000>,
182 <0 0x11e30000 0 0x1000>,
183 <0 0x11f00000 0 0x1000>,
184 <0 0x11f10000 0 0x1000>,
185 <0 0x1000b000 0 0x1000>;
190 gpio-ranges = <&pio 0 0 100>;
199 reg = <0 0x10048000 0 0x1000>;
213 reg = <0 0x10060000 0 0x1000>;
220 reg = <0 0x10070000 0 0x1000>;
227 reg = <0 0x1020f000 0 0x100>;
235 reg = <0 0x10320000 0 0x40000>;
250 reg = <0 0x11002000 0 0x400>;
265 reg = <0 0x11003000 0 0x400>;
278 reg = <0 0x11004000 0 0x400>;
290 reg = <0 0x11008000 0 0x90>,
291 <0 0x10217080 0 0x80>;
298 #size-cells = <0>;
304 reg = <0 0x1100a000 0 0x100>;
306 #size-cells = <0>;
318 reg = <0 0x1100b000 0 0x100>;
320 #size-cells = <0>;
332 reg = <0 0x1100c800 0 0x800>;
346 reg = <0 0x1100d000 0 0x1000>;
356 reg = <0 0x11200000 0 0x2e00>,
357 <0 0x11203e00 0 0x0100>;
378 reg = <0 0x11230000 0 0x1000>,
379 <0 0x11c20000 0 0x1000>;
398 reg = <0x00 0x11280000 0x00 0x4000>;
400 ranges = <0x82000000 0x00 0x20000000 0x00
401 0x20000000 0x00 0x10000000>;
406 bus-range = <0x00 0xff>;
417 interrupt-map-mask = <0 0 0 0x7>;
418 interrupt-map = <0 0 0 1 &pcie_intc 0>,
419 <0 0 0 2 &pcie_intc 1>,
420 <0 0 0 3 &pcie_intc 2>,
421 <0 0 0 4 &pcie_intc 3>;
425 #address-cells = <0>;
440 reg = <0 0x11c00000 0 0x20000>;
449 reg = <0 0x11d00000 0 0x1000>;
454 reg = <0x274 0xc>;
461 ranges = <0 0 0x11e10000 0x1700>;
466 u2port0: usb-phy@0 {
467 reg = <0x0 0x700>;
475 reg = <0x700 0x900>;
482 reg = <0x1000 0x700>;
493 reg = <0 0x15000000 0 0x1000>;
501 reg = <0 0x15010000 0 0x1000>;
514 reg = <0 0x15011000 0 0x1000>;
526 reg = <0 0x15100000 0 0x80000>;
557 #size-cells = <0>;
567 reg = <0 0x151a5000 0 0x1000>;
574 reg = <0 0x151ad000 0 0x1000>;
581 reg = <0 0x18000000 0 0x1000000>,
582 <0 0x10003000 0 0x1000>,
583 <0 0x11d10000 0 0x1000>;
601 thermal-sensors = <&thermal 0>;