Lines Matching +full:pinmux +full:- +full:id
1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/clock/mt6797-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/mt6797-pinfunc.h>
14 interrupt-parent = <&sysirq>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <1>;
25 #size-cells = <0>;
29 compatible = "arm,cortex-a53";
30 enable-method = "psci";
36 compatible = "arm,cortex-a53";
37 enable-method = "psci";
43 compatible = "arm,cortex-a53";
44 enable-method = "psci";
50 compatible = "arm,cortex-a53";
51 enable-method = "psci";
57 compatible = "arm,cortex-a53";
58 enable-method = "psci";
64 compatible = "arm,cortex-a53";
65 enable-method = "psci";
71 compatible = "arm,cortex-a53";
72 enable-method = "psci";
78 compatible = "arm,cortex-a53";
79 enable-method = "psci";
85 compatible = "arm,cortex-a72";
86 enable-method = "psci";
92 compatible = "arm,cortex-a72";
93 enable-method = "psci";
98 clk26m: oscillator-26m {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <26000000>;
102 clock-output-names = "clk26m";
106 compatible = "arm,armv8-timer";
107 interrupt-parent = <&gic>;
115 compatible = "mediatek,mt6797-topckgen";
117 #clock-cells = <1>;
121 compatible = "mediatek,mt6797-infracfg", "syscon";
123 #clock-cells = <1>;
127 compatible = "mediatek,mt6797-pinctrl";
133 reg-names = "gpio", "iocfgl", "iocfgb",
135 gpio-controller;
136 #gpio-cells = <2>;
140 pinmux = <MT6797_GPIO234__FUNC_UTXD0>,
147 pinmux = <MT6797_GPIO232__FUNC_URXD1>,
154 pinmux = <MT6797_GPIO37__FUNC_SCL0_0>,
161 pinmux = <MT6797_GPIO55__FUNC_SCL1_0>,
168 pinmux = <MT6797_GPIO96__FUNC_SCL2_0>,
175 pinmux = <MT6797_GPIO75__FUNC_SDA3_0>,
182 pinmux = <MT6797_GPIO238__FUNC_SDA4_0>,
189 pinmux = <MT6797_GPIO240__FUNC_SDA5_0>,
196 pinmux = <MT6797_GPIO152__FUNC_SDA6_0>,
203 pinmux = <MT6797_GPIO154__FUNC_SDA7_0>,
209 scpsys: power-controller@10006000 {
210 compatible = "mediatek,mt6797-scpsys";
211 #power-domain-cells = <1>;
216 clock-names = "mfg", "mm", "vdec";
221 compatible = "mediatek,mt6797-wdt", "mediatek,mt6589-wdt";
226 compatible = "mediatek,mt6797-apmixedsys";
228 #clock-cells = <1>;
231 sysirq: intpol-controller@10200620 {
232 compatible = "mediatek,mt6797-sysirq",
233 "mediatek,mt6577-sysirq";
234 interrupt-controller;
235 #interrupt-cells = <3>;
236 interrupt-parent = <&gic>;
242 compatible = "mediatek,mt6797-uart",
243 "mediatek,mt6577-uart";
248 clock-names = "baud", "bus";
253 compatible = "mediatek,mt6797-uart",
254 "mediatek,mt6577-uart";
259 clock-names = "baud", "bus";
264 compatible = "mediatek,mt6797-uart",
265 "mediatek,mt6577-uart";
270 clock-names = "baud", "bus";
275 compatible = "mediatek,mt6797-uart",
276 "mediatek,mt6577-uart";
281 clock-names = "baud", "bus";
286 compatible = "mediatek,mt6797-i2c",
287 "mediatek,mt6577-i2c";
288 id = <0>;
294 clock-names = "main", "dma";
295 clock-div = <10>;
296 #address-cells = <1>;
297 #size-cells = <0>;
302 compatible = "mediatek,mt6797-i2c",
303 "mediatek,mt6577-i2c";
304 id = <1>;
310 clock-names = "main", "dma";
311 clock-div = <10>;
312 #address-cells = <1>;
313 #size-cells = <0>;
318 compatible = "mediatek,mt6797-i2c",
319 "mediatek,mt6577-i2c";
320 id = <8>;
327 clock-names = "main", "dma", "arb";
328 clock-div = <10>;
329 #address-cells = <1>;
330 #size-cells = <0>;
335 compatible = "mediatek,mt6797-i2c",
336 "mediatek,mt6577-i2c";
337 id = <9>;
344 clock-names = "main", "dma", "arb";
345 clock-div = <10>;
346 #address-cells = <1>;
347 #size-cells = <0>;
352 compatible = "mediatek,mt6797-i2c",
353 "mediatek,mt6577-i2c";
354 id = <6>;
360 clock-names = "main", "dma";
361 clock-div = <10>;
362 #address-cells = <1>;
363 #size-cells = <0>;
368 compatible = "mediatek,mt6797-i2c",
369 "mediatek,mt6577-i2c";
370 id = <7>;
376 clock-names = "main", "dma";
377 clock-div = <10>;
378 #address-cells = <1>;
379 #size-cells = <0>;
384 compatible = "mediatek,mt6797-i2c",
385 "mediatek,mt6577-i2c";
386 id = <4>;
392 clock-names = "main", "dma";
393 clock-div = <10>;
394 #address-cells = <1>;
395 #size-cells = <0>;
400 compatible = "mediatek,mt6797-i2c",
401 "mediatek,mt6577-i2c";
402 id = <2>;
409 clock-names = "main", "dma", "arb";
410 clock-div = <10>;
411 #address-cells = <1>;
412 #size-cells = <0>;
417 compatible = "mediatek,mt6797-i2c",
418 "mediatek,mt6577-i2c";
419 id = <3>;
426 clock-names = "main", "dma", "arb";
427 clock-div = <10>;
428 #address-cells = <1>;
429 #size-cells = <0>;
434 compatible = "mediatek,mt6797-i2c",
435 "mediatek,mt6577-i2c";
436 id = <5>;
442 clock-names = "main", "dma";
443 clock-div = <10>;
444 #address-cells = <1>;
445 #size-cells = <0>;
450 compatible = "mediatek,mt6797-mmsys", "syscon";
452 #clock-cells = <1>;
456 compatible = "mediatek,mt6797-imgsys", "syscon";
458 #clock-cells = <1>;
462 compatible = "mediatek,mt6797-vdecsys", "syscon";
464 #clock-cells = <1>;
468 compatible = "mediatek,mt6797-vencsys", "syscon";
470 #clock-cells = <1>;
473 gic: interrupt-controller@19000000 {
474 compatible = "arm,gic-v3";
475 #interrupt-cells = <3>;
476 interrupt-parent = <&gic>;
478 interrupt-controller;