Lines Matching +full:0 +full:x120
16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0 0>;
28 reg = <0 1>;
35 reg = <0 2>;
42 reg = <0 3>;
77 reg = <0 0xc0010000 0 0x10000>;
87 reg = <0 0xd1df9000 0 0x1000>,
88 <0 0xd1dfa000 0 0x2000>,
90 <0 0xd1dfc000 0 0x2000>,
91 <0 0xd1dfe000 0 0x2000>;
99 reg = <0 0xd4000000 0 0x200000>;
102 ranges = <0 0 0xd4000000 0x200000>;
104 pdma: dma-controller@0 {
106 reg = <0 0x10000>;
115 #size-cells = <0>;
116 reg = <0x10800 0x64>;
126 #size-cells = <0>;
127 reg = <0x11000 0x64>;
137 #size-cells = <0>;
138 reg = <0x13800 0x64>;
147 reg = <0x15000 0x1000>;
153 reg = <0x17000 0x1000>;
161 reg = <0x18000 0x1000>;
169 reg = <0x19000 0x800>;
179 ranges = <0 0x19000 0x800>;
181 gpio@0 {
182 reg = <0x0 0x4>;
186 reg = <0x4 0x4>;
190 reg = <0x8 0x4>;
194 reg = <0x100 0x4>;
200 reg = <0x1e000 0x330>;
213 reg = <0x36000 0x1000>;
222 #size-cells = <0>;
223 reg = <0x37000 0x64>;
232 reg = <0x3b000 0x1000>;
238 reg = <0x50000 0x1000>;
245 reg = <0 0xd4200000 0 0x200000>;
248 ranges = <0 0 0xd4200000 0x200000>;
252 reg = <0x7000 0x200>;
254 #phy-cells = <0>;
259 reg = <0x8000 0x200>;
268 reg = <0x80000 0x120>;
277 reg = <0x80800 0x120>;
286 reg = <0x81000 0x120>;
295 reg = <0x82800 0x400>;