Lines Matching +full:parent +full:- +full:interrupt +full:- +full:base
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <2>;
25 compatible = "arm,psci-0.2";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
36 * mainline U-Boot, and should be updated by the
40 psci-area@4000000 {
42 no-map;
47 no-map;
52 compatible = "arm,armv8-timer";
53 interrupt-parent = <&gic>;
61 compatible = "arm,cortex-a72-pmu";
62 interrupt-parent = <&pic>;
67 #address-cells = <2>;
68 #size-cells = <2>;
69 compatible = "simple-bus";
70 interrupt-parent = <&gic>;
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "simple-bus";
80 compatible = "marvell,ap806-smmu-500", "arm,mmu-500";
82 dma-coherent;
83 #iommu-cells = <1>;
84 #global-interrupts = <1>;
97 gic: interrupt-controller@210000 {
98 compatible = "arm,gic-400";
99 #interrupt-cells = <3>;
100 #address-cells = <1>;
101 #size-cells = <1>;
103 interrupt-controller;
111 compatible = "arm,gic-v2m-frame";
112 msi-controller;
114 arm,msi-base-spi = <160>;
115 arm,msi-num-spis = <32>;
118 compatible = "arm,gic-v2m-frame";
119 msi-controller;
121 arm,msi-base-spi = <192>;
122 arm,msi-num-spis = <32>;
125 compatible = "arm,gic-v2m-frame";
126 msi-controller;
128 arm,msi-base-spi = <224>;
129 arm,msi-num-spis = <32>;
132 compatible = "arm,gic-v2m-frame";
133 msi-controller;
135 arm,msi-base-spi = <256>;
136 arm,msi-num-spis = <32>;
141 compatible = "marvell,odmi-controller";
142 msi-controller;
143 marvell,odmi-frames = <4>;
148 marvell,spi-base = <128>, <136>, <144>, <152>;
152 compatible = "marvell,ap806-gicp";
154 marvell,spi-ranges = <64 64>, <288 64>;
155 msi-controller;
158 pic: interrupt-controller@3f0100 {
159 compatible = "marvell,armada-8k-pic";
161 #interrupt-cells = <1>;
162 interrupt-controller;
166 sei: interrupt-controller@3f0200 {
167 compatible = "marvell,ap806-sei";
170 #interrupt-cells = <1>;
171 interrupt-controller;
172 msi-controller;
176 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
179 msi-parent = <&gic_v2m0>;
181 dma-coherent;
185 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
188 msi-parent = <&gic_v2m0>;
190 dma-coherent;
194 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
197 msi-parent = <&gic_v2m0>;
199 dma-coherent;
203 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
206 msi-parent = <&gic_v2m0>;
208 dma-coherent;
212 compatible = "marvell,armada-380-spi";
214 #address-cells = <1>;
215 #size-cells = <0>;
222 compatible = "marvell,mv78230-i2c";
224 #address-cells = <1>;
225 #size-cells = <0>;
232 compatible = "snps,dw-apb-uart";
234 reg-shift = <2>;
236 reg-io-width = <1>;
242 compatible = "snps,dw-apb-uart";
244 reg-shift = <2>;
246 reg-io-width = <1>;
253 compatible = "arm,sbsa-gwdt";
259 compatible = "marvell,armada-ap806-sdhci";
262 clock-names = "core";
264 dma-coherent;
265 marvell,xenon-phy-slow-mode;
269 ap_syscon0: system-controller@6f4000 {
270 compatible = "syscon", "simple-mfd";
274 compatible = "marvell,ap806-pinctrl";
276 uart0_pins: uart0-pins {
283 compatible = "marvell,armada-8k-gpio";
286 gpio-controller;
287 #gpio-cells = <2>;
288 gpio-ranges = <&ap_pinctrl 0 0 20>;
289 marvell,pwm-offset = <0x10c0>;
290 #pwm-cells = <2>;
295 ap_syscon1: system-controller@6f8000 {
296 compatible = "syscon", "simple-mfd";
298 #address-cells = <1>;
299 #size-cells = <1>;
301 ap_thermal: thermal-sensor@80 {
302 compatible = "marvell,armada-ap806-thermal";
304 interrupt-parent = <&sei>;
306 #thermal-sensor-cells = <1>;
319 thermal-zones {
320 ap_thermal_ic: ap-ic-thermal {
321 polling-delay-passive = <0>; /* Interrupt driven */
322 polling-delay = <0>; /* Interrupt driven */
324 thermal-sensors = <&ap_thermal 0>;
327 ap_crit: ap-crit {
334 cooling-maps { };
337 ap_thermal_cpu0: ap-cpu0-thermal {
338 polling-delay-passive = <1000>;
339 polling-delay = <1000>;
341 thermal-sensors = <&ap_thermal 1>;
344 cpu0_hot: cpu0-hot {
349 cpu0_emerg: cpu0-emerg {
356 cooling-maps {
357 map0_hot: map0-hot {
359 cooling-device = <&cpu0 1 2>,
362 map0_emerg: map0-ermerg {
364 cooling-device = <&cpu0 3 3>,
370 ap_thermal_cpu1: ap-cpu1-thermal {
371 polling-delay-passive = <1000>;
372 polling-delay = <1000>;
374 thermal-sensors = <&ap_thermal 2>;
377 cpu1_hot: cpu1-hot {
382 cpu1_emerg: cpu1-emerg {
389 cooling-maps {
390 map1_hot: map1-hot {
392 cooling-device = <&cpu0 1 2>,
395 map1_emerg: map1-emerg {
397 cooling-device = <&cpu0 3 3>,
403 ap_thermal_cpu2: ap-cpu2-thermal {
404 polling-delay-passive = <1000>;
405 polling-delay = <1000>;
407 thermal-sensors = <&ap_thermal 3>;
410 cpu2_hot: cpu2-hot {
415 cpu2_emerg: cpu2-emerg {
422 cooling-maps {
423 map2_hot: map2-hot {
425 cooling-device = <&cpu2 1 2>,
428 map2_emerg: map2-emerg {
430 cooling-device = <&cpu2 3 3>,
436 ap_thermal_cpu3: ap-cpu3-thermal {
437 polling-delay-passive = <1000>;
438 polling-delay = <1000>;
440 thermal-sensors = <&ap_thermal 4>;
443 cpu3_hot: cpu3-hot {
448 cpu3_emerg: cpu3-emerg {
455 cooling-maps {
456 map3_hot: map3-bhot {
458 cooling-device = <&cpu2 1 2>,
461 map3_emerg: map3-emerg {
463 cooling-device = <&cpu2 3 3>,