Lines Matching +full:arm +full:- +full:io

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
36 compatible = "arm,cortex-a55";
38 enable-method = "psci";
39 next-level-cache = <&l2>;
44 compatible = "arm,cortex-a55";
46 enable-method = "psci";
47 next-level-cache = <&l2>;
50 l2: l2-cache {
52 cache-level = <2>;
53 cache-unified;
58 compatible = "arm,psci-0.2";
63 compatible = "arm,armv8-timer";
71 compatible = "arm,cortex-a55-pmu";
76 compatible = "simple-bus";
77 #address-cells = <2>;
78 #size-cells = <2>;
81 internal-regs@7f000000 {
82 #address-cells = <1>;
83 #size-cells = <1>;
84 compatible = "simple-bus";
87 dma-coherent;
90 compatible = "snps,dw-apb-uart";
92 reg-shift = <2>;
94 reg-io-width = <1>;
100 compatible = "snps,dw-apb-uart";
102 reg-shift = <2>;
104 reg-io-width = <1>;
110 compatible = "snps,dw-apb-uart";
112 reg-shift = <2>;
114 reg-io-width = <1>;
120 compatible = "snps,dw-apb-uart";
122 reg-shift = <2>;
124 reg-io-width = <1>;
130 #address-cells = <1>;
131 #size-cells = <0>;
132 compatible = "marvell,orion-mdio";
138 compatible = "marvell,mv78230-i2c";
140 #address-cells = <1>;
141 #size-cells = <0>;
144 clock-names = "core";
146 clock-frequency = <100000>;
148 pinctrl-names = "default", "gpio";
149 pinctrl-0 = <&i2c0_pins>;
150 pinctrl-1 = <&i2c0_gpio>;
151 scl-gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
152 sda-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
157 compatible = "marvell,mv78230-i2c";
159 #address-cells = <1>;
160 #size-cells = <0>;
163 clock-names = "core";
165 clock-frequency = <100000>;
167 pinctrl-names = "default", "gpio";
168 pinctrl-0 = <&i2c1_pins>;
169 pinctrl-1 = <&i2c1_gpio>;
170 scl-gpios = <&gpio0 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
171 sda-gpios = <&gpio0 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
176 compatible = "marvell,orion-gpio";
179 gpio-controller;
180 #gpio-cells = <2>;
181 gpio-ranges = <&pinctrl0 0 0 32>;
182 marvell,pwm-offset = <0x1f0>;
183 interrupt-controller;
184 #interrupt-cells = <2>;
193 compatible = "marvell,orion-gpio";
195 gpio-controller;
196 #gpio-cells = <2>;
197 gpio-ranges = <&pinctrl0 0 32 14>;
198 marvell,pwm-offset = <0x1f0>;
199 interrupt-controller;
200 #interrupt-cells = <2>;
207 compatible = "simple-bus";
209 #address-cells = <0x2>;
210 #size-cells = <0x2>;
212 dma-ranges = <0x0 0x0 0x2 0x0 0x0 0x80000000>;
213 dma-coherent;
216 compatible = "marvell,ac5-sdhci",
217 "marvell,armada-ap806-sdhci";
221 clock-names = "core", "axi";
222 bus-width = <8>;
223 non-removable;
224 mmc-ddr-1_8v;
225 mmc-hs200-1_8v;
226 mmc-hs400-1_8v;
234 behind-32bit-controller@7f000000 {
235 compatible = "simple-bus";
236 #address-cells = <0x2>;
237 #size-cells = <0x2>;
240 dma-ranges = <0x0 0x0 0x2 0x0 0x1 0x0>;
241 dma-coherent;
244 compatible = "marvell,armada-ac5-neta";
248 phy-mode = "sgmii";
253 compatible = "marvell,armada-ac5-neta";
257 phy-mode = "sgmii";
262 compatible = "marvell,orion-ehci";
269 compatible = "marvell,orion-ehci";
277 compatible = "marvell,ac5-pinctrl";
280 i2c0_pins: i2c0-pins {
285 i2c0_gpio: i2c0-gpio-pins {
290 i2c1_pins: i2c1-pins {
295 i2c1_gpio: i2c1-gpio-pins {
302 compatible = "marvell,armada-3700-spi";
304 #address-cells = <0x1>;
305 #size-cells = <0x0>;
308 num-cs = <1>;
313 compatible = "marvell,armada-3700-spi";
315 #address-cells = <0x1>;
316 #size-cells = <0x0>;
319 num-cs = <1>;
323 nand: nand-controller@805b0000 {
324 compatible = "marvell,ac5-nand-controller";
326 #address-cells = <0x1>;
327 #size-cells = <0x0>;
333 gic: interrupt-controller@80600000 {
334 compatible = "arm,gic-v3";
335 #interrupt-cells = <3>;
336 interrupt-controller;
344 cnm_clock: cnm-clock {
345 compatible = "fixed-clock";
346 #clock-cells = <0>;
347 clock-frequency = <328000000>;
350 spi_clock: spi-clock {
351 compatible = "fixed-clock";
352 #clock-cells = <0>;
353 clock-frequency = <200000000>;
356 nand_clock: nand-clock {
357 compatible = "fixed-clock";
358 #clock-cells = <0>;
359 clock-frequency = <400000000>;
362 emmc_clock: emmc-clock {
363 compatible = "fixed-clock";
364 #clock-cells = <0>;
365 clock-frequency = <400000000>;