Lines Matching +full:soc +full:- +full:gpio13
1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for lg1312 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a53";
26 next-level-cache = <&L2_0>;
30 compatible = "arm,cortex-a53";
32 enable-method = "psci";
33 next-level-cache = <&L2_0>;
37 compatible = "arm,cortex-a53";
39 enable-method = "psci";
40 next-level-cache = <&L2_0>;
44 compatible = "arm,cortex-a53";
46 enable-method = "psci";
47 next-level-cache = <&L2_0>;
49 L2_0: l2-cache0 {
51 cache-level = <2>;
52 cache-unified;
57 compatible = "arm,psci-0.2", "arm,psci";
64 gic: interrupt-controller@c0001000 {
65 #interrupt-cells = <3>;
66 compatible = "arm,gic-400";
67 interrupt-controller;
75 compatible = "arm,cortex-a53-pmu";
80 interrupt-affinity = <&cpu0>,
87 compatible = "arm,armv8-timer";
99 #clock-cells = <0>;
101 compatible = "fixed-clock";
102 clock-frequency = <198000000>;
103 clock-output-names = "BUSCLK";
106 soc {
107 #address-cells = <2>;
108 #size-cells = <1>;
110 compatible = "simple-bus";
111 interrupt-parent = <&gic>;
119 clock-names = "hclk", "pclk";
120 phy-mode = "rmii";
122 mac-address = [ 00 00 00 00 00 00 ];
127 #address-cells = <2>;
128 #size-cells = <1>;
130 compatible = "simple-bus";
131 interrupt-parent = <&gic>;
139 clock-names = "timer0clk", "timer1clk", "apb_pclk";
146 clock-names = "wdog_clk", "apb_pclk";
153 clock-names = "apb_pclk";
161 clock-names = "apb_pclk";
169 clock-names = "apb_pclk";
177 clock-names = "apb_pclk";
184 clock-names = "apb_pclk";
186 dmac0: dma-controller@c1128000 {
191 clock-names = "apb_pclk";
192 #dma-cells = <1>;
195 #gpio-cells = <2>;
197 gpio-controller;
200 clock-names = "apb_pclk";
204 #gpio-cells = <2>;
206 gpio-controller;
209 clock-names = "apb_pclk";
213 #gpio-cells = <2>;
215 gpio-controller;
218 clock-names = "apb_pclk";
222 #gpio-cells = <2>;
224 gpio-controller;
227 clock-names = "apb_pclk";
230 #gpio-cells = <2>;
232 gpio-controller;
235 clock-names = "apb_pclk";
239 #gpio-cells = <2>;
241 gpio-controller;
244 clock-names = "apb_pclk";
248 #gpio-cells = <2>;
250 gpio-controller;
253 clock-names = "apb_pclk";
257 #gpio-cells = <2>;
259 gpio-controller;
262 clock-names = "apb_pclk";
266 #gpio-cells = <2>;
268 gpio-controller;
271 clock-names = "apb_pclk";
275 #gpio-cells = <2>;
277 gpio-controller;
280 clock-names = "apb_pclk";
284 #gpio-cells = <2>;
286 gpio-controller;
289 clock-names = "apb_pclk";
293 #gpio-cells = <2>;
295 gpio-controller;
298 clock-names = "apb_pclk";
301 #gpio-cells = <2>;
303 gpio-controller;
306 clock-names = "apb_pclk";
309 gpio13: gpio@fd4d0000 { label
310 #gpio-cells = <2>;
312 gpio-controller;
315 clock-names = "apb_pclk";
319 #gpio-cells = <2>;
321 gpio-controller;
324 clock-names = "apb_pclk";
328 #gpio-cells = <2>;
330 gpio-controller;
333 clock-names = "apb_pclk";
337 #gpio-cells = <2>;
339 gpio-controller;
342 clock-names = "apb_pclk";
346 #gpio-cells = <2>;
348 gpio-controller;
351 clock-names = "apb_pclk";