Lines Matching +full:0 +full:xffb40000

22 		service_reserved: svcbuffer@0 {
24 			reg = <0x0 0x0 0x0 0x2000000>;
25 			alignment = <0x1000>;
32 		#size-cells = <0>;
34 		cpu0: cpu@0 {
38 			reg = <0x0>;
45 			reg = <0x1>;
52 			reg = <0x2>;
59 			reg = <0x3>;
77 		#address-cells = <0x2>;
78 		#size-cells = <0x2>;
104 		reg = <0x0 0xfffc1000 0x0 0x1000>,
105 		      <0x0 0xfffc2000 0x0 0x2000>,
106 		      <0x0 0xfffc4000 0x0 0x2000>,
107 		      <0x0 0xfffc6000 0x0 0x2000>;
112 			#clock-cells = <0>;
117 			#clock-cells = <0>;
122 			#clock-cells = <0>;
127 			#clock-cells = <0>;
132 			#clock-cells = <0>;
148 		#phy-cells = <0>;
152 	soc@0 {
158 		ranges = <0 0 0 0xffffffff>;
162 			reg = <0xffd10000 0x1000>;
168 			reg = <0xff800000 0x2000>;
178 			altr,sysmgr-syscon = <&sysmgr 0x44 0>;
186 			reg = <0xff802000 0x2000>;
196 			altr,sysmgr-syscon = <&sysmgr 0x48 0>;
204 			reg = <0xff804000 0x2000>;
214 			altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
222 			#size-cells = <0>;
224 			reg = <0xffc03200 0x100>;
228 			porta: gpio-controller@0 {
233 				reg = <0>;
242 			#size-cells = <0>;
244 			reg = <0xffc03300 0x100>;
248 			portb: gpio-controller@0 {
253 				reg = <0>;
262 			#size-cells = <0>;
264 			reg = <0xffc02800 0x100>;
273 			#size-cells = <0>;
275 			reg = <0xffc02900 0x100>;
284 			#size-cells = <0>;
286 			reg = <0xffc02a00 0x100>;
295 			#size-cells = <0>;
297 			reg = <0xffc02b00 0x100>;
306 			#size-cells = <0>;
308 			reg = <0xffc02c00 0x100>;
317 			#size-cells = <0>;
319 			reg = <0xff808000 0x1000>;
321 			fifo-depth = <0x400>;
328 			altr,sysmgr-syscon = <&sysmgr 0x28 4>;
334 			#size-cells = <0>;
336 			reg = <0xffb90000 0x10000>,
337 			      <0xffb80000 0x1000>;
350 			reg = <0xffe00000 0x40000>;
353 			ranges = <0 0xffe00000 0x40000>;
358 			reg = <0xffda0000 0x1000>;
378 			reg = <0xffd13000 0xa0>;
380 			pinctrl-single,function-mask = <0x0000000f>;
386 			reg = <0xffd13100 0x20>;
392 			reg = <0xffd11000 0x100>;
398 			reg = <0xfa000000 0x40000>;
439 			stream-match-mask = <0x7ff0>;
449 			#size-cells = <0>;
450 			reg = <0xffda4000 0x1000>;
463 			#size-cells = <0>;
464 			reg = <0xffda5000 0x1000>;
476 			reg = <0xffd12000 0x500>;
482 			reg = <0xffc03000 0x100>;
490 			reg = <0xffc03100 0x100>;
498 			reg = <0xffd00000 0x100>;
506 			reg = <0xffd00100 0x100>;
513 			reg = <0xffc02000 0x100>;
524 			reg = <0xffc02100 0x100>;
535 			reg = <0xffb00000 0x40000>;
549 			reg = <0xffb40000 0x40000>;
562 			reg = <0xffd00200 0x100>;
571 			reg = <0xffd00300 0x100>;
580 			reg = <0xffd00400 0x100>;
589 			reg = <0xffd00500 0x100>;
598 			reg = <0xf8011100 0xc0>;
621 				reg = <0xff8cc000 0x100>;
629 				reg = <0xff8c4000 0x100>;
637 				reg = <0xff8c0000 0x100>;
645 				reg = <0xff8c0400 0x100>;
653 				reg = <0xff8c8c00 0x100>;
663 			#size-cells = <0>;
664 			reg = <0xff8d2000 0x100>,
665 			      <0xff900000 0x100000>;
669 			cdns,trigger-address = <0x00000000>;