Lines Matching refs:MUX_M1
53 0xc MUX_M1 /* SD_CLK (IOMG003) */
54 0x10 MUX_M1 /* SD_CMD (IOMG004) */
55 0x14 MUX_M1 /* SD_DATA0 (IOMG005) */
56 0x18 MUX_M1 /* SD_DATA1 (IOMG006) */
57 0x1c MUX_M1 /* SD_DATA2 (IOMG007) */
58 0x20 MUX_M1 /* SD_DATA3 (IOMG008) */
74 0x128 MUX_M1 /* SDIO_CLK (IOMG074) */
75 0x12c MUX_M1 /* SDIO_CMD (IOMG075) */
76 0x130 MUX_M1 /* SDIO_DATA0 (IOMG076) */
77 0x134 MUX_M1 /* SDIO_DATA1 (IOMG077) */
78 0x138 MUX_M1 /* SDIO_DATA2 (IOMG078) */
79 0x13c MUX_M1 /* SDIO_DATA3 (IOMG079) */
88 0x30 MUX_M1 /* ISP_SHUTTER0 (IOMG012) */
89 0x34 MUX_M1 /* ISP_SHUTTER1 (IOMG013) */
90 0x38 MUX_M1 /* ISP_PWM (IOMG014) */
95 0x4c MUX_M1 /* ISP_STROBE0 (IOMG019) */
96 0x50 MUX_M1 /* ISP_STROBE1 (IOMG020) */
118 0x70 MUX_M1 /* DMIC_CLK (IOMG028) */
127 0x80 MUX_M1 /* FM_XCLK (IOMG032) */
128 0x84 MUX_M1 /* FM_XFS (IOMG033) */
129 0x88 MUX_M1 /* FM_DI (IOMG034) */
130 0x8c MUX_M1 /* FM_DO (IOMG035) */
145 0xb8 MUX_M1 /* PWM_IN (IOMG046) */
151 0xbc MUX_M1 /* BL_PWM (IOMG047) */
182 0x180 MUX_M1 /* UART3_CTS_N (IOMG096) */
183 0x184 MUX_M1 /* UART3_RTS_N (IOMG097) */
184 0x188 MUX_M1 /* UART3_RXD (IOMG098) */
185 0x18c MUX_M1 /* UART3_TXD (IOMG099) */
191 0x1d0 MUX_M1 /* UART4_CTS_N (IOMG116) */
192 0x1d4 MUX_M1 /* UART4_RTS_N (IOMG117) */
193 0x1d8 MUX_M1 /* UART4_RXD (IOMG118) */
194 0x1dc MUX_M1 /* UART4_TXD (IOMG119) */
200 0x1c8 MUX_M1 /* UART5_RXD (IOMG114) */
201 0x1cc MUX_M1 /* UART5_TXD (IOMG115) */
228 0x1a0 MUX_M1 /* SPI0_DI (IOMG104) */
229 0x1a4 MUX_M1 /* SPI0_DO (IOMG105) */
230 0x1a8 MUX_M1 /* SPI0_CS_N (IOMG106) */
231 0x1ac MUX_M1 /* SPI0_CLK (IOMG107) */