Lines Matching refs:MUX_M0
22 0x0 MUX_M0 /* BOOT_SEL (IOMG000) */
28 0x100 MUX_M0 /* EMMC_CLK (IOMG064) */
29 0x104 MUX_M0 /* EMMC_CMD (IOMG065) */
30 0x108 MUX_M0 /* EMMC_DATA0 (IOMG066) */
31 0x10c MUX_M0 /* EMMC_DATA1 (IOMG067) */
32 0x110 MUX_M0 /* EMMC_DATA2 (IOMG068) */
33 0x114 MUX_M0 /* EMMC_DATA3 (IOMG069) */
34 0x118 MUX_M0 /* EMMC_DATA4 (IOMG070) */
35 0x11c MUX_M0 /* EMMC_DATA5 (IOMG071) */
36 0x120 MUX_M0 /* EMMC_DATA6 (IOMG072) */
37 0x124 MUX_M0 /* EMMC_DATA7 (IOMG073) */
43 0xc MUX_M0 /* SD_CLK (IOMG003) */
44 0x10 MUX_M0 /* SD_CMD (IOMG004) */
45 0x14 MUX_M0 /* SD_DATA0 (IOMG005) */
46 0x18 MUX_M0 /* SD_DATA1 (IOMG006) */
47 0x1c MUX_M0 /* SD_DATA2 (IOMG007) */
48 0x20 MUX_M0 /* SD_DATA3 (IOMG008) */
64 0x128 MUX_M0 /* SDIO_CLK (IOMG074) */
65 0x12c MUX_M0 /* SDIO_CMD (IOMG075) */
66 0x130 MUX_M0 /* SDIO_DATA0 (IOMG076) */
67 0x134 MUX_M0 /* SDIO_DATA1 (IOMG077) */
68 0x138 MUX_M0 /* SDIO_DATA2 (IOMG078) */
69 0x13c MUX_M0 /* SDIO_DATA3 (IOMG079) */
85 0x24 MUX_M0 /* ISP_PWDN0 (IOMG009) */
86 0x28 MUX_M0 /* ISP_PWDN1 (IOMG010) */
87 0x2c MUX_M0 /* ISP_PWDN2 (IOMG011) */
91 0x3c MUX_M0 /* ISP_CCLK0 (IOMG015) */
92 0x40 MUX_M0 /* ISP_CCLK1 (IOMG016) */
93 0x44 MUX_M0 /* ISP_RESETB0 (IOMG017) */
94 0x48 MUX_M0 /* ISP_RESETB1 (IOMG018) */
97 0x54 MUX_M0 /* ISP_SDA0 (IOMG021) */
98 0x58 MUX_M0 /* ISP_SCL0 (IOMG022) */
99 0x5c MUX_M0 /* ISP_SDA1 (IOMG023) */
100 0x60 MUX_M0 /* ISP_SCL1 (IOMG024) */
106 0x68 MUX_M0 /* HKADC_SSI (IOMG026) */
112 0x6c MUX_M0 /* CODEC_CLK (IOMG027) */
119 0x74 MUX_M0 /* CODEC_SYNC (IOMG029) */
120 0x78 MUX_M0 /* CODEC_DI (IOMG030) */
121 0x7c MUX_M0 /* CODEC_DO (IOMG031) */
136 0x90 MUX_M0 /* BT_XCLK (IOMG036) */
137 0x94 MUX_M0 /* BT_XFS (IOMG037) */
138 0x98 MUX_M0 /* BT_DI (IOMG038) */
139 0x9c MUX_M0 /* BT_DO (IOMG039) */
157 0xc0 MUX_M0 /* UART0_RXD (IOMG048) */
158 0xc4 MUX_M0 /* UART0_TXD (IOMG049) */
164 0xc8 MUX_M0 /* UART1_CTS_N (IOMG050) */
165 0xcc MUX_M0 /* UART1_RTS_N (IOMG051) */
166 0xd0 MUX_M0 /* UART1_RXD (IOMG052) */
167 0xd4 MUX_M0 /* UART1_TXD (IOMG053) */
173 0xd8 MUX_M0 /* UART2_CTS_N (IOMG054) */
174 0xdc MUX_M0 /* UART2_RTS_N (IOMG055) */
175 0xe0 MUX_M0 /* UART2_RXD (IOMG056) */
176 0xe4 MUX_M0 /* UART2_TXD (IOMG057) */
207 0xe8 MUX_M0 /* I2C0_SCL (IOMG058) */
208 0xec MUX_M0 /* I2C0_SDA (IOMG059) */
214 0xf0 MUX_M0 /* I2C1_SCL (IOMG060) */
215 0xf4 MUX_M0 /* I2C1_SDA (IOMG061) */
221 0xf8 MUX_M0 /* I2C2_SCL (IOMG062) */
222 0xfc MUX_M0 /* I2C2_SDA (IOMG063) */