Lines Matching +full:0 +full:x1010000

27 		#size-cells = <0>;
66 arm,psci-suspend-param = <0x0010000>;
75 arm,psci-suspend-param = <0x1010000>;
83 cpu0: cpu@0 {
86 reg = <0x0 0x0>;
89 clocks = <&stub_clock 0>;
99 reg = <0x0 0x1>;
102 clocks = <&stub_clock 0>;
112 reg = <0x0 0x2>;
115 clocks = <&stub_clock 0>;
125 reg = <0x0 0x3>;
128 clocks = <&stub_clock 0>;
138 reg = <0x0 0x100>;
141 clocks = <&stub_clock 0>;
151 reg = <0x0 0x101>;
154 clocks = <&stub_clock 0>;
164 reg = <0x0 0x102>;
167 clocks = <&stub_clock 0>;
177 reg = <0x0 0x103>;
180 clocks = <&stub_clock 0>;
200 cpu_opp_table: opp-table-0 {
233 reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
234 <0x0 0xf6802000 0 0x2000>, /* GICC */
235 <0x0 0xf6804000 0 0x2000>, /* GICH */
236 <0x0 0xf6806000 0 0x2000>; /* GICV */
237 #address-cells = <0>;
260 reg = <0x0 0xfff80000 0x0 0x12000>;
265 reg = <0x0 0xf7800000 0x0 0x2000>;
272 reg = <0x0 0xf7030000 0x0 0x2000>;
279 reg = <0x0 0xf4410000 0x0 0x1000>;
286 reg = <0x0 0xf7032000 0x0 0x1000>;
292 reg = <0x0 0xf6504000 0x0 0x1000>;
298 reg = <0x0 0xf4520000 0x0 0x4000>;
306 mboxes = <&mailbox 1 0 11>;
311 reg = <0x0 0xf8015000 0x0 0x1000>;
320 reg = <0x0 0xf7111000 0x0 0x1000>;
326 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func1 &uart1_cfg_func2>;
334 reg = <0x0 0xf7112000 0x0 0x1000>;
340 pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
346 reg = <0x0 0xf7113000 0x0 0x1000>;
352 pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
358 reg = <0x0 0xf7114000 0x0 0x1000>;
364 pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
370 reg = <0x0 0xf7370000 0x0 0x1000>;
374 interrupts = <0 84 4>;
383 reg = <0x0 0xf8008000 0x0 0x1000>;
394 reg = <0x0 0xf8003000 0x0 0x1000>;
395 interrupts = <0 12 4>;
402 reg = <0x0 0xf8004000 0x0 0x1000>;
403 interrupts = <0 8 4>;
410 reg = <0x0 0xf7010000 0x0 0x27c>;
412 #size-cells = <0>;
418 &range 80 8 MUX_M0 /* gpio 3: [0..7] */
419 &range 88 8 MUX_M0 /* gpio 4: [0..7] */
420 &range 96 8 MUX_M0 /* gpio 5: [0..7] */
421 &range 104 8 MUX_M0 /* gpio 6: [0..7] */
422 &range 112 8 MUX_M0 /* gpio 7: [0..7] */
423 &range 120 2 MUX_M0 /* gpio 8: [0..1] */
425 &range 8 8 MUX_M1 /* gpio 9: [0..7] */
426 &range 0 1 MUX_M1 /* gpio 10: [0] */
428 &range 23 3 MUX_M1 /* gpio 11: [0..2] */
430 &range 33 3 MUX_M1 /* gpio 12: [0..2] */
432 &range 48 8 MUX_M1 /* gpio 13: [0..7] */
433 &range 56 8 MUX_M1 /* gpio 14: [0..7] */
434 &range 74 6 MUX_M1 /* gpio 15: [0..5] */
437 &range 127 8 MUX_M1 /* gpio 16: [0..7] */
438 &range 135 8 MUX_M1 /* gpio 17: [0..7] */
439 &range 143 8 MUX_M1 /* gpio 18: [0..7] */
440 &range 151 8 MUX_M1 /* gpio 19: [0..7] */
449 reg = <0x0 0xf7010800 0x0 0x28c>;
451 #size-cells = <0>;
458 reg = <0x0 0xf8001800 0x0 0x78>;
460 #size-cells = <0>;
467 reg = <0x0 0xf8011000 0x0 0x1000>;
468 interrupts = <0 52 0x4>;
479 reg = <0x0 0xf8012000 0x0 0x1000>;
480 interrupts = <0 53 0x4>;
491 reg = <0x0 0xf8013000 0x0 0x1000>;
492 interrupts = <0 54 0x4>;
503 reg = <0x0 0xf8014000 0x0 0x1000>;
504 interrupts = <0 55 0x4>;
507 gpio-ranges = <&pmx0 0 80 8>;
516 reg = <0x0 0xf7020000 0x0 0x1000>;
517 interrupts = <0 56 0x4>;
520 gpio-ranges = <&pmx0 0 88 8>;
529 reg = <0x0 0xf7021000 0x0 0x1000>;
530 interrupts = <0 57 0x4>;
533 gpio-ranges = <&pmx0 0 96 8>;
542 reg = <0x0 0xf7022000 0x0 0x1000>;
543 interrupts = <0 58 0x4>;
546 gpio-ranges = <&pmx0 0 104 8>;
555 reg = <0x0 0xf7023000 0x0 0x1000>;
556 interrupts = <0 59 0x4>;
559 gpio-ranges = <&pmx0 0 112 8>;
568 reg = <0x0 0xf7024000 0x0 0x1000>;
569 interrupts = <0 60 0x4>;
572 gpio-ranges = <&pmx0 0 120 2 &pmx0 2 2 6>;
581 reg = <0x0 0xf7025000 0x0 0x1000>;
582 interrupts = <0 61 0x4>;
585 gpio-ranges = <&pmx0 0 8 8>;
594 reg = <0x0 0xf7026000 0x0 0x1000>;
595 interrupts = <0 62 0x4>;
598 gpio-ranges = <&pmx0 0 0 1 &pmx0 1 16 7>;
607 reg = <0x0 0xf7027000 0x0 0x1000>;
608 interrupts = <0 63 0x4>;
611 gpio-ranges = <&pmx0 0 23 3 &pmx0 3 28 5>;
620 reg = <0x0 0xf7028000 0x0 0x1000>;
621 interrupts = <0 64 0x4>;
624 gpio-ranges = <&pmx0 0 33 3 &pmx0 3 43 5>;
633 reg = <0x0 0xf7029000 0x0 0x1000>;
634 interrupts = <0 65 0x4>;
637 gpio-ranges = <&pmx0 0 48 8>;
646 reg = <0x0 0xf702a000 0x0 0x1000>;
647 interrupts = <0 66 0x4>;
650 gpio-ranges = <&pmx0 0 56 8>;
659 reg = <0x0 0xf702b000 0x0 0x1000>;
660 interrupts = <0 67 0x4>;
664 &pmx0 0 74 6
676 reg = <0x0 0xf702c000 0x0 0x1000>;
677 interrupts = <0 68 0x4>;
680 gpio-ranges = <&pmx0 0 127 8>;
689 reg = <0x0 0xf702d000 0x0 0x1000>;
690 interrupts = <0 69 0x4>;
693 gpio-ranges = <&pmx0 0 135 8>;
702 reg = <0x0 0xf702e000 0x0 0x1000>;
703 interrupts = <0 70 0x4>;
706 gpio-ranges = <&pmx0 0 143 8>;
715 reg = <0x0 0xf702f000 0x0 0x1000>;
716 interrupts = <0 71 0x4>;
719 gpio-ranges = <&pmx0 0 151 8>;
728 reg = <0x0 0xf7106000 0x0 0x1000>;
729 interrupts = <0 50 4>;
730 bus-id = <0>;
731 enable-dma = <0>;
735 pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>;
737 cs-gpios = <&gpio6 2 0>;
743 reg = <0x0 0xf7100000 0x0 0x1000>;
744 interrupts = <0 44 4>;
748 pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
754 reg = <0x0 0xf7101000 0x0 0x1000>;
756 interrupts = <0 45 4>;
759 pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
765 reg = <0x0 0xf7102000 0x0 0x1000>;
767 interrupts = <0 46 4>;
770 pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;
776 #phy-cells = <0>;
783 reg = <0x0 0xf72c0000 0x0 0x40000>;
793 interrupts = <0 77 0x4>;
798 reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
799 <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */
806 reg = <0x0 0xf723d000 0x0 0x1000>;
807 interrupts = <0x0 0x48 0x4>;
813 pinctrl-0 = <&emmc_pmx_func &emmc_clk_cfg_func
820 reg = <0x0 0xf723e000 0x0 0x1000>;
821 interrupts = <0x0 0x49 0x4>;
822 #address-cells = <0x1>;
823 #size-cells = <0x0>;
829 pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>;
835 reg = <0x0 0xf723f000 0x0 0x1000>;
836 interrupts = <0x0 0x4a 0x4>;
842 pinctrl-0 = <&sdio_pmx_func &sdio_clk_cfg_func &sdio_cfg_func>;
848 reg = <0x0 0xf8005000 0x0 0x1000>;
857 reg = <0x0 0xf7030700 0x0 0x1000>;
866 reg = <0x0 0xf7118000 0x0 0x8000>; /* i2s unit */
890 hysteresis = <0>;
896 hysteresis = <0>;
919 reg = <0x0 0xf4100000 0x0 0x7800>;
923 interrupts = <0 115 4>; /* ldi interrupt */
948 reg = <0x0 0xf4107800 0x0 0x100>;
955 #size-cells = <0>;
957 /* 0 for input port */
958 port@0 {
959 reg = <0>;
969 reg = <0 0xf6590000 0 0x1000>;
977 reg = <0 0xf6592000 0 0x1000>;
985 reg = <0 0xf6594000 0 0x1000>;
993 reg = <0 0xf6596000 0 0x1000>;
1001 reg = <0 0xf65d0000 0 0x1000>;
1009 reg = <0 0xf65d2000 0 0x1000>;
1017 reg = <0 0xf65d4000 0 0x1000>;
1025 reg = <0 0xf65d6000 0 0x1000>;
1033 reg = <0x0 0xf4080000 0x0 0x00040000>;