Lines Matching +full:ti +full:- +full:dp83867
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
3 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
14 compatible = "iio-hwmon";
15 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>;
23 backlight_lvds: backlight-lvds {
24 compatible = "pwm-backlight";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_bl_lvds>;
28 brightness-levels = <0 4 8 16 32 64 128 255>;
29 default-brightness-level = <7>;
30 power-supply = <®_12v0>;
31 enable-gpios = <&lsio_gpio1 30 GPIO_ACTIVE_HIGH>;
36 stdout-path = &lpuart1;
39 /* Non-controllable PCIe reference clock generator */
40 pcie_refclk: clock-pcie-ref {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <100000000>;
46 gpio-keys {
47 compatible = "gpio-keys";
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_gpiobuttons>;
52 switch-a {
58 switch-b {
65 gpio-leds {
66 compatible = "gpio-leds";
72 linux,default-trigger = "default-on";
79 linux,default-trigger = "heartbeat";
85 reg_12v0: regulator-12v0 {
86 compatible = "regulator-fixed";
87 regulator-name = "V_12V";
88 regulator-min-microvolt = <12000000>;
89 regulator-max-microvolt = <12000000>;
91 enable-active-high;
94 reg_pcie_1v5: regulator-pcie-1v5 {
95 compatible = "regulator-fixed";
96 regulator-name = "MBA8XX_PCIE_1V5";
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_reg_pcie_1v5>;
99 regulator-min-microvolt = <1500000>;
100 regulator-max-microvolt = <1500000>;
102 startup-delay-us = <1000>;
103 enable-active-high;
106 reg_pcie_3v3: regulator-pcie-3v3 {
107 compatible = "regulator-fixed";
108 regulator-name = "MBA8XX_PCIE_3V3";
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_reg_pcie_3v3>;
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
114 startup-delay-us = <1000>;
115 enable-active-high;
116 regulator-always-on;
119 reg_3v3_mb: regulator-usdhc2-vmmc {
120 compatible = "regulator-fixed";
121 regulator-name = "V_3V3_MB";
122 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <3300000>;
127 compatible = "fsl,imx-audio-tlv320aic32x4";
128 model = "tqm-tlv320aic32";
129 audio-codec = <&tlv320aic3x04>;
130 ssi-controller = <&sai1>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_adc0>;
137 vref-supply = <®_1v8>;
138 #io-channel-cells = <1>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_admapwm>;
148 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_fec1>;
150 phy-mode = "rgmii-id";
151 phy-handle = <ðphy0>;
155 #address-cells = <1>;
156 #size-cells = <0>;
158 ethphy0: ethernet-phy@0 {
159 compatible = "ethernet-phy-ieee802.3-c22";
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_ethphy0>;
163 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
164 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
165 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
166 ti,dp83867-rxctrl-strap-quirk;
167 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
168 reset-gpios = <&lsio_gpio3 2 GPIO_ACTIVE_LOW>;
169 reset-assert-us = <500000>;
170 reset-deassert-us = <50000>;
171 enet-phy-lane-no-swap;
172 interrupt-parent = <&lsio_gpio3>;
176 ethphy3: ethernet-phy@3 {
177 compatible = "ethernet-phy-ieee802.3-c22";
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_ethphy3>;
181 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
182 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
183 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
184 ti,dp83867-rxctrl-strap-quirk;
185 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
186 reset-gpios = <&lsio_gpio3 3 GPIO_ACTIVE_LOW>;
187 reset-assert-us = <500000>;
188 reset-deassert-us = <50000>;
189 enet-phy-lane-no-swap;
190 interrupt-parent = <&lsio_gpio3>;
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_fec2>;
199 phy-mode = "rgmii-id";
200 phy-handle = <ðphy3>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_can0>;
207 xceiver-supply = <®_3v3>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_can1>;
214 xceiver-supply = <®_3v3>;
219 fsl,hsio-cfg = "pciea-x2-pcieb";
220 fsl,refclk-pad-mode = "input";
225 tlv320aic3x04: audio-codec@18 {
226 compatible = "ti,tlv320aic32x4";
229 clock-names = "mclk";
230 iov-supply = <®_1v8>;
231 ldoin-supply = <®_3v3>;
234 se97b_1c: temperature-sensor@1c {
235 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
243 vcc-supply = <®_3v3>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_pca9538>;
251 gpio-controller;
252 #gpio-cells = <2>;
253 interrupt-parent = <&lsio_gpio4>;
255 interrupt-controller;
256 #interrupt-cells = <2>;
257 vcc-supply = <®_1v8>;
259 gpio-line-names = "", "LED_A",
267 clock-frequency = <100000>;
268 pinctrl-names = "default", "gpio";
269 pinctrl-0 = <&pinctrl_lpi2c2>;
270 pinctrl-1 = <&pinctrl_lpi2c2gpio>;
271 scl-gpios = <&lsio_gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
272 sda-gpios = <&lsio_gpio2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&pinctrl_spi1>;
281 cs-gpios = <&lsio_gpio0 27 GPIO_ACTIVE_LOW>, <&lsio_gpio0 29 GPIO_ACTIVE_LOW>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_spi2>;
288 cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_spi3>;
295 num-cs = <2>;
296 cs-gpios = <&lsio_gpio0 16 GPIO_ACTIVE_LOW>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&pinctrl_lpuart1>;
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_lpuart3>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&pinctrl_lsgpio3>;
315 gpio-line-names = "", "", "", "",
327 phy-names = "pcie-phy";
328 pinctrl-0 = <&pinctrl_pcieb>;
329 pinctrl-names = "default";
330 reset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
331 vpcie-supply = <®_pcie_1v5>;
336 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
340 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
341 pinctrl-names = "default";
342 pinctrl-0 = <&pinctrl_sai1>;
347 pinctrl-names = "default";
348 pinctrl-0 = <&pinctrl_usbotg1>;
349 srp-disable;
350 hnp-disable;
351 adp-disable;
352 power-active-high;
353 over-current-active-low;
376 pinctrl-names = "default", "state_100mhz", "state_200mhz";
377 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
378 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
379 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
380 bus-width = <4>;
381 cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>;
382 wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>;
383 vmmc-supply = <®_3v3_mb>;
384 no-1-8-v;
385 no-sdio;
386 no-mmc;
556 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
566 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {