Lines Matching +full:io +full:- +full:expander

1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
3 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
14 compatible = "iio-hwmon";
15 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>;
23 backlight_lvds: backlight-lvds {
24 compatible = "pwm-backlight";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_bl_lvds>;
28 brightness-levels = <0 4 8 16 32 64 128 255>;
29 default-brightness-level = <7>;
30 power-supply = <&reg_12v0>;
31 enable-gpios = <&lsio_gpio1 30 GPIO_ACTIVE_HIGH>;
36 stdout-path = &lpuart1;
39 gpio-keys {
40 compatible = "gpio-keys";
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_gpiobuttons>;
45 switch-a {
51 switch-b {
58 gpio-leds {
59 compatible = "gpio-leds";
64 gpios = <&expander 1 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "default-on";
71 gpios = <&expander 2 GPIO_ACTIVE_HIGH>;
72 linux,default-trigger = "heartbeat";
78 reg_12v0: regulator-12v0 {
79 compatible = "regulator-fixed";
80 regulator-name = "V_12V";
81 regulator-min-microvolt = <12000000>;
82 regulator-max-microvolt = <12000000>;
83 gpio = <&expander 6 GPIO_ACTIVE_HIGH>;
84 enable-active-high;
87 reg_pcie_1v5: regulator-pcie-1v5 {
88 compatible = "regulator-fixed";
89 regulator-name = "MBA8XX_PCIE_1V5";
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_reg_pcie_1v5>;
92 regulator-min-microvolt = <1500000>;
93 regulator-max-microvolt = <1500000>;
95 startup-delay-us = <1000>;
96 enable-active-high;
99 reg_pcie_3v3: regulator-pcie-3v3 {
100 compatible = "regulator-fixed";
101 regulator-name = "MBA8XX_PCIE_3V3";
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_reg_pcie_3v3>;
104 regulator-min-microvolt = <3300000>;
105 regulator-max-microvolt = <3300000>;
107 startup-delay-us = <1000>;
108 enable-active-high;
109 regulator-always-on;
112 reg_3v3_mb: regulator-usdhc2-vmmc {
113 compatible = "regulator-fixed";
114 regulator-name = "V_3V3_MB";
115 regulator-min-microvolt = <3300000>;
116 regulator-max-microvolt = <3300000>;
120 compatible = "fsl,imx-audio-tlv320aic32x4";
121 model = "tqm-tlv320aic32";
122 audio-codec = <&tlv320aic3x04>;
123 ssi-controller = <&sai1>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_adc0>;
130 vref-supply = <&reg_1v8>;
131 #io-channel-cells = <1>;
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_admapwm>;
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_fec1>;
143 phy-mode = "rgmii-id";
144 phy-handle = <&ethphy0>;
148 #address-cells = <1>;
149 #size-cells = <0>;
151 ethphy0: ethernet-phy@0 {
152 compatible = "ethernet-phy-ieee802.3-c22";
154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_ethphy0>;
156 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
157 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
158 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
159 ti,dp83867-rxctrl-strap-quirk;
160 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
161 reset-gpios = <&lsio_gpio3 2 GPIO_ACTIVE_LOW>;
162 reset-assert-us = <500000>;
163 reset-deassert-us = <50000>;
164 enet-phy-lane-no-swap;
165 interrupt-parent = <&lsio_gpio3>;
169 ethphy3: ethernet-phy@3 {
170 compatible = "ethernet-phy-ieee802.3-c22";
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_ethphy3>;
174 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
175 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
176 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
177 ti,dp83867-rxctrl-strap-quirk;
178 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
179 reset-gpios = <&lsio_gpio3 3 GPIO_ACTIVE_LOW>;
180 reset-assert-us = <500000>;
181 reset-deassert-us = <50000>;
182 enet-phy-lane-no-swap;
183 interrupt-parent = <&lsio_gpio3>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_fec2>;
192 phy-mode = "rgmii-id";
193 phy-handle = <&ethphy3>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_can0>;
200 xceiver-supply = <&reg_3v3>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_can1>;
207 xceiver-supply = <&reg_3v3>;
212 tlv320aic3x04: audio-codec@18 {
216 clock-names = "mclk";
217 iov-supply = <&reg_1v8>;
218 ldoin-supply = <&reg_3v3>;
221 se97b_1c: temperature-sensor@1c {
222 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
230 vcc-supply = <&reg_3v3>;
233 expander: gpio@70 { label
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_pca9538>;
238 gpio-controller;
239 #gpio-cells = <2>;
240 interrupt-parent = <&lsio_gpio4>;
242 interrupt-controller;
243 #interrupt-cells = <2>;
244 vcc-supply = <&reg_1v8>;
246 gpio-line-names = "", "LED_A",
254 clock-frequency = <100000>;
255 pinctrl-names = "default", "gpio";
256 pinctrl-0 = <&pinctrl_lpi2c2>;
257 pinctrl-1 = <&pinctrl_lpi2c2gpio>;
258 scl-gpios = <&lsio_gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
259 sda-gpios = <&lsio_gpio2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_spi1>;
268 cs-gpios = <&lsio_gpio0 27 GPIO_ACTIVE_LOW>, <&lsio_gpio0 29 GPIO_ACTIVE_LOW>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&pinctrl_spi2>;
275 cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_spi3>;
282 num-cs = <2>;
283 cs-gpios = <&lsio_gpio0 16 GPIO_ACTIVE_LOW>;
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_lpuart1>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_lpuart3>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_lsgpio3>;
302 gpio-line-names = "", "", "", "",
312 /* TODO: Mini-PCIe */
315 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
319 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
320 pinctrl-names = "default";
321 pinctrl-0 = <&pinctrl_sai1>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_usbotg1>;
328 srp-disable;
329 hnp-disable;
330 adp-disable;
331 power-active-high;
332 over-current-active-low;
355 pinctrl-names = "default", "state_100mhz", "state_200mhz";
356 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
357 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
358 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
359 bus-width = <4>;
360 cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>;
361 wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>;
362 vmmc-supply = <&reg_3v3_mb>;
363 no-1-8-v;
364 no-sdio;
365 no-mmc;
535 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
545 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {