Lines Matching +full:aips +full:- +full:bus
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
56 #address-cells = <1>;
57 #size-cells = <0>;
59 idle-states {
60 entry-method = "psci";
62 cpu_pd_wait: cpu-pd-wait {
63 compatible = "arm,idle-state";
64 arm,psci-suspend-param = <0x0010033>;
65 local-timer-stop;
66 entry-latency-us = <10000>;
67 exit-latency-us = <7000>;
68 min-residency-us = <27000>;
69 wakeup-latency-us = <15000>;
75 compatible = "arm,cortex-a55";
77 enable-method = "psci";
78 #cooling-cells = <2>;
79 cpu-idle-states = <&cpu_pd_wait>;
80 i-cache-size = <32768>;
81 i-cache-line-size = <64>;
82 i-cache-sets = <128>;
83 d-cache-size = <32768>;
84 d-cache-line-size = <64>;
85 d-cache-sets = <128>;
86 next-level-cache = <&l2_cache_l0>;
91 compatible = "arm,cortex-a55";
93 enable-method = "psci";
94 #cooling-cells = <2>;
95 cpu-idle-states = <&cpu_pd_wait>;
96 i-cache-size = <32768>;
97 i-cache-line-size = <64>;
98 i-cache-sets = <128>;
99 d-cache-size = <32768>;
100 d-cache-line-size = <64>;
101 d-cache-sets = <128>;
102 next-level-cache = <&l2_cache_l1>;
105 l2_cache_l0: l2-cache-l0 {
107 cache-size = <65536>;
108 cache-line-size = <64>;
109 cache-sets = <256>;
110 cache-level = <2>;
111 cache-unified;
112 next-level-cache = <&l3_cache>;
115 l2_cache_l1: l2-cache-l1 {
117 cache-size = <65536>;
118 cache-line-size = <64>;
119 cache-sets = <256>;
120 cache-level = <2>;
121 cache-unified;
122 next-level-cache = <&l3_cache>;
125 l3_cache: l3-cache {
127 cache-size = <262144>;
128 cache-line-size = <64>;
129 cache-sets = <256>;
130 cache-level = <3>;
131 cache-unified;
135 osc_32k: clock-osc-32k {
136 compatible = "fixed-clock";
137 #clock-cells = <0>;
138 clock-frequency = <32768>;
139 clock-output-names = "osc_32k";
142 osc_24m: clock-osc-24m {
143 compatible = "fixed-clock";
144 #clock-cells = <0>;
145 clock-frequency = <24000000>;
146 clock-output-names = "osc_24m";
149 clk_ext1: clock-ext1 {
150 compatible = "fixed-clock";
151 #clock-cells = <0>;
152 clock-frequency = <133000000>;
153 clock-output-names = "clk_ext1";
157 compatible = "arm,cortex-a55-pmu";
162 compatible = "arm,psci-1.0";
167 compatible = "arm,armv8-timer";
172 clock-frequency = <24000000>;
173 arm,no-tick-in-suspend;
174 interrupt-parent = <&gic>;
177 gic: interrupt-controller@48000000 {
178 compatible = "arm,gic-v3";
181 #interrupt-cells = <3>;
182 interrupt-controller;
184 interrupt-parent = <&gic>;
187 thermal-zones {
188 cpu-thermal {
189 polling-delay-passive = <250>;
190 polling-delay = <2000>;
192 thermal-sensors = <&tmu 0>;
195 cpu_alert: cpu-alert {
201 cpu_crit: cpu-crit {
208 cooling-maps {
211 cooling-device =
219 cm33: remoteproc-cm33 {
220 compatible = "fsl,imx93-cm33";
226 compatible = "fsl,imx93-mqs";
232 compatible = "fsl,imx93-mqs";
238 compatible = "usb-nop-xceiv";
239 #phy-cells = <0>;
241 clock-names = "main_clk";
245 compatible = "usb-nop-xceiv";
246 #phy-cells = <0>;
248 clock-names = "main_clk";
252 compatible = "simple-bus";
253 #address-cells = <1>;
254 #size-cells = <1>;
258 aips1: bus@44000000 {
259 compatible = "fsl,aips-bus", "simple-bus";
261 #address-cells = <1>;
262 #size-cells = <1>;
265 edma1: dma-controller@44000000 {
266 compatible = "fsl,imx93-edma3";
268 #dma-cells = <3>;
269 dma-channels = <31>;
275 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, // 5: I3C1 TO Bus
276 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, // 6: I3C1 From Bus
302 clock-names = "dma";
306 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
311 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
315 #mbox-cells = <2>;
320 compatible = "nxp,sysctr-timer";
324 clock-names = "per";
325 nxp,no-divider;
329 compatible = "fsl,imx93-wdt";
333 timeout-sec = <40>;
338 compatible = "fsl,imx93-wdt";
342 timeout-sec = <40>;
347 compatible = "fsl,imx7ulp-pwm";
350 #pwm-cells = <3>;
355 compatible = "fsl,imx7ulp-pwm";
358 #pwm-cells = <3>;
363 compatible = "silvaco,i3c-master-v1";
366 #address-cells = <3>;
367 #size-cells = <0>;
371 clock-names = "pclk", "fast_clk", "slow_clk";
376 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
378 #address-cells = <1>;
379 #size-cells = <0>;
383 clock-names = "per", "ipg";
385 dma-names = "tx", "rx";
390 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
392 #address-cells = <1>;
393 #size-cells = <0>;
397 clock-names = "per", "ipg";
399 dma-names = "tx", "rx";
404 #address-cells = <1>;
405 #size-cells = <0>;
406 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
411 clock-names = "per", "ipg";
413 dma-names = "tx", "rx";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
425 clock-names = "per", "ipg";
427 dma-names = "tx", "rx";
432 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
436 clock-names = "ipg";
438 dma-names = "rx", "tx";
443 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
447 clock-names = "ipg";
449 dma-names = "rx", "tx";
454 compatible = "fsl,imx93-flexcan";
459 clock-names = "ipg", "per";
460 assigned-clocks = <&clk IMX93_CLK_CAN1>;
461 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
462 assigned-clock-rates = <40000000>;
463 fsl,clk-source = /bits/ 8 <0>;
464 fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
469 compatible = "fsl,imx93-sai";
475 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
477 dma-names = "rx", "tx";
478 #sound-dai-cells = <0>;
483 compatible = "fsl,imx93-iomuxc";
489 compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";
493 compatible = "nxp,imx93-bbnsm-rtc";
498 compatible = "nxp,imx93-bbnsm-pwrkey";
504 clk: clock-controller@44450000 {
505 compatible = "fsl,imx93-ccm";
507 #clock-cells = <1>;
509 clock-names = "osc_32k", "osc_24m", "clk_ext1";
510 assigned-clocks = <&clk IMX93_CLK_AUDIO_PLL>;
511 assigned-clock-rates = <393216000>;
515 src: system-controller@44460000 {
516 compatible = "fsl,imx93-src", "syscon";
518 #address-cells = <1>;
519 #size-cells = <1>;
522 mlmix: power-domain@44461800 {
523 compatible = "fsl,imx93-src-slice";
525 #power-domain-cells = <0>;
530 mediamix: power-domain@44462400 {
531 compatible = "fsl,imx93-src-slice";
533 #power-domain-cells = <0>;
539 clock-controller@44480000 {
540 compatible = "fsl,imx93-anatop";
542 #clock-cells = <1>;
546 compatible = "fsl,qoriq-tmu";
550 little-endian;
551 fsl,tmu-range = <0x800000da 0x800000e9
555 fsl,tmu-calibration = <0x00000000 0x0000000e
562 #thermal-sensor-cells = <1>;
566 compatible = "fsl,imx93-micfil";
575 clock-names = "ipg_clk", "ipg_clk_app", "pll8k";
577 dma-names = "rx";
578 #sound-dai-cells = <0>;
583 compatible = "nxp,imx93-adc";
589 clock-names = "ipg";
590 #io-channel-cells = <1>;
595 aips2: bus@42000000 {
596 compatible = "fsl,aips-bus", "simple-bus";
598 #address-cells = <1>;
599 #size-cells = <1>;
602 edma2: dma-controller@42000000 {
603 compatible = "fsl,imx93-edma4";
605 #dma-cells = <3>;
606 dma-channels = <64>;
672 clock-names = "dma";
676 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
681 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
685 #mbox-cells = <2>;
690 compatible = "fsl,imx93-wdt";
694 timeout-sec = <40>;
699 compatible = "fsl,imx93-wdt";
703 timeout-sec = <40>;
708 compatible = "fsl,imx93-wdt";
712 timeout-sec = <40>;
717 compatible = "fsl,imx7ulp-pwm";
720 #pwm-cells = <3>;
725 compatible = "fsl,imx7ulp-pwm";
728 #pwm-cells = <3>;
733 compatible = "fsl,imx7ulp-pwm";
736 #pwm-cells = <3>;
741 compatible = "fsl,imx7ulp-pwm";
744 #pwm-cells = <3>;
749 compatible = "silvaco,i3c-master-v1";
752 #address-cells = <3>;
753 #size-cells = <0>;
757 clock-names = "pclk", "fast_clk", "slow_clk";
762 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
764 #address-cells = <1>;
765 #size-cells = <0>;
769 clock-names = "per", "ipg";
771 dma-names = "tx", "rx";
776 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
778 #address-cells = <1>;
779 #size-cells = <0>;
783 clock-names = "per", "ipg";
785 dma-names = "tx", "rx";
790 #address-cells = <1>;
791 #size-cells = <0>;
792 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
797 clock-names = "per", "ipg";
799 dma-names = "tx", "rx";
804 #address-cells = <1>;
805 #size-cells = <0>;
806 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
811 clock-names = "per", "ipg";
813 dma-names = "tx", "rx";
818 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
822 clock-names = "ipg";
824 dma-names = "rx", "tx";
829 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
833 clock-names = "ipg";
835 dma-names = "rx", "tx";
840 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
844 clock-names = "ipg";
846 dma-names = "rx", "tx";
851 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
855 clock-names = "ipg";
857 dma-names = "rx", "tx";
862 compatible = "fsl,imx93-flexcan";
867 clock-names = "ipg", "per";
868 assigned-clocks = <&clk IMX93_CLK_CAN2>;
869 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
870 assigned-clock-rates = <40000000>;
871 fsl,clk-source = /bits/ 8 <0>;
872 fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
877 compatible = "nxp,imx8mm-fspi";
879 reg-names = "fspi_base", "fspi_mmap";
880 #address-cells = <1>;
881 #size-cells = <0>;
885 clock-names = "fspi_en", "fspi";
886 assigned-clocks = <&clk IMX93_CLK_FLEXSPI1>;
887 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
892 compatible = "fsl,imx93-sai";
898 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
900 dma-names = "rx", "tx";
901 #sound-dai-cells = <0>;
906 compatible = "fsl,imx93-sai";
912 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
914 dma-names = "rx", "tx";
915 #sound-dai-cells = <0>;
920 compatible = "fsl,imx93-xcvr";
925 reg-names = "ram", "regs", "rxfifo", "txfifo";
932 clock-names = "ipg", "phy", "spba", "pll_ipg";
934 dma-names = "rx", "tx";
935 #sound-dai-cells = <0>;
940 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
944 clock-names = "ipg";
946 dma-names = "rx", "tx";
951 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
955 clock-names = "ipg";
957 dma-names = "rx", "tx";
962 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
964 #address-cells = <1>;
965 #size-cells = <0>;
969 clock-names = "per", "ipg";
971 dma-names = "tx", "rx";
976 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
978 #address-cells = <1>;
979 #size-cells = <0>;
983 clock-names = "per", "ipg";
985 dma-names = "tx", "rx";
990 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
992 #address-cells = <1>;
993 #size-cells = <0>;
997 clock-names = "per", "ipg";
999 dma-names = "tx", "rx";
1004 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
1006 #address-cells = <1>;
1007 #size-cells = <0>;
1011 clock-names = "per", "ipg";
1013 dma-names = "tx", "rx";
1018 #address-cells = <1>;
1019 #size-cells = <0>;
1020 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1025 clock-names = "per", "ipg";
1027 dma-names = "tx", "rx";
1032 #address-cells = <1>;
1033 #size-cells = <0>;
1034 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1039 clock-names = "per", "ipg";
1041 dma-names = "tx", "rx";
1046 #address-cells = <1>;
1047 #size-cells = <0>;
1048 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1053 clock-names = "per", "ipg";
1055 dma-names = "tx", "rx";
1060 #address-cells = <1>;
1061 #size-cells = <0>;
1062 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
1067 clock-names = "per", "ipg";
1069 dma-names = "tx", "rx";
1075 aips3: bus@42800000 {
1076 compatible = "fsl,aips-bus", "simple-bus";
1078 #address-cells = <1>;
1079 #size-cells = <1>;
1083 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1089 clock-names = "ipg", "ahb", "per";
1090 assigned-clocks = <&clk IMX93_CLK_USDHC1>;
1091 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1092 assigned-clock-rates = <400000000>;
1093 bus-width = <8>;
1094 fsl,tuning-start-tap = <1>;
1095 fsl,tuning-step = <2>;
1100 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1106 clock-names = "ipg", "ahb", "per";
1107 assigned-clocks = <&clk IMX93_CLK_USDHC2>;
1108 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1109 assigned-clock-rates = <400000000>;
1110 bus-width = <4>;
1111 fsl,tuning-start-tap = <1>;
1112 fsl,tuning-step = <2>;
1117 compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
1128 clock-names = "ipg", "ahb", "ptp",
1130 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
1133 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
1136 assigned-clock-rates = <100000000>, <250000000>, <50000000>;
1137 fsl,num-tx-queues = <3>;
1138 fsl,num-rx-queues = <3>;
1139 fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
1140 nvmem-cells = <ð_mac1>;
1141 nvmem-cell-names = "mac-address";
1146 compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
1150 interrupt-names = "macirq", "eth_wake_irq";
1156 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
1157 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
1159 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
1161 assigned-clock-rates = <100000000>, <250000000>;
1163 snps,clk-csr = <6>;
1164 nvmem-cells = <ð_mac2>;
1165 nvmem-cell-names = "mac-address";
1170 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
1176 clock-names = "ipg", "ahb", "per";
1177 assigned-clocks = <&clk IMX93_CLK_USDHC3>;
1178 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
1179 assigned-clock-rates = <400000000>;
1180 bus-width = <4>;
1181 fsl,tuning-start-tap = <1>;
1182 fsl,tuning-step = <2>;
1188 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1190 gpio-controller;
1191 #gpio-cells = <2>;
1194 interrupt-controller;
1195 #interrupt-cells = <2>;
1198 clock-names = "gpio", "port";
1199 gpio-ranges = <&iomuxc 0 4 30>;
1203 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1205 gpio-controller;
1206 #gpio-cells = <2>;
1209 interrupt-controller;
1210 #interrupt-cells = <2>;
1213 clock-names = "gpio", "port";
1214 gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
1219 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1221 gpio-controller;
1222 #gpio-cells = <2>;
1225 interrupt-controller;
1226 #interrupt-cells = <2>;
1229 clock-names = "gpio", "port";
1230 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
1234 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
1236 gpio-controller;
1237 #gpio-cells = <2>;
1240 interrupt-controller;
1241 #interrupt-cells = <2>;
1244 clock-names = "gpio", "port";
1245 gpio-ranges = <&iomuxc 0 92 16>;
1249 compatible = "fsl,imx93-ocotp", "syscon";
1251 #address-cells = <1>;
1252 #size-cells = <1>;
1254 eth_mac1: mac-address@4ec {
1258 eth_mac2: mac-address@4f2 {
1265 compatible = "fsl,imx93-mu-s4";
1269 interrupt-names = "tx", "rx";
1270 #mbox-cells = <2>;
1273 media_blk_ctrl: system-controller@4ac10000 {
1274 compatible = "fsl,imx93-media-blk-ctrl", "syscon";
1276 power-domains = <&mediamix>;
1287 clock-names = "apb", "axi", "nic", "disp", "cam",
1289 #power-domain-cells = <1>;
1294 compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
1299 clock-names = "usb_ctrl_root", "usb_wakeup";
1300 assigned-clocks = <&clk IMX93_CLK_HSIO>;
1301 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
1302 assigned-clock-rates = <133000000>;
1309 compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
1310 "fsl,imx6q-usbmisc";
1312 #index-cells = <1>;
1316 compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
1321 clock-names = "usb_ctrl_root", "usb_wakeup";
1322 assigned-clocks = <&clk IMX93_CLK_HSIO>;
1323 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
1324 assigned-clock-rates = <133000000>;
1331 compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
1332 "fsl,imx6q-usbmisc";
1334 #index-cells = <1>;
1337 ddr-pmu@4e300dc0 {
1338 compatible = "fsl,imx93-ddr-pmu";