Lines Matching +full:0 +full:x4ac10000
57 #size-cells = <0>;
64 arm,psci-suspend-param = <0x0010033>;
73 A55_0: cpu@0 {
76 reg = <0x0>;
92 reg = <0x100>;
137 #clock-cells = <0>;
144 #clock-cells = <0>;
151 #clock-cells = <0>;
179 reg = <0 0x48000000 0 0x10000>,
180 <0 0x48040000 0 0xc0000>;
192 thermal-sensors = <&tmu 0>;
239 #phy-cells = <0>;
246 #phy-cells = <0>;
251 soc@0 {
255 ranges = <0x0 0x0 0x0 0x80000000>,
256 <0x28000000 0x0 0x28000000 0x10000000>;
260 reg = <0x44000000 0x800000>;
267 reg = <0x44000000 0x200000>;
270 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, // 0: Reserved
307 reg = <0x44210000 0x1000>;
312 reg = <0x44230000 0x10000>;
321 reg = <0x44290000 0x30000>;
330 reg = <0x442d0000 0x10000>;
339 reg = <0x442e0000 0x10000>;
348 reg = <0x44310000 0x1000>;
356 reg = <0x44320000 0x10000>;
364 reg = <0x44330000 0x10000>;
367 #size-cells = <0>;
377 reg = <0x44340000 0x10000>;
379 #size-cells = <0>;
384 dmas = <&edma1 7 0 0>, <&edma1 8 0 FSL_EDMA_RX>;
391 reg = <0x44350000 0x10000>;
393 #size-cells = <0>;
398 dmas = <&edma1 9 0 0>, <&edma1 10 0 FSL_EDMA_RX>;
405 #size-cells = <0>;
407 reg = <0x44360000 0x10000>;
412 dmas = <&edma1 11 0 0>, <&edma1 12 0 FSL_EDMA_RX>;
419 #size-cells = <0>;
421 reg = <0x44370000 0x10000>;
426 dmas = <&edma1 13 0 0>, <&edma1 14 0 FSL_EDMA_RX>;
433 reg = <0x44380000 0x1000>;
437 dmas = <&edma1 17 0 FSL_EDMA_RX>, <&edma1 16 0 0>;
444 reg = <0x44390000 0x1000>;
448 dmas = <&edma1 19 0 FSL_EDMA_RX>, <&edma1 18 0 0>;
455 reg = <0x443a0000 0x10000>;
463 fsl,clk-source = /bits/ 8 <0>;
464 fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
470 reg = <0x443b0000 0x10000>;
476 dmas = <&edma1 22 0 FSL_EDMA_RX>, <&edma1 21 0 0>;
478 #sound-dai-cells = <0>;
484 reg = <0x443c0000 0x10000>;
490 reg = <0x44440000 0x10000>;
506 reg = <0x44450000 0x10000>;
517 reg = <0x44460000 0x10000>;
524 reg = <0x44461800 0x400>, <0x44464800 0x400>;
525 #power-domain-cells = <0>;
532 reg = <0x44462400 0x400>, <0x44465800 0x400>;
533 #power-domain-cells = <0>;
541 reg = <0x44480000 0x2000>;
547 reg = <0x44482000 0x1000>;
551 fsl,tmu-range = <0x800000da 0x800000e9
552 0x80000102 0x8000012a
553 0x80000166 0x800001a7
554 0x800001b6>;
555 fsl,tmu-calibration = <0x00000000 0x0000000e
556 0x00000001 0x00000029
557 0x00000002 0x00000056
558 0x00000003 0x000000a2
559 0x00000004 0x00000116
560 0x00000005 0x00000195
561 0x00000006 0x000001b2>;
567 reg = <0x44520000 0x10000>;
576 dmas = <&edma1 29 0 5>;
578 #sound-dai-cells = <0>;
584 reg = <0x44530000 0x10000>;
597 reg = <0x42000000 0x800000>;
604 reg = <0x42000000 0x210000>;
677 reg = <0x42420000 0x1000>;
682 reg = <0x42440000 0x10000>;
691 reg = <0x42490000 0x10000>;
700 reg = <0x424a0000 0x10000>;
709 reg = <0x424b0000 0x10000>;
718 reg = <0x424e0000 0x1000>;
726 reg = <0x424f0000 0x10000>;
734 reg = <0x42500000 0x10000>;
742 reg = <0x42510000 0x10000>;
750 reg = <0x42520000 0x10000>;
753 #size-cells = <0>;
763 reg = <0x42530000 0x10000>;
765 #size-cells = <0>;
770 dmas = <&edma2 8 0 0>, <&edma2 9 0 FSL_EDMA_RX>;
777 reg = <0x42540000 0x10000>;
779 #size-cells = <0>;
784 dmas = <&edma2 10 0 0>, <&edma2 11 0 FSL_EDMA_RX>;
791 #size-cells = <0>;
793 reg = <0x42550000 0x10000>;
798 dmas = <&edma2 12 0 0>, <&edma2 13 0 FSL_EDMA_RX>;
805 #size-cells = <0>;
807 reg = <0x42560000 0x10000>;
812 dmas = <&edma2 14 0 0>, <&edma2 15 0 FSL_EDMA_RX>;
819 reg = <0x42570000 0x1000>;
823 dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
830 reg = <0x42580000 0x1000>;
834 dmas = <&edma2 20 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
841 reg = <0x42590000 0x1000>;
845 dmas = <&edma2 22 0 FSL_EDMA_RX>, <&edma2 21 0 0>;
852 reg = <0x425a0000 0x1000>;
856 dmas = <&edma2 24 0 FSL_EDMA_RX>, <&edma2 23 0 0>;
863 reg = <0x425b0000 0x10000>;
871 fsl,clk-source = /bits/ 8 <0>;
872 fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
878 reg = <0x425e0000 0x10000>, <0x28000000 0x10000000>;
881 #size-cells = <0>;
893 reg = <0x42650000 0x10000>;
899 dmas = <&edma2 59 0 FSL_EDMA_RX>, <&edma2 58 0 0>;
901 #sound-dai-cells = <0>;
907 reg = <0x42660000 0x10000>;
913 dmas = <&edma2 61 0 FSL_EDMA_RX>, <&edma2 60 0 0>;
915 #sound-dai-cells = <0>;
921 reg = <0x42680000 0x800>,
922 <0x42680800 0x400>,
923 <0x42680c00 0x080>,
924 <0x42680e00 0x080>;
933 dmas = <&edma2 65 0 FSL_EDMA_RX>, <&edma2 66 0 0>;
935 #sound-dai-cells = <0>;
941 reg = <0x42690000 0x1000>;
945 dmas = <&edma2 88 0 FSL_EDMA_RX>, <&edma2 87 0 0>;
952 reg = <0x426a0000 0x1000>;
956 dmas = <&edma2 90 0 FSL_EDMA_RX>, <&edma2 89 0 0>;
963 reg = <0x426b0000 0x10000>;
965 #size-cells = <0>;
970 dmas = <&edma2 71 0 0>, <&edma2 72 0 FSL_EDMA_RX>;
977 reg = <0x426c0000 0x10000>;
979 #size-cells = <0>;
984 dmas = <&edma2 73 0 0>, <&edma2 74 0 FSL_EDMA_RX>;
991 reg = <0x426d0000 0x10000>;
993 #size-cells = <0>;
998 dmas = <&edma2 75 0 0>, <&edma2 76 0 FSL_EDMA_RX>;
1005 reg = <0x426e0000 0x10000>;
1007 #size-cells = <0>;
1012 dmas = <&edma2 77 0 0>, <&edma2 78 0 FSL_EDMA_RX>;
1019 #size-cells = <0>;
1021 reg = <0x426f0000 0x10000>;
1026 dmas = <&edma2 79 0 0>, <&edma2 80 0 FSL_EDMA_RX>;
1033 #size-cells = <0>;
1035 reg = <0x42700000 0x10000>;
1040 dmas = <&edma2 81 0 0>, <&edma2 82 0 FSL_EDMA_RX>;
1047 #size-cells = <0>;
1049 reg = <0x42710000 0x10000>;
1054 dmas = <&edma2 83 0 0>, <&edma2 84 0 FSL_EDMA_RX>;
1061 #size-cells = <0>;
1063 reg = <0x42720000 0x10000>;
1068 dmas = <&edma2 85 0 0>, <&edma2 86 0 FSL_EDMA_RX>;
1077 reg = <0x42800000 0x800000>;
1084 reg = <0x42850000 0x10000>;
1101 reg = <0x42860000 0x10000>;
1118 reg = <0x42890000 0x10000>;
1139 fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
1147 reg = <0x428a0000 0x10000>;
1162 intf_mode = <&wakeupmix_gpr 0x28>;
1171 reg = <0x428b0000 0x10000>;
1189 reg = <0x43810000 0x1000>;
1199 gpio-ranges = <&iomuxc 0 4 30>;
1204 reg = <0x43820000 0x1000>;
1214 gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
1215 <&iomuxc 26 34 2>, <&iomuxc 28 0 4>;
1220 reg = <0x43830000 0x1000>;
1230 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
1235 reg = <0x47400000 0x1000>;
1245 gpio-ranges = <&iomuxc 0 92 16>;
1250 reg = <0x47510000 0x10000>;
1255 reg = <0x4ec 0x6>;
1259 reg = <0x4f2 0x6>;
1266 reg = <0x47520000 0x10000>;
1275 reg = <0x4ac10000 0x10000>;
1295 reg = <0x4c100000 0x200>;
1304 fsl,usbmisc = <&usbmisc1 0>;
1311 reg = <0x4c100200 0x200>;
1317 reg = <0x4c200000 0x200>;
1326 fsl,usbmisc = <&usbmisc2 0>;
1333 reg = <0x4c200200 0x200>;
1339 reg = <0x4e300dc0 0x200>;