Lines Matching +full:en +full:- +full:us
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 compatible = "fsl,imx93-14x14-evk", "fsl,imx93";
16 stdout-path = &lpuart1;
19 reserved-memory {
20 #address-cells = <2>;
21 #size-cells = <2>;
25 compatible = "shared-dma-pool";
27 alloc-ranges = <0 0x80000000 0 0x40000000>;
29 linux,cma-default;
34 no-map;
39 no-map;
44 no-map;
49 no-map;
52 rsc_table: rsc-table@2021e000 {
54 no-map;
58 compatible = "shared-dma-pool";
60 no-map;
64 reg_can1_stby: regulator-can1-stby {
65 compatible = "regulator-fixed";
66 regulator-name = "can1-stby";
67 regulator-min-microvolt = <3300000>;
68 regulator-max-microvolt = <3300000>;
70 enable-active-high;
71 vin-supply = <®_can1_en>;
74 reg_can1_en: regulator-can1-en {
75 compatible = "regulator-fixed";
76 regulator-name = "can1-en";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
80 enable-active-high;
83 reg_can2_stby: regulator-can2-stby {
84 compatible = "regulator-fixed";
85 regulator-name = "can2-stby";
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
89 enable-active-high;
90 vin-supply = <®_can2_en>;
93 reg_can2_en: regulator-can2-en {
94 compatible = "regulator-fixed";
95 regulator-name = "can2-en";
96 regulator-min-microvolt = <3300000>;
97 regulator-max-microvolt = <3300000>;
99 enable-active-high;
102 reg_usdhc2_vmmc: regulator-usdhc2 {
103 compatible = "regulator-fixed";
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
106 regulator-name = "VSD_3V3";
107 regulator-min-microvolt = <3300000>;
108 regulator-max-microvolt = <3300000>;
110 enable-active-high;
111 off-on-delay-us = <12000>;
114 reg_vdd_12v: regulator-vdd-12v {
115 compatible = "regulator-fixed";
116 regulator-name = "reg_vdd_12v";
117 regulator-min-microvolt = <12000000>;
118 regulator-max-microvolt = <12000000>;
120 enable-active-high;
123 reg_vref_1v8: regulator-adc-vref {
124 compatible = "regulator-fixed";
125 regulator-name = "vref_1v8";
126 regulator-min-microvolt = <1800000>;
127 regulator-max-microvolt = <1800000>;
132 vref-supply = <®_vref_1v8>;
137 mbox-names = "tx", "rx", "rxdb";
141 memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_fec>;
149 phy-mode = "rgmii-id";
150 phy-handle = <ðphy2>;
151 fsl,magic-packet;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 clock-frequency = <5000000>;
159 ethphy2: ethernet-phy@2 {
160 compatible = "ethernet-phy-ieee802.3-c22";
162 eee-broken-1000t;
163 reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
164 reset-assert-us = <10000>;
165 reset-deassert-us = <80000>;
166 realtek,clkout-disable;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_flexcan1>;
174 xceiver-supply = <®_can1_stby>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_flexcan2>;
181 xceiver-supply = <®_can2_stby>;
186 clock-frequency = <400000>;
187 pinctrl-names = "default";
188 pinctrl-0 = <&pinctrl_lpi2c1>;
198 clock-frequency = <400000>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_lpi2c2>;
206 gpio-controller;
207 #gpio-cells = <2>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_pcal6524>;
215 gpio-controller;
216 #gpio-cells = <2>;
217 interrupt-controller;
218 #interrupt-cells = <2>;
219 interrupt-parent = <&gpio3>;
225 clock-frequency = <400000>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_lpi2c3>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_uart1>;
247 hnp-disable;
248 srp-disable;
249 adp-disable;
250 disable-over-current;
251 samsung,picophy-pre-emp-curr-control = <3>;
252 samsung,picophy-dc-vol-level-adjust = <7>;
258 disable-over-current;
259 samsung,picophy-pre-emp-curr-control = <3>;
260 samsung,picophy-dc-vol-level-adjust = <7>;
265 pinctrl-names = "default", "state_100mhz", "state_200mhz";
266 pinctrl-0 = <&pinctrl_usdhc1>;
267 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
268 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
269 bus-width = <8>;
270 non-removable;
275 pinctrl-names = "default", "state_100mhz", "state_200mhz";
276 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
277 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
278 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
279 cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
280 vmmc-supply = <®_usdhc2_vmmc>;
281 bus-width = <4>;
282 no-mmc;
385 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
402 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
444 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
457 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {