Lines Matching full:assigned
224 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
228 assigned-clock-rates = <786432000>,
281 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
285 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
292 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
296 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
303 assigned-clocks = <&acm IMX_ADMA_ACM_SAI4_MCLK_SEL>,
308 assigned-clock-parents = <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>;
309 assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>;
315 assigned-clocks = <&acm IMX_ADMA_ACM_SAI5_MCLK_SEL>,
320 assigned-clock-parents = <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>;
321 assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>;
360 assigned-clocks = <&clk IMX_SC_R_SDHC_0 IMX_SC_PM_CLK_PER>;
361 assigned-clock-rates = <200000000>;
372 assigned-clocks = <&clk IMX_SC_R_SDHC_1 IMX_SC_PM_CLK_PER>;
373 assigned-clock-rates = <200000000>;