Lines Matching +full:vph +full:- +full:supply
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
9 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ";
10 compatible = "tq,imx8mq-tqma8mq", "fsl,imx8mq";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MX_VCC1V8";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
26 reg_vcc3v3: regulator-vcc3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "TQMA8MX_VCC3V3";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
33 reg_vdd_arm: regulator-vdd-arm {
34 compatible = "regulator-gpio";
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_dvfs>;
37 regulator-min-microvolt = <900000>;
38 regulator-max-microvolt = <1000000>;
39 regulator-name = "TQMa8Mx_DVFS";
40 regulator-type = "voltage";
41 regulator-settling-time-us = <150000>;
46 reserved-memory {
47 #address-cells = <2>;
48 #size-cells = <2>;
53 compatible = "shared-dma-pool";
57 /* 1024 - 128 MiB, our minimum RAM config will be 1024 MiB */
58 alloc-ranges = <0 0x40000000 0 0x78000000>;
59 linux,cma-default;
65 cpu-supply = <®_vdd_arm>;
69 cpu-supply = <®_vdd_arm>;
73 cpu-supply = <®_vdd_arm>;
77 cpu-supply = <®_vdd_arm>;
85 power-supply = <&sw1a_reg>;
89 power-supply = <&sw1c_reg>;
93 clock-frequency = <100000>;
94 pinctrl-names = "default", "gpio";
95 pinctrl-0 = <&pinctrl_i2c1>;
96 pinctrl-1 = <&pinctrl_i2c1_gpio>;
97 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
98 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
103 fsl,pfuze-support-disable-sw;
109 regulator-min-microvolt = <825000>;
110 regulator-max-microvolt = <1100000>;
115 regulator-min-microvolt = <825000>;
116 regulator-max-microvolt = <1100000>;
121 regulator-min-microvolt = <1100000>;
122 regulator-max-microvolt = <1100000>;
123 regulator-always-on;
128 regulator-min-microvolt = <825000>;
129 regulator-max-microvolt = <1100000>;
130 regulator-always-on;
133 /* 1.8 V for QSPI NOR, e-MMC IO, must not be changed */
135 regulator-min-microvolt = <1800000>;
136 regulator-max-microvolt = <1800000>;
137 regulator-always-on;
141 regulator-min-microvolt = <5000000>;
142 regulator-max-microvolt = <5150000>;
146 regulator-min-microvolt = <1000000>;
147 regulator-max-microvolt = <3000000>;
148 regulator-always-on;
152 regulator-always-on;
157 regulator-min-microvolt = <800000>;
158 regulator-max-microvolt = <1550000>;
163 regulator-min-microvolt = <850000>;
164 regulator-max-microvolt = <975000>;
165 regulator-always-on;
170 regulator-min-microvolt = <1675000>;
171 regulator-max-microvolt = <1975000>;
172 regulator-always-on;
177 regulator-min-microvolt = <1625000>;
178 regulator-max-microvolt = <1875000>;
179 regulator-always-on;
184 regulator-min-microvolt = <3075000>;
185 regulator-max-microvolt = <3625000>;
186 regulator-always-on;
191 regulator-min-microvolt = <1800000>;
192 regulator-max-microvolt = <3300000>;
197 sensor0: temperature-sensor@1b {
198 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_rtc>;
207 interrupt-parent = <&gpio1>;
209 quartz-load-femtofarads = <7000>;
212 compatible = "fixed-clock";
213 #clock-cells = <0>;
214 clock-frequency = <32768>;
222 read-only;
223 vcc-supply = <®_vcc3v3>;
230 vcc-supply = <®_vcc3v3>;
235 /* 3.3V supply, only way to switch on internal 1.8V supply using GPR */
236 vph-supply = <&vgen5_reg>;
240 /* 3.3V supply, only way to switch on internal 1.8V supply using GPR */
241 vph-supply = <&vgen5_reg>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_qspi>;
247 assigned-clocks = <&clk IMX8MQ_CLK_QSPI>;
248 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_266M>;
252 compatible = "jedec,spi-nor";
254 spi-max-frequency = <84000000>;
255 spi-tx-bus-width = <1>;
256 spi-rx-bus-width = <4>;
259 compatible = "fixed-partitions";
260 #address-cells = <1>;
261 #size-cells = <1>;
267 pinctrl-names = "default", "state_100mhz", "state_200mhz";
268 pinctrl-0 = <&pinctrl_usdhc1>;
269 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
270 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
271 bus-width = <8>;
272 non-removable;
273 no-sd;
274 no-sdio;
275 vmmc-supply = <®_vcc3v3>;
276 vqmmc-supply = <®_vcc1v8>;
328 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
343 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {