Lines Matching +full:adp +full:- +full:disable
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
6 /dts-v1/;
8 #include "imx8mq-tqma8mq.dtsi"
12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq";
14 chassis-type = "embedded";
24 extcon_usbotg: extcon-usbotg0 {
25 compatible = "linux,extcon-usb-gpio";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_usbcon0>;
28 id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
31 reg_otg_vbus: regulator-otg-vbus {
32 compatible = "regulator-fixed";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_regotgvbus>;
35 regulator-name = "MBA8MQ_OTG_VBUS";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
39 enable-active-high;
42 reg_usdhc2_vmmc: regulator-vmmc {
43 compatible = "regulator-fixed";
44 regulator-name = "VSD_3V3";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
48 enable-active-high;
67 gpio-controller;
68 #gpio-cells = <2>;
69 vcc-supply = <®_vcc_3v3>;
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_expander>;
72 interrupt-parent = <&gpio1>;
74 interrupt-controller;
75 #interrupt-cells = <2>;
77 mpcie-rst-hog {
78 gpio-hog;
80 output-high;
81 line-name = "MPCIE_RST#";
96 reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
117 assigned-clocks = <&clk IMX8MQ_CLK_SAI3>;
118 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
119 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
127 clock-names = "mclk";
132 assigned-clocks = <&clk IMX8MQ_CLK_UART1>;
133 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
137 assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
138 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
143 assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
144 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
148 vbus-supply = <®_otg_vbus>;
155 hnp-disable;
156 srp-disable;
157 adp-disable;
163 vbus-supply = <®_hub_vbus>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_wdog>;
175 fsl,ext-reset-output;
295 /* ID: floating / high: device, low: host -> use PU */
309 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
319 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
329 pinctrl_usdhc2_gpio: usdhc2-gpiogrp {