Lines Matching +full:0 +full:xc3
20 pinctrl-0 = <&pinctrl_backlight>;
21 pwms = <&pwm2 0 10000 0>;
24 brightness-levels = <0 32 64 128 160 200 255>;
43 #clock-cells = <0>;
117 pinctrl-0 = <&pinctrl_i2c3>;
122 reg = <0x1a>;
125 #sound-dai-cells = <0>;
130 reg = <0x68>;
136 pinctrl-0 = <&pinctrl_i2c4>;
143 pinctrl-0 = <&pinctrl_edp_bridge>;
144 reg = <0x2c>;
153 #size-cells = <0>;
155 port@0 {
156 reg = <0>;
197 pinctrl-0 = <&pinctrl_pcie1>;
208 pinctrl-0 = <&pinctrl_pwm2>;
234 pinctrl-0 = <&pinctrl_sai2>;
249 pinctrl-0 = <&pinctrl_uart2>;
277 pinctrl-0 = <&pinctrl_usdhc2>;
287 MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x3
293 MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x1
299 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000022
300 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000022
306 MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000022
307 MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000022
313 MX8MQ_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x16
319 MX8MQ_IOMUXC_SPDIF_RX_PWM2_OUT 0x3
325 MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
326 MX8MQ_IOMUXC_SAI2_RXFS_SAI2_RX_SYNC 0xd6
327 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
328 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
329 MX8MQ_IOMUXC_SAI2_RXC_SAI2_RX_BCLK 0xd6
330 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
331 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
337 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x45
338 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x45
344 MX8MQ_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x0
345 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
346 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
347 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
348 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
349 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
350 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3