Lines Matching +full:imx8m +full:- +full:clock
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree File for the Kontron pitx-imx8m board.
8 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
14 model = "Kontron pITX-imx8m";
15 compatible = "kontron,pitx-imx8m", "fsl,imx8mq";
31 stdout-path = "serial2:115200n8";
34 pcie0_refclk: pcie0-clock {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <100000000>;
40 pcie1_refclk: pcie1-clock {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <100000000>;
46 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
47 compatible = "regulator-fixed";
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_reg_usdhc2>;
50 regulator-name = "V_3V3_SD";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
54 off-on-delay-us = <20000>;
55 enable-active-high;
60 #address-cells = <1>;
61 #size-cells = <0>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
64 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
68 compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
70 spi-max-frequency = <43000000>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_fec1>;
77 phy-mode = "rgmii-id";
78 phy-handle = <ðphy0>;
79 fsl,magic-packet;
83 #address-cells = <1>;
84 #size-cells = <0>;
86 ethphy0: ethernet-phy@0 {
87 compatible = "ethernet-phy-ieee802.3-c22";
89 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
90 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
91 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
92 reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
93 reset-assert-us = <10>;
94 reset-deassert-us = <280>;
100 clock-frequency = <400000>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_i2c1>;
107 fsl,pfuze-support-disable-sw;
112 regulator-name = "V_0V9_GPU";
113 regulator-min-microvolt = <825000>;
114 regulator-max-microvolt = <1100000>;
118 regulator-name = "V_0V9_VPU";
119 regulator-min-microvolt = <825000>;
120 regulator-max-microvolt = <1100000>;
124 regulator-name = "V_1V1_NVCC_DRAM";
125 regulator-min-microvolt = <1100000>;
126 regulator-max-microvolt = <1100000>;
127 regulator-always-on;
131 regulator-name = "V_1V0_DRAM";
132 regulator-min-microvolt = <825000>;
133 regulator-max-microvolt = <1100000>;
134 regulator-always-on;
138 regulator-name = "V_1V8_S0";
139 regulator-min-microvolt = <1800000>;
140 regulator-max-microvolt = <1800000>;
141 regulator-always-on;
145 regulator-name = "NC";
146 regulator-min-microvolt = <5000000>;
147 regulator-max-microvolt = <5150000>;
151 regulator-name = "V_0V9_SNVS";
152 regulator-min-microvolt = <1000000>;
153 regulator-max-microvolt = <3000000>;
154 regulator-always-on;
158 regulator-name = "V_0V55_VREF_DDR";
159 regulator-always-on;
163 regulator-name = "V_1V5_CSI";
164 regulator-min-microvolt = <800000>;
165 regulator-max-microvolt = <1550000>;
169 regulator-name = "V_0V9_PHY";
170 regulator-min-microvolt = <850000>;
171 regulator-max-microvolt = <975000>;
172 regulator-always-on;
176 regulator-name = "V_1V8_PHY";
177 regulator-min-microvolt = <1675000>;
178 regulator-max-microvolt = <1975000>;
179 regulator-always-on;
183 regulator-name = "V_1V8_VDDA";
184 regulator-min-microvolt = <1625000>;
185 regulator-max-microvolt = <1875000>;
186 regulator-always-on;
190 regulator-name = "V_3V3_PHY";
191 regulator-min-microvolt = <3075000>;
192 regulator-max-microvolt = <3625000>;
193 regulator-always-on;
197 regulator-name = "V_2V8_CAM";
198 regulator-min-microvolt = <1800000>;
199 regulator-max-microvolt = <3300000>;
200 regulator-always-on;
205 fan-controller@1b {
208 maxim,fan-microvolt = <5000000>;
229 clock-frequency = <100000>;
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_i2c2>;
236 clock-frequency = <100000>;
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_i2c3>;
242 /* M.2 B-key slot */
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_pcie0>;
246 reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
260 fsl,max-link-speed = <1>;
265 power-supply = <&sw1a_reg>;
269 power-supply = <&sw1c_reg>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&pinctrl_qspi>;
278 compatible = "jedec,spi-nor";
279 #address-cells = <1>;
280 #size-cells = <1>;
282 spi-tx-bus-width = <1>;
283 spi-rx-bus-width = <4>;
284 m25p,fast-read;
285 spi-max-frequency = <50000000>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_uart1>;
296 assigned-clocks = <&clk IMX8MQ_CLK_UART1>;
297 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
302 pinctrl-names = "default";
303 pinctrl-0 = <&pinctrl_uart2>;
304 assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
305 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&pinctrl_uart3>;
312 uart-has-rtscts;
313 assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
314 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
327 pinctrl-names = "default";
328 pinctrl-0 = <&pinctrl_usb0>;
330 hnp-disable;
331 srp-disable;
332 adp-disable;
333 maximum-speed = "high-speed";
343 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
344 assigned-clock-rates = <400000000>;
345 pinctrl-names = "default", "state_100mhz", "state_200mhz";
346 pinctrl-0 = <&pinctrl_usdhc1>;
347 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
348 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
349 vqmmc-supply = <&sw4_reg>;
350 bus-width = <8>;
351 non-removable;
352 no-sd;
353 no-sdio;
358 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
359 assigned-clock-rates = <200000000>;
360 pinctrl-names = "default", "state_100mhz", "state_200mhz";
361 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
362 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
363 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
364 bus-width = <4>;
365 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
366 wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
367 vmmc-supply = <®_usdhc2_vmmc>;
372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_wdog>;
374 fsl,ext-reset-output;
379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_hog>;
522 pinctrl_usdhc1_100mhz: usdhc1-100grp {
539 pinctrl_usdhc1_200mhz: usdhc1-200grp {
575 pinctrl_usdhc2_100mhz: usdhc2-100grp {
587 pinctrl_usdhc2_200mhz: usdhc2-200grp {