Lines Matching +full:imx8mq +full:- +full:pcie
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 /dts-v1/;
9 #include "imx8mq.dtsi"
13 compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pcie0_refclk: pcie0-refclk {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <100000000>;
30 reg_pcie1: regulator-pcie {
31 compatible = "regulator-fixed";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_pcie1_reg>;
34 regulator-name = "MPCIE_3V3";
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
38 enable-active-high;
41 reg_usdhc2_vmmc: regulator-vsd-3v3 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_reg_usdhc2>;
44 compatible = "regulator-fixed";
45 regulator-name = "VSD_3V3";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
49 off-on-delay-us = <20000>;
50 enable-active-high;
53 buck2_reg: regulator-buck2 {
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_buck2>;
56 compatible = "regulator-gpio";
57 regulator-name = "vdd_arm";
58 regulator-min-microvolt = <900000>;
59 regulator-max-microvolt = <1000000>;
63 regulator-boot-on;
64 regulator-always-on;
67 ir-receiver {
68 compatible = "gpio-ir-receiver";
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_ir>;
72 linux,autosuspend-period = <125>;
75 audio_codec_bt_sco: audio-codec-bt-sco {
76 compatible = "linux,bt-sco";
77 #sound-dai-cells = <1>;
80 wm8524: audio-codec {
81 #sound-dai-cells = <0>;
83 wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
86 sound-bt-sco {
87 compatible = "simple-audio-card";
88 simple-audio-card,name = "bt-sco-audio";
89 simple-audio-card,format = "dsp_a";
90 simple-audio-card,bitclock-inversion;
91 simple-audio-card,frame-master = <&btcpu>;
92 simple-audio-card,bitclock-master = <&btcpu>;
94 btcpu: simple-audio-card,cpu {
95 sound-dai = <&sai3>;
96 dai-tdm-slot-num = <2>;
97 dai-tdm-slot-width = <16>;
100 simple-audio-card,codec {
101 sound-dai = <&audio_codec_bt_sco 1>;
105 sound-wm8524 {
106 compatible = "simple-audio-card";
107 simple-audio-card,name = "wm8524-audio";
108 simple-audio-card,format = "i2s";
109 simple-audio-card,frame-master = <&cpudai>;
110 simple-audio-card,bitclock-master = <&cpudai>;
111 simple-audio-card,widgets =
114 simple-audio-card,routing =
118 cpudai: simple-audio-card,cpu {
119 sound-dai = <&sai2>;
122 link_codec: simple-audio-card,codec {
123 sound-dai = <&wm8524>;
128 spdif_out: spdif-out {
129 compatible = "linux,spdif-dit";
130 #sound-dai-cells = <0>;
133 spdif_in: spdif-in {
134 compatible = "linux,spdif-dir";
135 #sound-dai-cells = <0>;
138 sound-spdif {
139 compatible = "fsl,imx-audio-spdif";
140 model = "imx-spdif";
141 audio-cpu = <&spdif1>;
142 audio-codec = <&spdif_out>, <&spdif_in>;
145 hdmi_arc_in: hdmi-arc-in {
146 compatible = "linux,spdif-dir";
147 #sound-dai-cells = <0>;
150 sound-hdmi-arc {
151 compatible = "fsl,imx-audio-spdif";
152 model = "imx-hdmi-arc";
153 audio-cpu = <&spdif2>;
154 audio-codec = <&hdmi_arc_in>;
159 cpu-supply = <&buck2_reg>;
163 cpu-supply = <&buck2_reg>;
167 cpu-supply = <&buck2_reg>;
171 cpu-supply = <&buck2_reg>;
175 operating-points-v2 = <&ddrc_opp_table>;
178 ddrc_opp_table: opp-table {
179 compatible = "operating-points-v2";
181 opp-25000000 {
182 opp-hz = /bits/ 64 <25000000>;
185 opp-100000000 {
186 opp-hz = /bits/ 64 <100000000>;
190 * On imx8mq B0 PLL can't be bypassed so low bus is 166M
192 opp-166000000 {
193 opp-hz = /bits/ 64 <166935483>;
196 opp-800000000 {
197 opp-hz = /bits/ 64 <800000000>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_fec1>;
209 phy-mode = "rgmii-id";
210 phy-handle = <ðphy0>;
211 fsl,magic-packet;
215 #address-cells = <1>;
216 #size-cells = <0>;
218 ethphy0: ethernet-phy@0 {
219 compatible = "ethernet-phy-ieee802.3-c22";
221 reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
222 reset-assert-us = <10000>;
223 qca,disable-smarteee;
224 vddio-supply = <&vddh>;
226 vddh: vddh-regulator {
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_wifi_reset>;
236 wl-reg-on-hog {
237 gpio-hog;
239 output-high;
244 clock-frequency = <100000>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_i2c1>;
255 regulator-min-microvolt = <825000>;
256 regulator-max-microvolt = <1100000>;
260 regulator-min-microvolt = <825000>;
261 regulator-max-microvolt = <1100000>;
265 regulator-min-microvolt = <1100000>;
266 regulator-max-microvolt = <1100000>;
267 regulator-always-on;
271 regulator-min-microvolt = <825000>;
272 regulator-max-microvolt = <1100000>;
273 regulator-always-on;
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <1800000>;
279 regulator-always-on;
283 regulator-min-microvolt = <5000000>;
284 regulator-max-microvolt = <5150000>;
288 regulator-min-microvolt = <1000000>;
289 regulator-max-microvolt = <3000000>;
290 regulator-always-on;
294 regulator-always-on;
298 regulator-min-microvolt = <800000>;
299 regulator-max-microvolt = <1550000>;
303 regulator-min-microvolt = <850000>;
304 regulator-max-microvolt = <975000>;
305 regulator-always-on;
309 regulator-min-microvolt = <1675000>;
310 regulator-max-microvolt = <1975000>;
311 regulator-always-on;
315 regulator-min-microvolt = <1625000>;
316 regulator-max-microvolt = <1875000>;
317 regulator-always-on;
321 regulator-min-microvolt = <3075000>;
322 regulator-max-microvolt = <3625000>;
323 regulator-always-on;
327 regulator-min-microvolt = <1800000>;
328 regulator-max-microvolt = <3300000>;
339 #address-cells = <1>;
340 #size-cells = <0>;
344 pinctrl-0 = <&pinctrl_mipi_dsi>;
345 pinctrl-names = "default";
348 reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
349 dsi-lanes = <4>;
353 remote-endpoint = <&mipi_dsi_out>;
362 remote-endpoint = <&panel_in>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_pcie0>;
371 reset-gpio = <&gpio5 28 GPIO_ACTIVE_LOW>;
376 vph-supply = <&vgen5_reg>;
381 pinctrl-names = "default";
382 pinctrl-0 = <&pinctrl_pcie1>;
383 reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
388 vpcie-supply = <®_pcie1>;
389 vph-supply = <&vgen5_reg>;
394 power-supply = <&sw1a_reg>;
398 power-supply = <&sw1c_reg>;
402 pinctrl-names = "default";
403 pinctrl-0 = <&pinctrl_qspi>;
408 #address-cells = <1>;
409 #size-cells = <1>;
410 compatible = "micron,n25q256a", "jedec,spi-nor";
411 spi-max-frequency = <29000000>;
412 spi-tx-bus-width = <1>;
413 spi-rx-bus-width = <4>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_sai2>;
420 assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_SAI2>;
421 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL1_OUT>;
422 assigned-clock-rates = <0>, <24576000>;
427 #sound-dai-cells = <0>;
428 pinctrl-names = "default";
429 pinctrl-0 = <&pinctrl_sai3>;
430 assigned-clocks = <&clk IMX8MQ_CLK_SAI3>;
431 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
432 assigned-clock-rates = <24576000>;
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_spdif1>;
443 assigned-clocks = <&clk IMX8MQ_CLK_SPDIF1>;
444 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
445 assigned-clock-rates = <24576000>;
450 assigned-clocks = <&clk IMX8MQ_CLK_SPDIF2>;
451 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
452 assigned-clock-rates = <24576000>;
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_uart1>;
472 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
473 assigned-clock-rates = <400000000>;
474 pinctrl-names = "default", "state_100mhz", "state_200mhz";
475 pinctrl-0 = <&pinctrl_usdhc1>;
476 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
477 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
478 vqmmc-supply = <&sw4_reg>;
479 bus-width = <8>;
480 non-removable;
481 no-sd;
482 no-sdio;
487 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
488 assigned-clock-rates = <200000000>;
489 pinctrl-names = "default", "state_100mhz", "state_200mhz";
490 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
491 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
492 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
493 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
494 vmmc-supply = <®_usdhc2_vmmc>;
499 pinctrl-names = "default";
500 pinctrl-0 = <&pinctrl_wdog>;
501 fsl,ext-reset-output;
638 pinctrl_usdhc1_100mhz: usdhc1-100grp {
655 pinctrl_usdhc1_200mhz: usdhc1-200grp {
690 pinctrl_usdhc2_100mhz: usdhc2-100grp {
702 pinctrl_usdhc2_200mhz: usdhc2-200grp {